CN111190074B - Power grid synchronous detection method based on single-phase-locked loop - Google Patents
Power grid synchronous detection method based on single-phase-locked loop Download PDFInfo
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Abstract
The invention discloses a power grid synchronous detection method based on a single-phase-locked loop, and relates to the technical field of grid-connected control. The phase-locked loop is used for solving the problem that the phase angle locking delay is easily caused by sudden change of a phase angle or amplitude of a power grid in the conventional phase-locked loop. The method comprises the following steps: when the absolute value of the voltage amplitude detection value is determined to be larger than the voltage amplitude threshold value, determining a voltage phase angle error value according to the voltage error value, the voltage amplitude detection value and a cosine value of the voltage phase angle detection value; determining a voltage frequency adjustment value according to the relation between the absolute value of the voltage phase angle error value and the voltage phase angle error threshold value; and determining a voltage frequency detection value and a voltage phase angle detection value according to the voltage frequency adjustment value, and adjusting the voltage phase angle detection value according to the voltage amplitude detection value to obtain a voltage phase angle correction value.
Description
Technical Field
The invention relates to the technical field of grid-connected control, in particular to a power grid synchronous detection method based on a single-phase-locked loop.
Background
The phase-locked loop is an online real-time detection algorithm capable of acquiring phase angle and frequency information of a power grid, and is widely applied to grid-connected power devices such as a wind-solar grid-connected inverter and an active power filter. The precision, response speed and stability of the phase-locked loop under non-ideal grid conditions directly affect the performance of the grid-connected device. At present, the development of renewable energy and energy storage micro-grid brings more and more application scenes to the power electronic grid-connected control technology, and meanwhile, the increasingly severe problem of electric energy quality also brings greater examination to the control link.
The single-phase-locked loop technology commonly used for grid-connected control mainly comprises a synchronous rotating coordinate system phase-locked loop and an enhanced phase-locked loop. The synchronous rotating coordinate system phase-locked loop constructs a virtual orthogonal phase through a second-order generalized integrator and then performs park transformation to extract phase angle information. The enhanced phase-locked loop is a nonlinear phase-locked loop and can directly detect the phase angle, the frequency and the amplitude of a power grid. One common structure of the two existing types of phase-locked loops is: the phase angle error value is used to estimate the change in the grid frequency, and the resulting frequency detection value is then used to estimate the phase angle. The disadvantage of this structure is that when the grid has sudden change in phase angle or amplitude and constant frequency, the frequency detection value will fluctuate greatly, resulting in delay of phase angle locking.
In summary, in the phase-locked loop in the prior art, when the phase angle or amplitude of the power grid changes suddenly and the frequency is not changed, the frequency detection value fluctuates greatly, which easily causes phase angle locking delay.
Disclosure of Invention
The embodiment of the invention provides a power grid synchronous detection method based on a single-phase-locked loop, which is used for solving the problem that the frequency detection value can generate larger fluctuation and phase angle locking delay is easy to cause under the condition that the frequency of a power grid is unchanged due to sudden change of a phase angle or an amplitude value in the conventional phase-locked loop.
The embodiment of the invention provides a power grid synchronous detection method based on a single-phase-locked loop, which comprises the following steps:
when the absolute value of the voltage amplitude detection value of the current period is determined to be larger than the voltage amplitude threshold value, determining a voltage phase angle error value of the current period according to the voltage error value and cosine values of the voltage amplitude detection value and the voltage phase angle detection value;
according to the relation between the absolute value of the voltage phase angle error value and a voltage phase angle error threshold value, determining the voltage frequency adjustment value of the previous period as the voltage frequency adjustment value of the current period or determining the phase angle error value as the voltage frequency adjustment value of the current period after the operation of a second gain module and a second integrator, wherein the integral starting point of the second integrator is zero;
and determining a voltage frequency detection value and a voltage phase angle detection value of the current period according to the voltage frequency adjustment value, and adjusting the voltage phase angle detection value according to the voltage amplitude detection value to obtain a voltage phase angle correction value of the current period.
Preferably, the adjusting the voltage phase angle detection value according to the voltage amplitude detection value to obtain a voltage phase angle correction value of the current period specifically includes:
if the voltage amplitude detection value is less than zero, determining the reverse angle of the voltage phase angle detection value as the voltage phase angle correction value of the current period; or
And if the voltage amplitude detection value is larger than zero, determining the voltage phase angle detection value as the voltage phase angle correction value of the current period.
Preferably, before determining the voltage frequency detection value and the voltage phase angle detection value of the current cycle, the method further includes:
and multiplying the voltage phase angle error value by a third gain module to obtain a voltage phase angle adjusting value of the current period.
Preferably, the determining the voltage frequency detection value and the voltage phase angle detection value of the current cycle according to the voltage frequency adjustment value specifically includes:
determining a voltage frequency detection value of the current period according to the voltage frequency adjustment value and the power grid standard frequency value;
adding the voltage phase angle adjusting value and the frequency detection value, and obtaining a voltage phase angle detection value of the current period through operation of a third integrator; the starting point of the integration of the third integrator is pi/2.
Preferably, before determining the voltage phase angle error value of the current cycle, the method further includes:
determining the voltage error value of the current period according to the voltage input signal of the current period and the voltage fundamental wave detection value obtained in the last period;
determining a voltage amplitude error value of the current period according to the voltage error value and a voltage phase angle detection value obtained in the previous period;
the voltage amplitude error value is calculated through a first gain module and a first integrator to obtain the voltage amplitude detection value of the current period; the starting point of the integration of the first integrator is zero.
Preferably, when it is determined that the absolute value of the voltage amplitude detection value of the current cycle is greater than the voltage amplitude threshold, the method further includes:
and when the absolute value of the voltage amplitude detection value is smaller than the voltage amplitude threshold value, determining that the phase angle error value is zero.
Preferably, the relationship between the absolute value of the voltage phase angle error value and the voltage phase angle error threshold specifically includes:
when the absolute value of the voltage phase angle error value is determined to be larger than the voltage phase angle error threshold value, determining that the voltage frequency adjustment value of the current period is equal to the voltage frequency adjustment value of the previous period;
and when the absolute value of the voltage phase angle error value is smaller than the voltage phase angle error threshold value, determining the phase angle error value as the voltage frequency adjustment value of the current period after the operation of a second gain module and a second integrator.
Preferably, after obtaining the voltage phase angle correction value of the current cycle, the method further includes:
and multiplying the sine value of the voltage amplitude detection value and the voltage phase angle detection value to obtain the voltage fundamental wave detection value of the current period.
Preferably, the voltage phase angle error threshold is 0.15 rad.
The embodiment of the invention provides a power grid synchronous detection method based on a single-phase-locked loop, which comprises the following steps: when the absolute value of the voltage amplitude detection value of the current period is determined to be larger than the voltage amplitude threshold value, determining a voltage phase angle error value of the current period according to the voltage error value and cosine values of the voltage amplitude detection value and the voltage phase angle detection value; according to the relation between the absolute value of the voltage phase angle error value and a voltage phase angle error threshold value, determining the voltage frequency adjustment value of the previous period as the voltage frequency adjustment value of the current period or determining the phase angle error value as the voltage frequency adjustment value of the current period after the operation of a second gain module and a second integrator, wherein the integral starting point of the second integrator is zero; and determining a voltage frequency detection value and a voltage phase angle detection value of the current period according to the voltage frequency adjustment value, and adjusting the voltage phase angle detection value according to the voltage amplitude detection value to obtain a voltage phase angle correction value of the current period. The method introduces a phase frequency decoupling module into an enhanced phase-locked loop structure, the phase frequency decoupling module is used for distinguishing a transient state stage and a steady state stage of a system phase lock by setting a voltage phase angle error threshold value, the phase-locked loop works with different system parameters in two different stages, when the phase angle error is greater than the voltage phase angle error threshold value, the phase frequency decoupling module judges that the system is in the transient state stage of the phase lock, namely the system is in a starting stage or under the condition that a power grid to be tested is subjected to strong interference to cause transient phase lock loss, the coupling of phase angle and frequency is removed at the moment, the system maintains an original locked voltage frequency detection value to execute rapid phase lock, the voltage phase angle detection value can rapidly converge to the vicinity of the steady state, and the phase angle error is gradually reduced; when the phase angle error is smaller than the set threshold value, the phase frequency decoupling module judges that the system enters a steady state stage, at the moment, the coupling relation between the phase angle and the frequency is restored again, the phase angle steady state error is eliminated by correcting the voltage frequency detection value, and accurate phase locking and frequency locking are completed. The method solves the problem that the existing phase-locked loop causes the frequency detection value to generate larger fluctuation and easily causes phase angle locking delay under the condition that the frequency is not changed because the phase angle or amplitude of the power grid is suddenly changed.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic flow chart of a power grid synchronization detection method based on a single-phase-locked loop according to an embodiment of the present invention;
fig. 2 is a schematic diagram illustrating a principle of a power grid synchronization detection method based on a single-phase-locked loop according to an embodiment of the present invention;
fig. 3 is a schematic diagram of a response performance simulation test result of the fast phase-locked loop according to the embodiment of the present invention;
fig. 4 is a schematic diagram illustrating an experimental result of a fast phase-locked loop according to an embodiment of the present invention;
fig. 5 is a schematic diagram illustrating a principle that the fast phase-locked loop provided in the first embodiment of the present invention is applied to a single-phase grid-connected inverter device.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Fig. 1 schematically illustrates a flow chart of a power grid synchronization detection method based on a single-phase-locked loop according to an embodiment of the present invention, and fig. 2 schematically illustrates a principle of the power grid synchronization detection method based on the single-phase-locked loop according to an embodiment of the present invention; the fast single-phase-locked loop for grid-connected control is described in detail below with reference to fig. 1 and fig. 2, and the phase-locked loop can enhance the stability and anti-interference capability of frequency detection and improve the response speed of phase locking within a preset frequency locking range.
As shown in fig. 1, the method mainly comprises the following steps:
and 103, determining a voltage frequency detection value and a voltage phase angle detection value of the current period according to the voltage frequency adjustment value, and adjusting the voltage phase angle detection value according to the voltage amplitude detection value to obtain a voltage phase angle correction value of the current period.
Before step 101, a schematic diagram of the power grid synchronization detection method based on the single-phase-locked loop provided in fig. 2 needs to be introduced, as shown in fig. 2, the phase-locked loop includes two loops, namely an amplitude-locked loop and a phase-locked loop, which are coupled to each other.
As shown in fig. 2, before step 101, a voltage sampling module collects a grid voltage signal at a fixed sampling frequency to obtain a voltage input signal v; and thirdly, according to the voltage fundamental wave detection value v 'determined in the last period of the current period, enabling v-v' to obtain a voltage error value e of the current period.
And theta ' is a voltage phase angle detection value obtained by the phase-locked loop in the previous period, and a voltage amplitude error value delta A of the current period is determined according to the multiplication of a voltage error value e of the current period and a sine value sin theta ' of the voltage phase angle detection value theta '.
The voltage amplitude error value of the current period passes through a first gain module k1And obtaining the voltage amplitude detection value a of the current period after the operation of the first integrator, it should be noted that, in the embodiment of the present invention, the first gain module k1The method has the characteristic of self-adaptation, has no relation with the magnitude of a voltage input signal, has good portability, and is beneficial to digital implementation. Furthermore, the integration starting point of the first integrator is zero, i.e. the initial value of the voltage amplitude detection value a is zero.
After the voltage amplitude detection value a of the current cycle is determined, it can be said that the amplitude-locked loop completes all operations of the current cycle.
Further, the phase-locked loop in fig. 2 needs to be calculated, and it should be noted that, in the embodiment of the present invention, before the phase-locked loop is calculated, a threshold determination needs to be performed on the voltage amplitude detection value a acquired in the amplitude-locked loop, where the purpose of the voltage amplitude threshold determination is to avoid a singular operation error or a memory overflow problem in the next division operation.
In the embodiment of the invention, a voltage amplitude threshold A is presetT10% of the peak value of the voltage input signal v. For example, if the voltage input signal V ranges from-100V to +100V, the voltage amplitude threshold ATMay be set to 1V. It should be noted that, in the embodiment of the present invention, the range of the voltage amplitude threshold may also be selected according to actual needs.
As shown in fig. 2, in step 101, when the absolute value of the voltage amplitude detection value of the current cycle is determined to be greater than the voltage amplitude threshold value, that is, the voltage amplitude detection value a is determined to be greater than the voltage amplitude threshold value aTOr the voltage amplitude detection value A is smaller than the negative voltage amplitude threshold value ATIn the meantime, the voltage phase angle error value Δ θ of the current period may be obtained by dividing the voltage amplitude detection value a by the voltage error value e and then multiplying by the cosine value cos θ 'of the voltage phase angle detection value θ'.
It should be noted that, when it is determined that the absolute value of the voltage amplitude detection value of the current cycle is smaller than the voltage amplitude threshold, that is, it is determined that the voltage amplitude detection value a is smaller than the voltage amplitude threshold aTOr the voltage amplitude detection value A is larger than the negative voltage amplitude threshold value ATThen, the voltage phase angle error value Δ θ of the current period may be made equal to zero.
In the embodiment of the invention, the voltage phase angle error value delta theta is an input value of a proportional-integral controller of the phase-locked loop, and the proportional-integral controller is divided into two parts, namely a proportional link and an integral link.
In one case, the operation of the proportional element is as follows:
the voltage phase angle error value delta theta and the third gain module k3And multiplying to obtain the voltage phase angle adjusting value delta theta' of the current period.
In another case, the operation of the integration element is as follows:
it should be noted that, in the embodiment of the present invention, the integrating link includes a phase-frequency decoupling module, and the phase-frequency decoupling module is a key for improving the frequency detection stability and the phase-locked response speed of the fast phase-locked loop in the embodiment of the present invention. The contents of the phase-frequency decoupling module are as follows:
the program presets a voltage phase angle error threshold, and in the embodiment of the invention, the determination of the voltage corresponding error threshold is determined according to the following theory:
for the phase-locked loop structure provided by the embodiment of the invention, when the system parameter satisfies k1＝k3And k is2When the first gain module is equal to 0, that is, the first gain module is equal to the third gain module, and the second gain module is zero, the transfer function of the voltage fundamental wave detection value v' to the voltage input signal v in the s domain can be expressed as follows:
when the system decouples the phase angle and the frequency, the system parameters can satisfy the above conditions, and the phase-locked system can be characterized by the linear transfer function of the formula (1). Therefore, according to the phase-frequency characteristic of equation (1), the relationship between the steady-state phase angle error of the system and the grid frequency deviation can be expressed as follows:
wherein, ω is0The frequency is a standard frequency value of the power grid, and omega is the frequency of the power grid to be measured. According to the formula (2), the maximum fluctuation range of the steady state phase angle error of the system can be calculated according to the maximum frequency deviation range of the power grid to be measured, so that the voltage phase angle error threshold value delta theta is determinedT. The smaller the threshold value is set, the narrower the frequency locking range of the system is, the faster the response speed of the phase locking system is, and the better the frequency detection stability is, so that the frequency detection stability can be flexibly adjusted according to actual needs.
The frequency deviation limit value is +/-0.2 Hz under the normal operation condition of the power system; when the system capacity is small, the deviation limit can be relaxed to ± 0.5 Hz. The embodiment of the invention presets a voltage phase angle error threshold delta thetaT0.15rad, the frequency locking range of the threshold value corresponding to the formula (2) is +/-5 Hz, namely the output of the frequency range of 45Hz to 55HzThe signal can be input to complete the quick phase locking, and the power grid signal detection requirement is met.
After the voltage phase angle error threshold is determined, the voltage frequency adjustment value of the current cycle can be determined according to the magnitude relationship between the voltage phase angle error threshold and the voltage phase angle error value.
Specifically, when it is determined that the absolute value of the voltage phase angle error value is greater than the voltage phase angle error threshold, i.e., the voltage phase angle error value Δ θ is less than the voltage phase angle error threshold Δ θTAnd the voltage phase angle error value delta theta is greater than the negative voltage phase angle error threshold value delta thetaTThen, the voltage frequency adjustment value of the previous cycle is determined as the voltage frequency adjustment value Δ ω' of the current cycle.
When it is determined that the absolute value of the voltage phase angle error value is less than the voltage phase angle error threshold, i.e., the voltage phase angle error value Δ θ is greater than the voltage phase angle error threshold Δ θTAnd the voltage phase angle error value delta theta is less than the negative voltage phase angle error threshold value delta thetaTWhile the phase angle error value delta theta is passed through the second gain module k2And the voltage frequency adjustment value delta omega' of the current period is determined after the operation of the second integrator.
It should be noted that, in the embodiment of the present invention, the second gain module k2The method has the characteristic of self-adaptation, has no relation with the magnitude of a voltage input signal, has good portability, and is beneficial to digital implementation. Furthermore, the integration start point of the second integrator is zero, i.e., the initial value of the frequency adjustment value Δ ω' is zero.
The phase-frequency decoupling module provided by the embodiment of the invention distinguishes the transient state stage and the steady state stage of the phase locking of the system by setting the voltage phase angle error threshold value, so that the phase-locked loop works with different system parameters in two different stages, on one hand, the system can maintain the originally locked voltage frequency detection value to execute rapid phase locking, the voltage phase angle detection value can rapidly converge to the vicinity of the steady state, and the phase angle error is gradually reduced; on the other hand, the phase angle steady-state error can be eliminated, and accurate phase locking and frequency locking are completed.
After the voltage frequency adjustment value Δ ω' of the current cycle is determined, the voltage frequency detection value ω may be further determined' and the voltage phase angle detection value theta ', specifically, according to the determined voltage frequency adjustment value delta omega ' and the power grid standard frequency value omega0Adding to obtain a voltage frequency detection value omega' of the current period; and adding the phase angle adjustment value delta theta ' and the voltage frequency detection value omega ', and obtaining the voltage phase angle detection value theta ' of the current period after the operation of a third integrator.
It should be noted that, in the embodiment of the present invention, the third gain module k3The method has the characteristic of self-adaptation, has no relation with the magnitude of a voltage input signal, has good portability, and is beneficial to digital implementation. Furthermore, the integration starting point of the third integrator is pi/2, namely the initial value of the voltage phase angle detection value theta' is pi/2.
Further, according to the determined voltage amplitude detection value and voltage phase angle detection value, the voltage phase angle detection value is adjusted, specifically including:
if the voltage amplitude detection value A is smaller than zero, determining the phase reversal angle of the voltage phase angle detection value theta 'as the voltage phase angle correction value theta' of the current period, namely theta '-theta' + pi or theta '-theta' -pi; if the voltage amplitude detection value A is larger than zero, the voltage phase angle detection value theta ' of the current period is equal to the voltage phase angle correction value theta ', namely theta is equal to theta '.
It should be noted that after the voltage phase angle correction value θ ″ is determined, it may be determined that the phase-locked loop completes all operations in the current cycle, and further, the voltage amplitude detection value a in the current cycle is multiplied by the sine value sin θ 'of the voltage phase angle detection value θ' in the current cycle, so as to obtain the voltage fundamental wave detection value v 'in the current cycle, that is, it is determined that the voltage fundamental wave detection value v' in the current cycle may be applied to the next cycle.
Fig. 3 is a schematic diagram of a test result of response simulation of a fast phase-locked loop according to an embodiment of the present invention, as shown in fig. 3, a model first gain module k1A third gain module k3444, second gain block k2Take 49298 the standard voltage frequency value ω0Take 50 Hz. The parameters of the traditional enhanced phase-locked loop model as a comparison group are consistent with the fast phase-locked loop of the invention. To verify the embodiments of the present inventionEffectively, pi/2 phase angle mutation is introduced into a sinusoidal voltage input signal at the simulation time of 0.1s, and the voltage waveform tracking, phase angle difference and frequency detection value test results of the rapid phase-locked loop with the phase-frequency decoupling module are compared with those of the traditional enhanced phase-locked loop without the phase-frequency decoupling module. The test result shows that the phase-locked response speed of the rapid phase-locked loop provided by the embodiment of the invention is higher, the overshoot of the frequency detection value is far smaller than that of the traditional enhanced phase-locked loop, and the anti-jamming capability is stronger.
Fig. 4 is a schematic diagram of an experimental result of the fast phase-locked loop according to the embodiment of the present invention, in which a sinusoidal curve is an input signal for simulating a voltage of a power grid, and a triangular wave signal is a phase angle output value. The phase locking program is operated on an experimental platform based on a floating point type DSP chip (TMS320F28335), and the sampling frequency is 20 kHz. The zero moment is the starting moment of the phase locking program, the 40ms moment is the simulation power grid phase angle sudden change point, and the phase angle sudden change value is pi/2. An experimental result shows that the rapid phase-locked loop provided by the embodiment of the invention can complete locking 10ms after being started; after the phase angle jump has occurred, it can relock over a period of about 15 ms.
In order to more clearly introduce the power grid synchronous detection method based on the single-phase-locked loop provided by the embodiment of the present invention, the following describes in detail the application of the power grid synchronous detection method based on the single-phase-locked loop, by taking fig. 5 as an example:
as shown in fig. 5, the example apparatus samples grid voltage and grid-connected current in real time using voltage and current sensors, and performs analog-to-digital conversion on the current and voltage sampling signals simultaneously using an AD module; then, a digital signal processor applies the rapid phase-locked loop provided by the embodiment of the invention to realize synchronous tracking detection of the voltage of the power grid, and calculates real-time reference current according to the grid-connected output power required by the device; and finally, calculating duty ratios required by pulse width modulation of four power switching tubes of the inverter bridge by the current controller according to the current error signals, and driving the inverter bridge to output grid-connected current with the same frequency and phase as the voltage of the power grid.
In summary, an embodiment of the present invention provides a power grid synchronization detection method based on a single-phase-locked loop, including: when the absolute value of the voltage amplitude detection value of the current period is determined to be larger than the voltage amplitude threshold value, determining a voltage phase angle error value of the current period according to the voltage error value and cosine values of the voltage amplitude detection value and the voltage phase angle detection value; according to the relation between the absolute value of the voltage phase angle error value and the voltage phase angle error threshold, determining the voltage frequency adjustment value of the previous period as the voltage frequency adjustment value of the current period or determining the phase angle error value as the voltage frequency adjustment value of the current period after the operation of a second gain module and a second integrator, wherein the integral starting point of the second integrator is zero; and determining a voltage frequency detection value and a voltage phase angle detection value of the current period according to the voltage frequency adjustment value, and adjusting the voltage phase angle detection value according to the voltage amplitude detection value to obtain a voltage phase angle correction value of the current period. The method introduces a phase frequency decoupling module into an enhanced phase-locked loop structure, the phase frequency decoupling module is used for distinguishing a transient state stage and a steady state stage of a system phase lock by setting a voltage phase angle error threshold value, the phase-locked loop works with different system parameters in two different stages, when the phase angle error is greater than the voltage phase angle error threshold value, the phase frequency decoupling module judges that the system is in the transient state stage of the phase lock, namely the system is in a starting stage or under the condition that a power grid to be tested is subjected to strong interference to cause transient phase lock loss, the coupling of phase angle and frequency is removed at the moment, the system maintains an original locked voltage frequency detection value to execute rapid phase lock, the voltage phase angle detection value can rapidly converge to the vicinity of the steady state, and the phase angle error is gradually reduced; when the phase angle error is smaller than the set threshold value, the phase frequency decoupling module judges that the system enters a steady state stage, at the moment, the coupling relation between the phase angle and the frequency is restored again, the phase angle steady state error is eliminated by correcting the voltage frequency detection value, and accurate phase locking and frequency locking are completed. The method solves the problem that the existing phase-locked loop causes the frequency detection value to generate larger fluctuation and easily causes phase angle locking delay under the condition that the frequency is not changed because the phase angle or amplitude of the power grid is suddenly changed.
As will be appreciated by one skilled in the art, embodiments of the present invention may be provided as a method, system, or computer program product. Accordingly, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
While preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all such alterations and modifications as fall within the scope of the invention.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.
Claims (8)
1. A power grid synchronous detection method based on a single-phase-locked loop is characterized by comprising the following steps:
when the absolute value of the voltage amplitude detection value of the current period is determined to be larger than the voltage amplitude threshold value, determining a voltage phase angle error value of the current period according to the voltage error value and cosine values of the voltage amplitude detection value and the voltage phase angle detection value;
according to the relation between the absolute value of the voltage phase angle error value and a voltage phase angle error threshold value, determining the voltage frequency adjustment value of the previous period as the voltage frequency adjustment value of the current period or determining the phase angle error value as the voltage frequency adjustment value of the current period after the operation of a second gain module and a second integrator, wherein the integral starting point of the second integrator is zero;
determining a voltage frequency detection value and a voltage phase angle detection value of the current period according to the voltage frequency adjustment value, and adjusting the voltage phase angle detection value according to the voltage amplitude detection value to obtain a voltage phase angle correction value of the current period;
the relationship between the absolute value of the voltage phase angle error value and the voltage phase angle error threshold specifically includes:
when the absolute value of the voltage phase angle error value is determined to be larger than the voltage phase angle error threshold value, determining that the voltage frequency adjustment value of the current period is equal to the voltage frequency adjustment value of the previous period;
and when the absolute value of the voltage phase angle error value is smaller than the voltage phase angle error threshold value, determining the phase angle error value as the voltage frequency adjustment value of the current period after the operation of a second gain module and a second integrator.
2. The grid synchronization detection method according to claim 1, wherein the adjusting the voltage phase angle detection value according to the voltage amplitude detection value to obtain a voltage phase angle correction value of a current cycle specifically comprises:
if the voltage amplitude detection value is less than zero, determining the reverse angle of the voltage phase angle detection value as the voltage phase angle correction value of the current period; or
And if the voltage amplitude detection value is larger than zero, determining the voltage phase angle detection value as the voltage phase angle correction value of the current period.
3. The grid synchronization detection method according to claim 1, wherein before determining the voltage frequency detection value and the voltage phase angle detection value of the current cycle, the method further comprises:
and multiplying the voltage phase angle error value by a third gain module to obtain a voltage phase angle adjusting value of the current period.
4. A power grid synchronization detection method according to claim 3, wherein the determining the voltage frequency detection value and the voltage phase angle detection value of the current cycle according to the voltage frequency adjustment value specifically comprises:
determining a voltage frequency detection value of the current period according to the voltage frequency adjustment value and the power grid standard frequency value;
adding the voltage phase angle adjusting value and the frequency detection value, and obtaining a voltage phase angle detection value of the current period through operation of a third integrator; the starting point of the integration of the third integrator is pi/2.
5. The grid synchronization detection method of claim 1, wherein prior to determining the voltage phase angle error value for the current cycle, further comprising:
determining the voltage error value of the current period according to the voltage input signal of the current period and the voltage fundamental wave detection value obtained in the last period;
determining a voltage amplitude error value of the current period according to the voltage error value and a voltage phase angle detection value obtained in the previous period;
the voltage amplitude error value is calculated through a first gain module and a first integrator to obtain the voltage amplitude detection value of the current period; the starting point of the integration of the first integrator is zero.
6. The grid synchronization detection method according to claim 1, wherein when it is determined that the absolute value of the voltage amplitude detection value of the current cycle is greater than the voltage amplitude threshold, the method further comprises:
and when the absolute value of the voltage amplitude detection value is smaller than the voltage amplitude threshold value, determining that the phase angle error value is zero.
7. The grid synchronization detection method according to claim 1, further comprising, after obtaining the voltage phase angle correction value for the current cycle:
and multiplying the sine value of the voltage amplitude detection value and the voltage phase angle detection value to obtain the voltage fundamental wave detection value of the current period.
8. The grid synchronization detection method according to claim 1, wherein the voltage phase angle error threshold is 0.15 rad.
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