CN105591647A - Phase change restraining method and device in network voltage synchronization algorithm SRF-PLL - Google Patents

Abstract

The inhibition problem become for voltage-phase kick in network voltage synchronized algorithm SRF-PLL, the present invention provides a kind of new solution, become inhibition device by increasing a phase jumping newly on the phase angle feedback loop of original SRF-PLL algorithm, component under the dq rotating reference frame of Park transformation output in SRF-PLL With the output phase angle of SRF-PLL Become the input signal for inhibiting device as phase jumping, phase jumping becomes the output signal for inhibiting device As the rotation angle of Park transformation, when detecting When, phase jumping becomes the output signal for inhibiting device , and work as and detect When, phase jumping becomes the output signal for inhibiting device , the present invention can effectively eliminate input voltage phase angle kick become to phaselocked loop output result negative effect, and have the characteristics that structure is simple, calculation amount is small, fast response time, it is versatile, be generally applicable to all SRF-PLL algorithms.

Description

Phase jumping in a kind of line voltage synchronized algorithm SRF-PLL becomes inhibition method and device

Technical field

The present invention relates to power inverter control field, particularly relate to the electricity in line voltage synchronized algorithm SRF-PLLPress phase jumping to become inhibition problem.

Background technology

Numerous need to be with the grid-connected occasion being connected of electrical network, as active power filtering, PWM rectifier, uninterrupted power source andNew distribution type power supplys etc., in order to control grid-connected power inverter (English full name: grid-connectedpowerConverters) make the operation of itself and synchronized, the information such as amplitude, frequency and phase place that all must detection of grid voltage, carryGet line voltage synchronizing signal. The extracting method of line voltage synchronizing signal affects the property of control system to a certain extentCan, and then affect the effect that is incorporated into the power networks of whole system.

What existing line voltage simultaneous techniques adopted mostly is digital phase-locked loop (English full name: phaselockedLoop, PLL). As shown in Figure 1, it is by phase discriminator (English full name: phasedetect, PD), loop filter for the structural frames of phaselocked loopRipple device (English full name: loopfilter, LF) and voltage controlled oscillator (English full name: voltage-controlledOscillator, VCO) three part compositions. The output signal that PD module produces is proportional to input signal v and PLL output signal v 'Between phase angle difference, in PD output signal, high-frequency ac component is accompanied by direct current phase angle deviation signal and occurs together, concrete feelingsCondition because of the type of PD different. LF module has low-frequency filter characteristics, can weaken the high-frequency ac component in PD output, typicalLF module can be made up of low-pass first order filter or PI (English full name: proportionalintegral) controller. VCO mouldAn AC signal of piece output, the frequency of this signal is with respect to given centre frequency ω_cMove, be LF provide defeatedEnter voltage signal v_lfFunction. In the time of loop-locking, the phase difference of input signal v and voltage controlled oscillator output signal v ' is zero.

At present, conventional phaselocked loop is based on reference synchronization coordinate system (English full name: synchronousreferenceframe, SRF)PLL (referred to as: SRF-PLL), as shown in Figure 2, wherein, the PD module of SRF-PLL is occurred by orthogonal signalling its typical structureDevice (English full name: QuadratureSignalGenerator, QSG) and Park conversion two parts composition, the key of this algorithmIt is the quadrature component how obtaining under α β rest frame. To monophase system, Conventionally adopt second order improper integral device (English full name: second-ordergeneralizedintegrator, SOGI) or fromAdapt to trapper (English full name: adaptivenotchfilter, ANF) as QSG; And for three-phase system, i.e. v_a＝U_mcos(θ)、v_b＝U_mcos(θ-120°)、v_c＝U_mCos (θ+120 °), adopts Clarke to convert or Complex Transfer-function canObtain easily the quadrature component under α β rest frame. No matter be monophase system or three-phase system, the α β obtaining is staticQuadrature component under coordinate system meets following formula:

$\left\{\begin{array}{c}{v}_{\mathrm{\α}}=U_{m}cos\left(\mathrm{\θ}\right)\\ v_{\mathrm{\β}}=U_{m}sin\left(\mathrm{\θ}\right)\end{array}\right.$

After Park conversion, obtain the component V under dq rotary reference coordinate system_dAnd V_qAs follows:

$\left\{\begin{array}{c}{v}_d=U_{m}cos(\mathrm{\θ}-{\mathrm{\θ}}^{\′})\\ v_q=U_{m}sin(\mathrm{\θ}-{\mathrm{\θ}}^{\′})\end{array}\right.$

Wherein, θ ' is the anglec of rotation of dq coordinate system.

Be zero by closed-loop control by q axle Variable Control again, make the anglec of rotation θ ' of dq coordinate system equal α β static coordinateThe phase angle theta of the lower input voltage vector of system, when stable state, under dq rotary reference coordinate system, d axle component has just represented the width of input voltageValue, and the phase angle of input voltage is determined by closed loop output.

Due to the impact of the factor such as load or thunder and lightning, as a kind of typical fault, line voltage phase angle kick has and sends out while changeRaw. In addition, at the initial working stage (English full name: thestart-upstage) of phaselocked loop, the initial phase angle the unknown of electrical network,In phaselocked loop, the initial phase angle of the original state of integrator and electrical network is inconsistent, also can produce the phenomenon that similar phase angle kick becomes. AndFor pll system, because output frequency and phase angle are in the same circuit, phase angle sudden change will inevitably cause frequency fluctuation, this forMost of loads are all unallowed; Meanwhile, output amplitude is also subject to the impact of phase angle sudden change, can cause that synchronization output signal occursThe phenomenon of long-time persistent oscillation. This unfavorable factor will affect the performance of phase-lock-loop algorithm, even causes grid-connected change when seriousParallel operation overvoltage or overcurrent damage.

Although relevant document and technology become the negative effect of phase-locked effect have been proposed to some inhibition for phase angle kickMeasure, but often there is the problems such as response speed is slow, complex structure, amount of calculation is large, versatility is not strong.

For example, in existing document [1], introduced Adaptive Integral COEFFICIENT K_i, when the phase angle error detecting hour,Make K_iIncrease, accelerate system response time; And in the time that phase angle error is larger, make K_iReduce, thereby reduce phase angle sudden change to output frequentlyThe impact of rate, system oscillation reduces. And in practical application, this method can make response speed slow down.

Again for example, in existing document [2], for three-phase pll system, by the increase link that feedovers, calculate in real time phaseAngle error, and with the centre frequency ω in this alternative phaselocked loop_c, can improve response speed, overcome the impact of phase angle saltus step. NoCross, because needs carry out Park conversion again and calculate arctan function, operand increases, and realizes comparatively complicated.

Existing document:

[1]Karimi-GhartemaniM，KhajehoddinSA，JainPK，etal.ProblemsofstartupandphasejumpsinPLLsystems[J].IEEETransactionsonPowerElectronics，2012，27(4)：1830-1838.

[2]LiccardoF，MarinoP，RaimondoG.Robustandfastthree-phasePLLtrackingsystem[J].IEEETransactionsIndustrialElectronics，2011，58(1)：221-231.

Summary of the invention

The shortcoming of prior art in view of the above, the object of the invention is to provides one to change for SRF-PLL algorithmEnter method, become and cause negative to Phase-Locked Synchronous result for solving in line voltage Phase-Locked Synchronous process input voltage phase angle kickThe problem that face rings.

For achieving the above object and other relevant objects, the invention provides following technical scheme:

Phase jumping in line voltage synchronized algorithm SRF-PLL becomes an inhibition method, and described inhibition method comprises: obtainGet the output phase angle of the phaselocked loop based on reference synchronization coordinate system; And obtain in the phase discriminator of described phaselocked loop and become through ParkComponent of voltage value corresponding to d axle under the dq rotary reference coordinate system of getting in return, judges the size of described component of voltage value: if described inComponent of voltage value is less than zero, described phase angle is increased to an angle π, and is exported; If described component of voltage value is greater than orEqual zero, described phase angle is not done to change, directly exported.

In addition, the present invention also provides the phase jumping in a kind of line voltage synchronized algorithm SRF-PLL to become restraining device,Comprise: phase angle addition unit, obtain the output phase angle of the phaselocked loop based on reference synchronization coordinate system, described phase angle is increased to oneAngle π, and exported; Phasing unit, connects described phase angle addition unit, obtains the lock based on reference synchronization coordinate systemMutually ring output phase angle and in the phase discriminator of described phaselocked loop, convert d axle pair under the dq rotary reference coordinate system obtaining through ParkThe component of voltage value of answering, is judging that described component of voltage value is less than at 1 o'clock, gives the Output rusults of described phase angle addition unitOutput, directly exports described phase angle and be more than or equal at 1 o'clock in described component of voltage value.

In addition, the present invention also provides a kind of phaselocked loop based on reference synchronization coordinate system, at least comprises phase discriminator, loopWave filter and voltage controlled oscillator, and a phase angle backfeed loop is set between described voltage controlled oscillator and phase discriminator, and described phaseAngle backfeed loop comprises above-mentioned restraining device.

As mentioned above, the present invention at least has following beneficial effect: the present invention can be multiple at not obvious increase algorithm structureUnder the prerequisite of assorted degree and amount of calculation, effectively solve because input line voltage phase angle kick becomes the Phase Locked Loop Synchronization output letter causingNumber long-time oscillation problem, and the present invention is generally applicable to all SRF-PLL algorithms.

Brief description of the drawings

Fig. 1 is shown as the schematic diagram of a kind of digital phase-locked loop in prior art.

Fig. 2 is shown as a kind of phaselocked loop typical structure schematic diagram based on reference synchronization coordinate system in prior art.

Fig. 3 is shown as in the present invention the realization of the inhibition method of SPA sudden phase anomalies stream in a kind of line voltage Phase-Locked Synchronous processCheng Tu.

Fig. 4 is shown as in the present invention the principle of the restraining device of SPA sudden phase anomalies in a kind of line voltage Phase-Locked Synchronous processFigure.

Fig. 5 is shown as restraining device and is applied in the schematic diagram in SRF-PLL.

Fig. 6 a is shown as the voltage-tracing waveform effect that does not add apparatus of the present invention in the time that the initial phase angle of reference signal is 135 °Figure.

Fig. 6 b is shown as the voltage-tracing waveform effect figure that adds apparatus of the present invention in the time that the initial phase angle of reference signal is 135 °.

Fig. 7 a is shown as the voltage-tracing waveform effect that does not add apparatus of the present invention in the time that the initial phase angle of reference signal is 185 °Figure.

Fig. 7 b is shown as the voltage-tracing waveform effect figure that adds apparatus of the present invention in the time that the initial phase angle of reference signal is 185 °.

Element numbers explanation

40 phase jumpings become restraining device

401 phase angle addition unit

402 phasing unit

S10～S302 step

Detailed description of the invention

Below, by specific instantiation explanation embodiments of the present invention, those skilled in the art can be by this descriptionDisclosed content is understood other advantages of the present invention and effect easily. The present invention can also be by other different concrete realityThe mode of executing is implemented or is applied, and the every details in this description also can, based on different viewpoints and application, not deviate fromUnder spirit of the present invention, carry out various modifications or change. It should be noted that, in the situation that not conflicting, following examples and enforcementFeature in example can combine mutually.

It should be noted that, the diagram providing in following examples only illustrates basic structure of the present invention in a schematic wayThink, satisfy and only show with assembly relevant in the present invention in graphic but not component count, shape and size while implementing according to realityDraw, when its actual enforcement, kenel, quantity and the ratio of each assembly can be a kind of random change, and its assembly layout kenel alsoMay be more complicated.

In view of problems of the prior art, the present invention proposes a kind of new method on the basis of SRF-PLL, and object existsBecomes the negative effect to Phase-Locked Synchronous result in suppressing input voltage phase angle kick, not obvious increase algorithm structure complexity withUnder the prerequisite of amount of calculation, effectively solve while becoming due to input line voltage phase angle kick the Phase Locked Loop Synchronization output signal length causingBetween oscillation problem.

Incorporated by reference to Fig. 2, in SRF-PLL, the actual input ε of PI controller and amplitude output V are respectively:

ε＝v_a＝U_msin(θ-θ′)＝U_msin(Δθ)

V＝|v_d|＝|U_mcos(θ-θ′)|

Wherein, θ and U_mBe respectively phase angle and the amplitude of input reference signal, the output phase angle that θ ' is PLL.

When θ-θ ' ∈ (0, pi/2] time, ε > 0, v_d> 0, after PI regulates, θ ' increase, Δ θ reduces, and V is to leveling off to U_mSideTo variation, reach very soon equalization point Δ θ=0. When θ-θ ' ∈ (pi/2, π] time, ε > 0, v_d< 0, after PI regulates, θ ' increase, Δθ reduces, and V changes to leveling off to 0 direction, will cause vibration. When θ-θ ' ∈ (π, 3 pi/2s] time, ε < 0, v_d< 0, regulates through PIAfter, θ ' increases little, and Δ θ increases, and V changes to leveling off to 0 direction, will cause vibration. When θ-θ ' ∈ (3 pi/2s, 2 π] time, ε < 0, v_d> 0, after PI regulates, θ ' reduces, and Δ θ increases, and V is to leveling off to U_mDirection change, reach very soon equalization point Δ θ=0.

In conjunction with above-mentioned analysis, work as v_dWhen < 0,Will be in the 2nd quadrant or the 3rd quadrant, V is to leveling off to 0 sideTo variation, afterwards, Δ θ enters the 1st quadrant or the 4th quadrant, and V is again to leveling off to U_mDirection change, therefore, will cause and shakeSwing.

Referring to Fig. 3, is the inhibition method of SPA sudden phase anomalies in a kind of line voltage Phase-Locked Synchronous process, and the method can be wrappedDraw together following performing step:

Step S10, obtains the output phase angle of the phaselocked loop based on reference synchronization coordinate system;

Step S20, obtains in the phase discriminator of described phaselocked loop and converts d under the dq rotary reference coordinate system obtaining through ParkThe component of voltage value that axle is corresponding;

Step S30, judges the size of described component of voltage value;

Step S301, if described component of voltage value is less than zero, increases an angle π to described phase angle, and is exported;

Step S302, if described component of voltage value is more than or equal to zero, does not do to change to described phase angle, and directly givesOutput.

By the method in above-mentioned Fig. 3, v can detected_dWhen < 0, the output phase angle of voltage controlled oscillator is increased to oneIndividual angle π, makes phase angle error enter the 1st quadrant or the 4th quadrant, thereby reaches fast equalization point; And detect and work as v_d>=0 o'clock,Need not do extra change to the output phase angle of voltage controlled oscillator, directly feedback is as coordinate synchronous rotary angle.

The order that should be appreciated that above-mentioned steps S10-S302 is not intended to limit the method enforcement order, just for justIn explanation technical scheme set, for example, between step S10 and step S20, can carry out simultaneously or step S20 in front realityExecute.

Further, please again referring to Fig. 4, for becoming, suppresses a kind of phase jumping in line voltage synchronized algorithm SRF-PLLThe schematic diagram of device, as shown in the figure, phase jumping becomes restraining device 40 and comprises phase angle addition unit 401 and phasing unit402, wherein, phase angle addition unit 401 is suitable for obtaining the output phase angle of the phaselocked loop based on reference synchronization coordinate system, to described phaseAngle increases an angle π, and is exported; Phasing unit 402 connects phase angle addition unit 401, is suitable for obtaining based on sameStep reference frame phaselocked loop output phase angle and in the phase discriminator of phaselocked loop, convert through Park the dq rotary reference obtainingThe component of voltage value that under coordinate system, d axle is corresponding, is judging that component of voltage value is less than the output by phase angle addition unit 401 in 1 o'clock knotFruit is exported, and directly exports described phase angle and be more than or equal at 1 o'clock in component of voltage value.

In concrete enforcement, aforementioned phase jumping can be become to restraining device 40 and be applied to existing based on reference synchronization coordinateIn the phaselocked loop of system, thereby obtain a kind of new phaselocked loop, as shown in Figure 5.

Particularly, for verifying aforementioned the present invention program's validity, on the single-phase SRF-PLL basis providing at Fig. 2, with defeatedThe initial phase angle that enters reference signal is the Phase Tracking ability that example is tested this algorithm at the 2nd, 3 quadrants respectively. Wherein, adoptSOGI is as orthogonal signal generator, and its transfer function is:

$Q\left(s\right)=\frac{v_{\mathrm{\&alpha;}}}{v}\left(s\right)=\frac{{\mathrm{k\&omega;}}^{\&prime;}s}{s^2+{\mathrm{k\&omega;}}^{\&prime;}s+{\mathrm{\&omega;}}^{\&prime;2}}$

$Q\left(s\right)=\frac{v_{\mathrm{\&beta;}}}{v}\left(s\right)=\frac{{\mathrm{k\&omega;}}^{\&prime;2}}{s^2+{\mathrm{k\&omega;}}^{\&prime;}s+{\mathrm{\&omega;}}^{\&prime;2}}$

The centre frequency ω ' of SOGI is made as to 314rad/s, and coefficient k is taken as 4.5.

The transfer function that phaselocked loop is corresponding is:

$\frac{{\mathrm{\&theta;}}^{\&prime;}\left(s\right)}{\mathrm{\&theta;}\left(s\right)}=\frac{2{\mathrm{\&xi;\&omega;}}_{n}s+{\mathrm{\&omega;}}_n^2}{s^2+2{\mathrm{\&xi;\&omega;}}_{n}s+{\mathrm{\&omega;}}_n^2}$

Wherein, ${\mathrm{\&omega;}}_n=\sqrt{k_i},\mathrm{\&xi;}=k_p/\left(2\sqrt{k_i}\right).$

Get ω_nFor 314rad/s, ξ is 0.707; Initial PLL controller phase angle is made as to 0 simultaneously. Fig. 6 a and Fig. 6 b provideThe experimental waveform of the initial phase angle of reference signal while being 135 °. As shown in the figure, become restraining device if do not add phase jumping, synchronousTime be about 4 cycles (see Fig. 6 a), and PLL output voltage amplitude has more greatly and falls, increase phase jumping and become after restraining device,Being about 2 cycles lock in time (sees Fig. 6 b). Fig. 7 a and Fig. 7 b have provided experiment ripple when the initial phase angle of reference signal is 185 °Shape. Become restraining device if do not add phase jumping, PLL output there will be vibration situation (Fig. 7 a), increasing phase jumping becomes and suppressAfter device, (Fig. 7 b) to be about 2 cycles lock in time. For the situation of reference signal phase angle random mutation, obviously with initially openIt is consistent when moving stage phase angle is unknown. As can be seen here: become restraining device by newly-increased phase jumping and can effectively suppress phase angle kickThe impact becoming, and can not increase extra amount of calculation. It should be noted that Vref is in Fig. 6 a, Fig. 6 b, Fig. 7 a and Fig. 7 bThe reference voltage waveform of phaselocked loop input, Vout is Phase Locked Loop Synchronization output voltage waveforms.

Obviously, no matter be the SRF-PLL algorithm of three-phase system or the SRF-PLL algorithm of monophase system, or unreasonablyThink the SRF-PLL algorithm of electrical network operating mode, the method is all generally suitable for.

In sum, the present invention is directed to based on reference synchronization coordinate system phase-lock-loop algorithm (SRF-PLL) because of input electrical network electricityPress phase angle kick to become the output oscillation problem causing, provide a kind of new inhibition method, by the phase at original SRF-PLL algorithmOn the backfeed loop of angle, a newly-increased phase jumping becomes restraining device, the dq rotary reference coordinate of Park conversion output in SRF-PLLThe output phase angle theta of component Vd and SRF-PLL under system ' become the input signal of restraining device as phase jumping, phase jumping change presses downThe output signal of device processedAs the anglec of rotation of Park conversion, when V being detected_dWhen < 0, phase jumping change restraining deviceOutput signalAnd when V being detected_d>=0 o'clock, phase jumping became the output signal of restraining deviceEnergy of the present inventionEffectively eliminate input voltage phase angle kick and become the negative effect to phaselocked loop Output rusults, and have simple in structure, amount of calculation is little,Fast response time, highly versatile, be generally applicable to the features such as all SRF-PLL algorithms. So the present invention has effectively overcome existingVarious shortcoming in technology and tool high industrial utilization.

Above-described embodiment is illustrative principle of the present invention and effect thereof only, but not for limiting the present invention. Any ripeThe personage who knows this technology all can, under spirit of the present invention and category, modify or change above-described embodiment. CauseThis, have in technical field under such as conventionally know the knowledgeable do not depart under disclosed spirit and technological thought completeAll equivalences that become are modified or change, and must be contained by claim of the present invention.

Claims (3)

1. the phase jumping in line voltage synchronized algorithm SRF-PLL becomes an inhibition method, it is characterized in that described inhibition sideMethod comprises:

Obtain the output phase angle of the phaselocked loop based on reference synchronization coordinate system; And

Obtain in the phase discriminator of described phaselocked loop and convert voltage corresponding to d axle under the dq rotary reference coordinate system obtaining through ParkComponent value, judges the size of described component of voltage value:

If described component of voltage value is less than zero, described phase angle is increased to an angle π, and exported;

If described component of voltage value is more than or equal to zero, described phase angle is not done to change, directly exported.

2. the phase jumping in line voltage synchronized algorithm SRF-PLL becomes a restraining device, it is characterized in that, comprising:

Phase angle addition unit, obtains the output phase angle of the phaselocked loop based on reference synchronization coordinate system, and described phase angle is increased to oneAngle π, and exported;

Phasing unit, connects described phase angle addition unit, obtains the output phase of the phaselocked loop based on reference synchronization coordinate systemAngle and convert component of voltage corresponding to d axle under the dq rotary reference coordinate system obtaining through Park in the phase discriminator of described phaselocked loopValue, judging that described component of voltage value is less than at 1 o'clock, is exported the Output rusults of described phase angle addition unit, and describedComponent of voltage value is more than or equal at 1 o'clock and directly exports described phase angle.

3. the phaselocked loop based on reference synchronization coordinate system, at least comprises phase discriminator, loop filter and voltage controlled oscillator, itsBe characterised in that: a phase angle backfeed loop is set between described voltage controlled oscillator and phase discriminator, and described phase angle backfeed loop bagA kind of phase jumping of drawing together in line voltage synchronized algorithm SRF-PLL claimed in claim 2 becomes restraining device.