CN111179873A - Shutdown noise reduction circuit, shutdown noise reduction chip and display device - Google Patents
Shutdown noise reduction circuit, shutdown noise reduction chip and display device Download PDFInfo
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- CN111179873A CN111179873A CN202010102112.3A CN202010102112A CN111179873A CN 111179873 A CN111179873 A CN 111179873A CN 202010102112 A CN202010102112 A CN 202010102112A CN 111179873 A CN111179873 A CN 111179873A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/02—Details of power systems and of start or stop of display operation
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/02—Details of power systems and of start or stop of display operation
- G09G2330/021—Power management, e.g. power saving
Abstract
The invention discloses a shutdown noise reduction circuit, a shutdown noise reduction chip and a display device, relates to the technical field of display, and solves the problem of high noise in the shutdown process of the display device. The main technical scheme of the invention is as follows: the method comprises the following steps: the power management module is used for outputting a grid opening voltage and a grid closing voltage; the level conversion module is used for receiving the grid opening voltage and the grid closing voltage, converting the grid opening voltage and the grid closing voltage into panel grid driving time sequence voltage, and pulling the panel grid driving time sequence voltage to a high level in a shutdown state; and the selection module is used for reducing the current value of the grid opening voltage when the display device is in a shutdown state, and directly sending the grid opening voltage to the level conversion module when the display device is in a display state.
Description
Technical Field
The invention relates to the technical field of display, in particular to a shutdown noise reduction circuit, a shutdown noise reduction chip and a display device.
Background
The liquid crystal display device can generate shutdown noise when being shut down again, and the shutdown noise is mainly generated by the following reasons: the display device is provided with an MLCC (Multi-layer ceramic capacitors) for voltage stabilization, the MLCC has piezoelectric property, when the voltage changes, mechanical kinetic energy is generated, the MLCC is deformed, and then vibration of the circuit board is driven, and if the vibration is in a frequency band (20 Hz-20 kHz) which can be heard by human ears, the sound can be identified by the human ears. At the moment of shutdown, the display device starts the XON function, and at this moment, the panel extracts a large number of signals, and pulls the voltage of the signals input to the display panel to the VGH (direct current high voltage) level, which causes the level of the signals output by the power management module to decrease instantly, so that the MLCC generates noise, which leads to poor user experience, and therefore how to reduce the shutdown noise of the display device is an urgent technical problem to be solved by those skilled in the art.
In the prior art, in order to avoid generating noise by the MLCC, the power down speed is slowed down mainly by increasing the capacitance value of the MLCC, and then the voltage difference of the instant power down is reduced, however, the number of the MLCCs needs to be increased in this way, so that the cost is reduced, and meanwhile, the area of the circuit board is increased due to the increase of the number of the MLCCs, and then the cost of the circuit board is increased. Meanwhile, the accommodation of the MLCC is rapidly attenuated along with the applied voltage, so that the effect of the MLCC is greatly reduced, and in addition, a short-circuit protection mechanism is caused under the condition that too much capacitance is added in the circuit by part of the power management modules, so that the display device cannot be started.
Disclosure of Invention
In view of this, embodiments of the present invention provide a shutdown noise reduction circuit, a shutdown noise reduction chip and a display device, and mainly aim to reduce shutdown noise of the display device.
In one aspect, an embodiment of the present invention provides a shutdown noise reduction circuit, where the shutdown noise reduction circuit includes:
the power management module is used for outputting a grid opening voltage and a grid closing voltage;
the level conversion module is used for receiving the grid opening voltage and the grid closing voltage, converting the grid opening voltage and the grid closing voltage into a panel grid driving time sequence voltage, and pulling the panel grid driving time sequence voltage to a high level in a shutdown state;
the grid voltage is transmitted to the level conversion module through the selection module, the selection module is used for reducing the current value of the grid opening voltage when the display device is in a shutdown state, and the grid opening voltage is directly transmitted to the level conversion module when the display device is in a display state.
The object of the present invention and the technical problems solved thereby can be further achieved by the following technical measures.
Specifically, the selection module includes a first control circuit and a second control circuit, the first control circuit is configured to reduce a current value of the gate-on voltage, the second control circuit is configured to directly transmit the gate-on voltage to the level conversion module, the selection module includes a shutdown operating state and a display operating state, when the selection module is in the shutdown operating state, the selection module controls the gate-on voltage to pass through the first control circuit, and when the selection module is in the display operating state, the selection module controls the gate-on voltage to pass through the second control circuit.
Specifically, the first control circuit comprises a first switch and at least one current-limiting resistor which are connected in series, one end of the first control circuit is connected to the power management module, the other end of the first control circuit is connected to the level conversion module, the second control circuit comprises a second switch, one end of the second switch is connected to the power management module, and the other end of the second switch is connected to the level conversion module.
Specifically, the method further comprises the following steps: and the detection module is used for detecting the state of the display device and respectively sending a state signal to the selection module and the level conversion module.
Specifically, the detection module is used for being connected with a preset circuit, the detection module is used for detecting the output voltage of the preset circuit, and when the output voltage is reduced to a preset voltage value, the detection module sends a shutdown working state signal to the selection module and the level conversion module respectively.
Specifically, the method further comprises the following steps: and one end of the voltage division module is connected to the preset circuit, the other end of the voltage division module is connected to the detection module, and the voltage division module is used for reducing the voltage value of the output voltage and sending the voltage value to the detection module.
Specifically, the voltage dividing module includes a first voltage dividing resistor and a second voltage dividing resistor, one end of the first voltage dividing resistor is connected to the preset circuit, the other end of the first voltage dividing resistor is connected to the second voltage dividing resistor, one end of the second voltage dividing resistor, which is not connected to the first voltage dividing resistor, is grounded, an output port of the voltage dividing module is disposed between the first voltage dividing resistor and the second voltage dividing resistor, and the output port is connected to the detecting module.
Specifically, the method further comprises the following steps: the time sequence control module is connected with the level conversion module, the time sequence control module is used for sending a panel grid control time sequence to the level conversion module, and the level conversion module is used for converting the grid opening voltage and the grid closing voltage into the panel grid driving time sequence voltage according to the panel grid control time sequence.
In another aspect, an embodiment of the present invention further provides a shutdown noise reduction chip, where the shutdown noise reduction chip includes: the display device comprises a selection module, wherein one end of the selection module is used for being connected with a power management module, the other end of the selection module is used for being connected with a level conversion module, the selection module is used for sending the grid voltage to the level conversion module, the selection module is used for reducing the current value of the grid starting voltage when the display device is in a shutdown state, and the grid starting voltage is directly sent to the level conversion module when the display device is in a display state.
The object of the present invention and the technical problems solved thereby can be further achieved by the following technical measures.
Specifically, the method further comprises the following steps: and the detection module is used for detecting the state of the display device and sending a state signal to the selection module.
On the other hand, an embodiment of the present invention further provides a display device, including: the shutdown noise reduction circuit of any one of the above.
According to the shutdown noise reduction circuit, the shutdown noise reduction chip and the display device provided by the embodiment of the invention, the power management module can supply power to the display device, can generate various voltages to supply power to different modules, the voltages generated by the power management module comprise a grid opening voltage (namely VGH) and a grid closing Voltage (VGL), and the VGH and the VGL are input into the level conversion module and are converted into a panel grid driving time sequence voltage for display of the display panel after passing through the level conversion module. In a normal display state, the panel gate driving timing voltage (GOA timing output voltage) is a timing voltage that is an alternating voltage of VGH and VGL, and supplies power to the GOA circuit of the display device. When the display device is in a shutdown working state, all the output voltages of the GOA time sequences are high voltages so as to shut down the display device. This application is through setting up the selection module, and the selection module is under the shutdown state, and control VGH is provided with current-limiting resistor in the first control circuit through first control circuit, and current-limiting resistor can reduce the electric current through first control circuit and be worth the size, and level conversion module pulls high level with whole GOA chronogenesis output voltage of output simultaneously for display panel closes, can't show. When the display device is in a display state, the selection module controls the VGH to pass through the second control circuit, the second control circuit can directly transmit the VGH to the level conversion module, the level conversion module cannot start an XON function, and meanwhile, the GOA time sequence output voltage is sent to a GOA circuit of the display panel to provide voltage for the display panel.
The foregoing description is only an overview of the technical solutions of the present invention, and in order to make the technical solutions of the present invention more clearly understood and to implement them in accordance with the contents of the description, the following detailed description is given with reference to the preferred embodiments of the present invention and the accompanying drawings.
Drawings
Fig. 1 is a schematic structural diagram of a shutdown noise reduction circuit according to an embodiment of the present invention;
fig. 2 is another schematic structural diagram of a shutdown noise reduction circuit according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a shutdown noise reduction circuit according to an embodiment of the present invention;
fig. 4 is a schematic diagram of another structure of a shutdown noise reduction circuit according to an embodiment of the present invention;
fig. 5 is another schematic structural diagram of a shutdown noise reduction circuit according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of a shutdown noise reduction circuit according to an embodiment of the present invention;
fig. 7 is a schematic diagram of another structure of a shutdown noise reduction circuit according to an embodiment of the present invention;
fig. 8 is a schematic structural diagram of a shutdown noise reduction circuit provided in the prior art.
Reference numerals and descriptions:
the circuit comprises a power management module 1, a level conversion module 2, a selection module 3, a first control circuit 31, a first switch 311, a current limiting resistor 312, a second control circuit 32, a second switch 321, a control unit 33, a detection module 4, a first sub-detection module 41, a second sub-detection module 42, a voltage division module 5 and a time sequence control module 6.
Detailed Description
To further illustrate the technical means and effects of the present invention adopted to achieve the predetermined objects, the following detailed description will be given to the specific implementation, structure, features and effects of the shutdown noise reduction circuit, the shutdown noise reduction chip and the display device according to the present invention with reference to the accompanying drawings and preferred embodiments.
In one aspect, as shown in fig. 1 to 7, an embodiment of the present invention provides a shutdown noise reduction circuit, including: the power management module 1, the power management module 1 is used for outputting a grid opening voltage and a grid closing voltage; the level conversion module 2 is used for receiving the grid opening voltage and the grid closing voltage, converting the grid opening voltage and the grid closing voltage into a panel grid driving time sequence voltage, and pulling the panel grid driving time sequence voltage to a high level in a shutdown state; in the shutdown mode, the voltage of the panel grid driving time sequence voltage is pulled to a high level; the display device comprises a selection module 3, one end of the selection module 3 is connected with the power management module 1, the other end of the selection module is connected with the level conversion module 2, the grid opening voltage is sent to the level conversion module 2 through the selection module 3, the selection module 3 is used for reducing the current value of the grid opening voltage when the display device is in a shutdown state, and the grid opening voltage is directly sent to the level conversion module 2 when the display device is in a display state.
The power management module 1 may be a PMIC chip, which may supply power to each module of the display device, and the PMIC may provide a gate-on Voltage (VGH) and a gate-off Voltage (VGL). VGH and VGL send to level shift module 2 (levelshift), level shift module 2 changes VGH and VGL into panel gate drive time sequence voltage (GOA time sequence output voltage), GOA time sequence output voltage is the GOA circuit power supply in the display panel, when display device normally shows, display device is in the display mode this moment promptly, level shift module 2 is output panel gate drive time sequence voltage, panel gate drive time sequence voltage is the signal of high-low level alternation this moment, when display device shuts down, display device is in the shutdown state, level shift module 2 starts the XON function, all pull output panel gate drive time sequence voltage to high level, make display device shut down. In the prior art, taking a GOA product as an example, as shown in fig. 8, a shutdown circuit includes a PMIC and a levelshifter, when a display device is shutdown and the levelshifter pulls a GOA timing output voltage to a high level, a large amount of current needs to be drawn from the PMIC, which causes a VGH voltage output by the PMIC to be instantly reduced, and the instantaneous current is suddenly increased, which causes MLCCs on a circuit board to generate mechanical energy, which causes the circuit board to deform and generate noise. As shown in fig. 1, other schematic diagrams are not shown, one end of the MLCC is connected between the PMIC and the level shift module 2, and the other end is grounded. In order to avoid generating noise by the MLCC, the power failure speed is slowed down mainly by increasing the capacitance value of the MLCC, so that the voltage difference of instant power failure is reduced, and the instant current is reduced. Meanwhile, the capacitance of the MLCC is quickly attenuated along with the applied voltage, which results in a large reduction in the MLCC effect, and in addition, a short-circuit protection mechanism is caused when too much capacitance is added to a circuit in part of the power management module 1, which causes the display device to fail to start up. According to the application, the selection module 3 is added in the shutdown noise reduction circuit, and the selection module 3 can reduce the current drawn by the level conversion module 2 from the power management module 1 when the display device is in a shutdown state, so that the VGH current is reduced, and further the MLCC can be prevented from generating mechanical energy, and the circuit board is prevented from being deformed to generate noise. The selection module 3 only reduces the current value of the gate-on voltage in the power-off state, but does not reduce the current value of the gate-on voltage in the display state, thereby not affecting the power-on of the display panel. If the voltage of VGH is still reduced by the selection module 3 in the display state, the VGH level is unstable (ripple is too large), and the picture quality during normal display is affected.
The object of the present invention and the technical problems solved thereby can be further achieved by the following technical measures.
Specifically, as shown in fig. 2 and 7, the selection module 3 includes a first control circuit 31 and a second control circuit 32, the first control circuit 31 is configured to reduce a current value of the gate-on voltage, the second control circuit 32 is configured to directly transmit the gate-on voltage to the level shifter module 2, the selection module 3 includes a shutdown operation state and a display operation state, when the selection module 3 is in the shutdown operation state, the selection module 3 controls the gate-on voltage to pass through the first control circuit 31, and when the selection module 3 is in the display operation state, the selection module 3 controls the gate-on voltage to pass through the second control circuit 32.
The selection module 3 controls the working state of the selection module according to the state of the display device, that is, when the display device is in the shutdown state, the selection module 3 is in the shutdown working state, and when the display device is in the display state, the selection module 3 is in the display working state. When the display operation state is performed, the VGH output by the power management module 1 passes through the second control circuit 32, the second control circuit 32 does not perform any processing on the VGH, and the VGH is directly transmitted to the level shift module 2, in the display operation state, the panel gate driving timing voltage output by the level shift module 2 is used for the display panel to display, and in this state, the display panel normally displays. In the shutdown operation state, the selection module 3 controls the VGH to pass through the first control circuit 31, and the first control circuit 31 reduces the current of the VGH, that is, the pumping current from the power management module 1 when the display panel is shutdown is reduced, so that the MLCC can be prevented from generating mechanical energy.
Specifically, as shown in fig. 2 and fig. 7, the first control circuit 31 includes a first switch 311 and at least one current limiting resistor 312 connected in series, one end of the first control circuit 31 is connected to the power management module 1, and the other end is connected to the level conversion module 2, and the second control circuit 32 includes a second switch 321, one end of the second switch 321 is connected to the power management module 1, and the other end is connected to the level conversion module 2.
At least one current limiting resistor 312 is disposed in the first control circuit 31, and the current limiting resistor 312 can limit the current of the circuit where the current limiting resistor 312 is located, wherein when the number of the current limiting resistors 312 is multiple, the multiple current limiting resistors 312 are connected in series. Specifically, the selection module 3 includes a control unit 33, the first control circuit 31 includes a first switch 311, and the first switch 311 is connected in series with at least one current limiting resistor 312. The second control circuit 32 is a conductive path without any current-limiting component, the second control circuit 32 is only provided with a second switch 321, when the selection module 3 is in the shutdown working state, the control unit 33 controls the first switch 311 to be closed, the second switch 321 is opened, so that the first control circuit 31 is in the on state, and the second control circuit 32 is in the open state, when the selection module 3 is in the display working state, the control unit 33 controls the first switch 311 to be opened, the second switch 321 is closed, so that the first control circuit 31 is in the open state, and the second control circuit 32 is in the on state. In addition, the number of the first switches 311 may be plural, the plural first switches 311 are connected in parallel, only one first switch 311 is closed, the first control circuit 31 can be in the on state, the plural first switches 311 are provided, and after a failure occurs in one of the first switches 311, the other first switches 311 can also cause the first control circuit 31 to be in the on state. Similarly, the number of the second switches 321 may also be multiple, and multiple second switches 321 are arranged in parallel.
Specifically, as shown in fig. 1 to 7, the method further includes: and the detection module 4 is used for detecting the state of the display device and respectively sending the state signals to the selection module 3 and the level conversion module 2.
The detection module 4 can detect the state of the display device, the state of the display device includes a display state and a shutdown state, after the detection module 4 sends the shutdown state information to the selection module 3 and the level conversion module 2, the level conversion module 2 starts the XON mode, and all the panel gate driving time sequence voltages output by the level conversion module 2 are pulled to a high level, so that the display device is shut down, meanwhile, the selection module 3 controls the VGH output by the power management module 1 to pass through the first control circuit 31, and the first control circuit 31 reduces the current of the VGH. The detecting modules 4 have a plurality of setting manners, one of which is that, as shown in fig. 1 and fig. 2, the number of the detecting modules 4 is one, and the detecting modules are respectively connected with the selecting module 3 and the level converting module 2. In another arrangement, as shown in fig. 3, the detecting module 4 includes a first sub-detecting module 41 and a second sub-detecting module 42, both the first sub-detecting module 41 and the second sub-detecting module 42 are used for detecting the state of the display device, the first sub-detecting module 41 is connected to the selecting module 3, and the second sub-detecting module 42 is connected to the level shifting module 2.
Specifically, the detection module 4 is configured to be connected to a preset circuit, the detection module 4 is configured to detect an output voltage of the preset circuit, and when the output voltage is reduced to a preset voltage value, the detection module 4 sends a shutdown operation state signal to the selection module 3 and the level conversion module 2, respectively.
In a shutdown state, the voltage of the preset circuit may change, where the preset circuit may be a digital power supply circuit (DVDD), the output voltage of the DVDD is 3.3V in a normal display state, the detection module 4 is connected to an output port of the preset circuit, the detection module can detect the voltage of the output port, that is, can detect the output voltage, set the preset voltage value to 2.7V, and in the shutdown state, after the DVDD voltage drops to 2.7V, the detection module 4 determines that the display device enters the shutdown state, where the DVDD is connected to the power management module 1 and the power management module 1 supplies power to the DVDD. In addition, the preset circuit may also be a power conversion module, wherein one end of the power conversion module is connected to the power management module 1, the power management module 1 supplies power to the power conversion module, and the power conversion module is configured to convert a power supply into a power supply for the display panel, wherein the voltage output by the power conversion module to the display panel is VIN voltage, and the VIN voltage is equal to the output voltage of the power conversion module, and in a shutdown state, the VIN voltage drops to a preset voltage value, where VIN of a TV product is 12V, VIN of an MNT product is 5V, and VIN of an NB product is 3.3V, and no more enumeration is performed here, and the preset voltage value corresponding to the VIN voltage may be set by a research and development staff, and the preset voltage value corresponding to DVDD may also be set by the research and development staff.
Specifically, as shown in fig. 1, 3 to 6, the method further includes: voltage division module 5, voltage division module 5 one end is connected in predetermineeing the circuit, and the other end is connected to detection module 4, and voltage division module 5 is used for reducing output voltage's magnitude of voltage and sends detection module 4.
Wherein, the voltage dividing module 5 can convert the voltage of the output port into a low voltage, and send the low voltage to the detecting module 4, for example, when the preset circuit is DVDD, the output voltage is 3.3V in the display state, and the shutdown detecting module 4 on the market determines that the reference voltage of the display device in the shutdown state is 1.2V, that is, when the existing detecting module 4 detects that the voltage input to the detecting module 4 is reduced to 1.2V, it can determine that the display device is in the shutdown state, and the voltage dividing module 5 can reduce the output voltage of the DVDD and send the reduced voltage to the detecting module 4, wherein, when the voltage value of the DVDD is reduced to the preset voltage value, the preset voltage value is 2.7V, and through the voltage dividing module 5, the voltage dividing module 5 reduces the preset voltage to the reference voltage, the reference voltage is 1.2V, therefore, when the voltage of the DVDD is reduced to 2.7V, the voltage value detected by the detecting module 4 is 1.2V, the level shift module 2 can start the XON function, and the selection module 3 controls the VGH to pass through the first control circuit 31, so that the voltage division module 5 is arranged to shorten the voltage reduction time of the DVDD, and further shorten the shutdown time of the display device. If the voltage division module 5 is not arranged, the DVDD voltage is directly applied to the detection module 4, but in the prior art, the reference voltage value of the detection module 4 is 1.2V, the XON function can be started only when the DVDD voltage is reduced from 3.3V to 1.2V, and the XON function can be started only when the DVDD voltage is reduced from 3.3V to 2.7V, so the time required by shutdown can be shortened. In addition, if the shutdown time is to be shortened, so that the detection module 4 turns on the XON function when the DVDD voltage is reduced to 2.7V, the detection module 4 needs to be additionally developed, which increases the product cost. The above embodiment is also applicable to the case where the predetermined circuit is the power conversion module and the output voltage is VIN.
Specifically, the voltage dividing module 5 includes a first voltage dividing resistor and a second voltage dividing resistor, one end of the first voltage dividing resistor is connected to the preset circuit, the other end of the first voltage dividing resistor is connected to the second voltage dividing resistor, the end of the second voltage dividing resistor not connected to the first voltage dividing resistor is grounded, an output port of the voltage dividing module 5 is disposed between the first voltage dividing resistor and the second voltage dividing resistor, and the output port is connected to the detecting module 4.
Wherein the first voltage dividing resistor has a resistance value of R1The resistance value of the second divider resistor is R2And referring to the above embodiment, the predetermined voltage value is U12.7V, reference voltage U2The preset voltage value has the following relation between the reference voltages as 1.2V: u shape1×(R2/(R1+R2))＝U2From this, R can be derived2＝U2R1/(U1-U2) When U is formed1＝2.7V，U2When R is 1.2V, R2＝0.8R1. The number of the first voltage-dividing resistor and the second voltage-dividing resistor is not limited, and the first voltage-dividing resistor and the second voltage-dividing resistor can be set according to requirementsAnd (4) placing.
In addition, as shown in fig. 6, the first sub-detection module 41 and the selection module 3 constitute a shutdown noise reduction chip, and the second sub-detection module 42 and the level conversion module 2 are integrated in a levelshifter. As shown in fig. 4, the selection module 3 may be disposed in the same chip as the power management module 1, that is, the selection module 3 is integrated into the conventional PMIC, or as shown in fig. 5, the detection module 4, the selection module 3 and the level conversion module 2 are disposed in the same chip, that is, the selection module 3 is integrated into the conventional Levelshifter. In addition, as shown in fig. 7, the control unit 33, the first sub-detection module 4, the first switch 311, and the second switch 321 are integrated in the shutdown noise reduction chip, and the current limiting resistor 312 is independent of the shutdown noise reduction chip, so that the resistance of the current limiting resistor 312 can be conveniently adjusted to adapt to different characteristics of the display panel.
Specifically, the method further comprises the following steps: the sequential control module 6 is connected with the level conversion module 2, the sequential control module 6 is used for sending a panel grid control sequential to the level conversion module 2, and the level conversion module 2 is used for converting a grid opening voltage and a grid closing voltage into a panel grid driving sequential voltage according to the panel grid control sequential.
The timing control module can output a panel gate control timing (GOA timing), wherein a GOA timing signal is a logic voltage of 0-3.3V, the level conversion module 2 outputs VGH when the logic voltage value is 3.3V, and the level conversion module outputs VGL when the output voltage value of the level conversion module 2 is 0V. In the shutdown state, the level shift module 2 pulls all the signals of the VGH and VGL alternating to VGH.
The shutdown noise reduction circuit in the application is suitable for GOA products and also suitable for GateIC products.
On the other hand, as shown in fig. 7, an embodiment of the present invention further provides a shutdown noise reduction chip, including:
and one end of the selection module 3 is used for being connected with the power management module, the other end of the selection module is used for being connected with the level conversion module, the selection module is used for sending the grid voltage to the level conversion module, the selection module is used for reducing the current value of the grid starting voltage when the display device is in a shutdown state, and the grid starting voltage is directly sent to the level conversion module when the display device is in a display state.
The selection module 3 can reduce the current drawn by the level conversion module 2 from the PMIC when the display device is in the off state, so that the VGH current is reduced, and further, the MLCC can be prevented from generating mechanical energy, thereby preventing the circuit board from being deformed and generating noise. The selection module 3 only reduces the current value of the gate-on voltage in the power-off state, but does not reduce the current value of the gate-on voltage in the display state, thereby not affecting the power-on of the display panel. If the voltage of VGH is still reduced by the selection module 3 in the display state, the VGH level is unstable (ripple is too large), and the picture quality during normal display is affected. The shutdown noise reduction chip and the PMIC can be arranged on a circuit board together. The object of the present invention and the technical problems solved thereby can be further achieved by the following technical measures.
Specifically, the method further comprises the following steps: and the detection module 4 is used for detecting the state of the display device and sending the state signal to the selection module 3.
The detection module 4 and the selection module 3 may be jointly disposed on the shutdown noise reduction chip, the detection module 4 may be connected to the selection module 3 only, and only the state information of the display device is sent to the selection module 3, at this time, another detection module 4 needs to be disposed, and the detection module 4 is connected to the level conversion module 2. And a detection module is arranged in the corresponding level, and the detection module is used for detecting state information and sending the state information to the level so that the level can start the XON function. In addition, the detection module 4 can also be connected to the selection module 3 and the level conversion module 2 at the same time, and send the state information of the display device to the selection module 3 and the level conversion module 2 at the same time.
In addition, the selection module 4 of the shutdown noise reduction chip includes a control unit 33, a first control circuit 31 and a second control circuit 32, the first control circuit 31 includes a first switch 311 and at least one current-limiting resistor 312 connected in series, one end of the first control circuit 31 is connected to the power management module 1, and the other end is connected to the level conversion module 2, the second control circuit 32 includes a second switch 321, one end of the second switch 321 is connected to the power management module 1, and the other end is connected to the level conversion module 2, wherein the control unit 33 controls the first switch 311 or the second switch 321 to be closed according to the state of the display device.
In addition, as shown in fig. 7, the first control circuit 31 may include a first control switch, the second control circuit includes a second switch 321, one end of the first switch 311 is detachably connected to the current limiting resistor 312, and the other end of the first switch not connected to the current limiting resistor 312 is detachably connected to the level shift module 2 or the power management module. Therefore, the current limiting resistor 312 is independent of the shutdown noise reduction chip, and the model of the current limiting resistor 312 can be changed according to different display panels. When the display device is in the display state, the control unit 33 controls the VGH to pass through the second control circuit, and when the display device is in the shutdown state, the control unit 33 controls the VGH to pass through the current limiting resistor 312.
On the other hand, an embodiment of the present invention further provides a display device, including: the shutdown noise reduction circuit provided by any one of the above embodiments. Therefore, the present embodiment has the advantages of any of the above embodiments, and details are not described herein.
The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and all the changes or substitutions should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the appended claims.
Claims (11)
1. A shutdown noise reduction circuit, comprising:
the power management module is used for outputting a grid opening voltage and a grid closing voltage;
the level conversion module is used for receiving the grid opening voltage and the grid closing voltage, converting the grid opening voltage and the grid closing voltage into a panel grid driving time sequence voltage, and pulling the panel grid driving time sequence voltage to a high level in a shutdown state;
the grid voltage is transmitted to the level conversion module through the selection module, the selection module is used for reducing the current value of the grid opening voltage when the display device is in a shutdown state, and the grid opening voltage is directly transmitted to the level conversion module when the display device is in a display state.
2. The shutdown noise reduction circuit of claim 1,
the selection module comprises a first control circuit and a second control circuit, the first control circuit is used for reducing the current value of the grid starting voltage, the second control circuit is used for directly transmitting the grid starting voltage to the level conversion module, the selection module comprises a shutdown working state and a display working state, when the selection module is in the shutdown working state, the selection module controls the grid starting voltage to pass through the first control circuit, and when the selection module is in the display working state, the selection module controls the grid starting voltage to pass through the second control circuit.
3. The shutdown noise reduction circuit of claim 2,
the first control circuit comprises a first switch and at least one current-limiting resistor which are connected in series, one end of the first control circuit is connected to the power management module, the other end of the first control circuit is connected to the level conversion module, the second control circuit comprises a second switch, one end of the second switch is connected to the power management module, and the other end of the second switch is connected to the level conversion module.
4. The shutdown noise reduction circuit of claim 1,
further comprising: and the detection module is used for detecting the state of the display device and respectively sending a state signal to the selection module and the level conversion module.
5. The shutdown noise reduction circuit of claim 4,
the detection module is used for being connected with a preset circuit and detecting the output voltage of the preset circuit, and when the output voltage is reduced to a preset voltage value, the detection module sends a shutdown working state signal to the selection module and the level conversion module respectively.
6. The shutdown noise reduction circuit of claim 5,
further comprising: and one end of the voltage division module is connected to the preset circuit, the other end of the voltage division module is connected to the detection module, and the voltage division module is used for reducing the voltage value of the output voltage and sending the voltage value to the detection module.
7. The shutdown noise reduction circuit of claim 6,
the voltage dividing module comprises a first voltage dividing resistor and a second voltage dividing resistor, one end of the first voltage dividing resistor is connected to the preset circuit, the other end of the first voltage dividing resistor is connected to the second voltage dividing resistor, the end, which is not connected with the first voltage dividing resistor, of the second voltage dividing resistor is grounded, an output port of the voltage dividing module is arranged between the first voltage dividing resistor and the second voltage dividing resistor, and the output port is connected with the detection module.
8. The shutdown noise reduction circuit of claim 1,
further comprising: the time sequence control module is connected with the level conversion module, the time sequence control module is used for sending a panel grid control time sequence to the level conversion module, and the level conversion module is used for converting the grid opening voltage and the grid closing voltage into the panel grid driving time sequence voltage according to the panel grid control time sequence.
9. A shutdown noise reduction chip is characterized in that,
the display device comprises a selection module, wherein one end of the selection module is used for being connected with a power management module, the other end of the selection module is used for being connected with a level conversion module, the selection module is used for sending the grid voltage to the level conversion module, the selection module is used for reducing the current value of the grid starting voltage when the display device is in a shutdown state, and the grid starting voltage is directly sent to the level conversion module when the display device is in a display state.
10. The shutdown noise reduction chip of claim 1,
further comprising: and the detection module is used for detecting the state of the display device and sending a state signal to the selection module.
11. A display device, comprising:
the shutdown noise reduction circuit of any of claims 1 to 8.
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