CN111177059A - Data processing method and system based on formation and grading system - Google Patents

Data processing method and system based on formation and grading system Download PDF

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CN111177059A
CN111177059A CN201911282698.XA CN201911282698A CN111177059A CN 111177059 A CN111177059 A CN 111177059A CN 201911282698 A CN201911282698 A CN 201911282698A CN 111177059 A CN111177059 A CN 111177059A
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component
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CN111177059B (en
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魏显东
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Zhuhai Titans New Power Electronics Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10Program control for peripheral devices
    • G06F13/12Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/3004Arrangements for executing specific machine instructions to perform operations on memory
    • G06F9/30047Prefetch instructions; cache control instructions

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Abstract

The invention relates to a data processing method based on a chemical composition and content system, which comprises the steps of S10, generating a system instruction, and further sending the system instruction to a relay instruction cache; s20, receiving a system instruction and forwarding the instruction to an acquisition unit in a corresponding bus channel; s30, receiving a system instruction of the relay instruction cache, collecting component content data, executing a corresponding task according to the instruction, and uploading data to the relay data cache; and S40, receiving the component content data by the relay data cache, and further sending the data to the processing unit. A data processing system based on a component-content system comprises a processing module, a relay instruction module, an acquisition module and a relay data module. The invention can maximize the number of the extension bus channel butt joint UART ports, and further connect more acquisition units; the data obtained from the bus channel can be synchronously processed and synchronously displayed on the display interface, the data processing efficiency and the running speed of the CPU are effectively improved, and the use experience of a user is improved.

Description

Data processing method and system based on formation and grading system
Technical Field
The invention relates to the field of formation and grading systems, in particular to a data processing method and a data processing system based on the formation and grading system.
Background
The data processing method commonly used by the existing market for the formation and grading system is mainly realized based on a single chip microcomputer provided UART port switching 485 communication interface; because the UART ports of the processing chip are limited, the number of monitoring data acquisition modules which can be connected with a single device is correspondingly limited, and the requirement of accessing a large-scale monitoring module cannot be met.
For the above disadvantages, a general solution is to extend the UART port, so that although the extended port can be added to a certain extent, a new problem derives from the fact that the transceiving control of data is independently performed between every 485 channels, and the transceiving logic between the UART channels is not synchronous, thereby generating a large amount of repetitive control logic and simultaneously generating more waiting time delays; the phenomenon can obviously waste the computing resources of the CPU, thereby limiting the extension depth of the system; if these data need to be represented in the display interface, the following phenomena occur because of the asynchronism between the UART channels: some ports have already received 2 frames of data, while another port may not have received 1 frame of data successfully, which may result in the display interface not being able to update data synchronously, and the user experience is therefore affected.
Disclosure of Invention
In order to solve at least one of the technical problems in the prior art, an object of the present invention is to provide a data processing method and system based on a chemical component volume system, which achieve the technical effect of replacing the mode of collecting chemical component volume data by using a bus channel as an individual to perform longitudinal and then horizontal acquisition with the mode of using a collecting unit in each bus channel as an individual to perform transverse and then longitudinal acquisition.
The first aspect of the technical scheme adopted by the invention for solving the problems is a data processing method based on a component-content system, which comprises the following steps:
s10, generating a system instruction, and further sending the system instruction to a relay instruction cache;
s20, receiving the system instruction and forwarding the system instruction to an acquisition unit in a corresponding bus channel;
s30, receiving the system instruction cached by the relay instruction, acquiring component content data, executing a corresponding task according to the system instruction, and uploading data to a relay data cache;
and S40, the relay data cache receives the formation and grading data and further sends the data to a processing unit.
Has the advantages that: the number of UART ports which are butted by the expansion bus channel can be maximized, and more acquisition units are further connected; the data obtained from the bus channel can be synchronously processed and synchronously displayed on the display interface, the data processing efficiency and the running speed of the CPU are effectively improved, and the use experience of a user is improved.
According to the first aspect of the present invention, the S10 further includes: s11, generating the system instruction, setting an initial equipment number and a judgment interval, and further sending the system instruction to the bus channel; s12, judging whether the equipment number of the acquisition unit in the bus channel is the same as the initial equipment number, if so, carrying out the next step; if not, jumping to the next channel and repeating the step; jumping to S15 until all channels are judged to be finished; s13, judging whether the relay instruction cache corresponding to the bus channel has a storage space, if so, sending the system instruction to the corresponding relay instruction cache; if not, jumping to the next channel and re-executing S12; s14, judging whether the acquisition units with the same equipment numbers in all the bus channels have received the system instruction, if so, carrying out the next step, otherwise, jumping to the initial channel and re-executing S12; s15, judging whether the initial equipment number is the maximum value in the judgment interval, if so, ending S10; if not, the value is incremented by 1 and S12 is re-executed.
According to the first aspect of the present invention, the S40 further includes: s41, setting an initial equipment number and a judgment interval; s42, judging whether a unit which is the same as the initial equipment number exists in the acquisition units in the bus channel, and if so, carrying out the next step; if not, jumping to the next channel and repeating the step; until all channels are judged, jumping to S46; s43, judging whether the chemical component volume data acquired by the acquisition unit are completely read, if so, jumping to the next bus channel and executing S42 again; if not, the next step is carried out; s44, reading the component content data from the relay data cache corresponding to the bus channel; s45, judging whether the component content data are completely read, if so, jumping to the next bus channel and executing S42 again; if not, re-executing S44; s46, judging whether the data of the acquisition units with the same equipment number in the bus channel are completely read, if so, carrying out the next step; if not, jumping to the initial channel and executing S42 again; s47, judging whether the initial equipment number is the maximum value in the judgment interval, if so, ending S40; if not, the value is incremented by 1 and S42 is re-executed.
According to the first aspect of the present invention, there are at least 1 bus lane; the bus channel comprises at least 1 acquisition unit; the acquisition unit acquires the component and partial volume data of at least 1 battery; the bus channel supports up to 64 of the batteries.
According to the first aspect of the present invention, the bus lane corresponds to 1 relay data cache and 1 relay instruction cache, respectively.
According to the first aspect of the present invention, the system instruction includes an acquisition unit start, an acquisition unit stop, an acquisition unit pause, a parameter configuration, and a system upgrade.
According to the first aspect of the present invention, the composition/capacity data includes a battery voltage, a battery current, a battery impedance, a consumed power, a battery temperature, and an ambient pressure.
The second aspect of the technical scheme adopted by the invention to solve the problems is as follows: a data processing system based on a component capacity grading system comprises the following modules:
the processing module is used for generating a system instruction and further sending the system instruction to the relay instruction module;
the relay instruction module is connected with the processing module to realize interaction and is used for receiving the system instruction and forwarding the system instruction to the acquisition module in the corresponding bus channel;
the acquisition module is connected with the relay instruction module to realize interaction and is used for receiving the system instruction of the relay instruction module and acquiring component capacity data, further executing a corresponding task according to the system instruction and uploading the component capacity data to the relay data module; and
and the relay data module is connected with the acquisition module and the processing module to realize interaction, is used for receiving the formation and grading data and further sends the formation and grading data to the processing module.
According to a second aspect of the invention, the acquisition module comprises at least 1 acquisition unit.
Has the advantages that: the number of UART ports which are butted by the expansion bus channel can be maximized, and more acquisition units are further connected; the data obtained from the bus channel can be synchronously processed and synchronously displayed on the display interface, the data processing efficiency and the running speed of the CPU are effectively improved, and the use experience of a user is improved.
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FIG. 1 is a schematic flow diagram of a method according to a preferred embodiment of the present invention;
FIG. 2 is a schematic diagram of a module connection according to a preferred embodiment of the present invention;
FIG. 3 is a schematic illustration of a preferred embodiment A according to the present invention;
FIG. 4 is a schematic illustration of a preferred embodiment B1 according to the invention;
FIG. 5 is a schematic illustration of a preferred embodiment B2 according to the invention;
FIG. 6 is a schematic illustration of a preferred embodiment C1 according to the invention;
fig. 7 is a schematic diagram of a preferred embodiment C2 according to the invention.
Detailed Description
The conception, the specific structure and the technical effects of the present invention will be clearly and completely described in conjunction with the embodiments and the accompanying drawings to fully understand the objects, the schemes and the effects of the present invention.
It should be noted that, unless otherwise specified, when a feature is referred to as being "fixed" or "connected" to another feature, it may be directly fixed or connected to the other feature or indirectly fixed or connected to the other feature. Furthermore, the descriptions of upper, lower, left, right, etc. used in the present disclosure are only relative to the mutual positional relationship of the constituent parts of the present disclosure in the drawings. As used in this disclosure, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. Furthermore, unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art. The terminology used in the description herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the term "and/or" includes any combination of one or more of the associated listed items.
It will be understood that, although the terms first, second, third, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element of the same type from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of the present disclosure. The use of any and all examples, or exemplary language ("e.g.," such as "or the like") provided herein, is intended merely to better illuminate embodiments of the invention and does not pose a limitation on the scope of the invention unless otherwise claimed; for convenience of illustration, the number of modules, units, channels, etc. shown in the embodiments and drawings referred to below are repeated and are not intended to limit the scope of the invention unless otherwise claimed.
Referring now to fig. 1, a schematic flow chart of a method according to a preferred embodiment of the present invention is shown, including the steps of: s10, generating a system instruction, and further sending the system instruction to the relay instruction cache; s20, receiving a system instruction and forwarding the system instruction to an acquisition unit in a corresponding bus channel; s30, receiving a system instruction of the relay instruction cache, collecting component content data, executing a corresponding task according to the system instruction, and uploading data to the relay data cache; and S40, receiving the component content data by the relay data cache, and further sending the data to the processing unit.
S10 further includes: s11, generating a system instruction, setting an initial equipment number and a judgment interval, and further sending the system instruction to the bus channel; s12, judging whether the equipment number of the acquisition unit in the bus channel is the same as the initial equipment number, if so, carrying out the next step; if not, jumping to the next channel and repeating the step; jumping to S15 until all channels are judged to be finished; s13, judging whether a storage space exists in a relay instruction cache corresponding to the bus channel, if so, sending a system instruction to the corresponding relay instruction cache; if not, jumping to the next channel and re-executing S12; s14, judging whether the acquisition units with the same equipment number in all the bus channels have received the system instruction, if so, carrying out the next step, otherwise, jumping to the initial channel and executing S12 again; s15, judging whether the initial equipment number is the maximum value in the judgment interval, if so, ending S10; if not, the value is incremented by 1 and S12 is re-executed.
S40 further includes: s41, setting an initial equipment number and a judgment interval; s42, judging whether a unit with the same number as the initial equipment exists in the acquisition units in the bus channel, and if so, carrying out the next step; if not, jumping to the next channel and repeating the step; until all channels are judged, jumping to S46; s43, judging whether the chemical component volume data collected by the collecting unit are completely read, if so, jumping to the next bus channel and executing S42 again; if not, the next step is carried out; s44, reading the formed capacity-sharing data from the relay data cache corresponding to the bus channel; s45, judging whether the component content data are completely read, if so, jumping to the next bus channel and executing S42 again; if not, re-executing S44; s46, judging whether the data of the acquisition units with the same equipment number in all the bus channels are completely read, if so, carrying out the next step; if not, jumping to the initial channel and executing S42 again; s47, judging whether the initial equipment number is the maximum value in the judgment interval, if so, ending S40; if not, the value is incremented by 1 and S42 is re-executed.
It should be noted that at least 1 bus channel exists; the bus channel comprises at least 1 acquisition unit, and the acquisition unit can deploy corresponding sensors or acquisition equipment according to the type of data acquired by actual needs; the acquisition unit can be deployed for at least 1 battery, and in an actual application scene, the deployment of the acquisition unit is correspondingly configured according to the upper limit of the bus channel support battery; the bus channel supports up to 64 batteries; each bus channel respectively corresponds to 1 relay data cache and 1 relay instruction cache, the relay data cache and the relay instruction cache jointly form a repeater, but information flows of the relay data cache and the relay instruction cache are not communicated; the system instructions include but are not limited to acquisition unit starting, acquisition unit closing, acquisition unit suspending, parameter configuration and system upgrading, and the setting and the variety of the system instructions are increased or decreased depending on the actual application environment; the formation capacity data including, but not limited to, battery voltage, battery current, battery impedance, power consumption, battery temperature, ambient pressure, the need to collect certain data, and the need to deploy certain specific equipment to collect such data, all depend on the actual application scenario.
Referring to fig. 2, a module connection diagram according to a preferred embodiment of the present invention is shown, which includes the following modules: the processing module is used for generating a system instruction and further sending the system instruction to the relay instruction module; the relay instruction module is connected with the processing module to realize interaction and is used for receiving the system instruction and forwarding the system instruction to the acquisition module in the corresponding bus channel; the acquisition module is connected with the relay instruction module to realize interaction and is used for receiving the system instruction of the relay instruction module and acquiring the component content data, and further executing a corresponding task according to the system instruction and uploading the component content data to the relay data module; the relay data module is connected with the acquisition module and the processing module to realize interaction, and is used for receiving the component content data and further sending the component content data to the processing module; the acquisition module comprises at least 1 acquisition unit.
Referring to fig. 3, a schematic diagram of a preferred embodiment a of the present invention is shown, where the embodiment a shows an 8 × 4 formation-capacity data acquisition system matrix, 8 RS485 bus channels are arranged in an acquisition end, and each bus channel manages 4 acquisition modules; each RS485 bus channel is provided with a separate relay data cache and a relay instruction cache; the repeater is connected with the single chip microcomputer through an SPI bus; 8 multiplied by 4 cache modules are distributed in the singlechip according to the acquisition end, each cache module is respectively composed of 1 data cache and 1 instruction cache, and the information storage and the acquisition end are in one-to-one correspondence; in the traditional mode, an RS485 bus channel is taken as an individual and data in the channel is uploaded in sequence, but because a bus data channel is limited, the former channels finish several rounds of data transmission, and the latter channels do not transmit successfully; according to the invention, the traditional longitudinal acquisition is replaced by transverse acquisition, the acquisition modules in each row are taken as individuals, data interaction of the acquisition modules in the first row in each RS485 bus channel is sequentially completed, and the second row is performed after the first row is completed, so that the technical effect of converting information asynchronous processing into synchronous processing is realized.
Assuming that the SPI bus speed is V1 bps, the RS485 bus communication rate is V2 bps, the SPI bus communication efficiency coefficient is set to u (0< u <1), the space size of the relay command buffer and the relay data buffer is m Byte, and T is the time for reading or sending one cycle of SPI polling, the maximum expandable RS485 bus port number N is calculated as follows:
T=(m*8)/(V2);
the time t1 of each time the SPI reads one relay buffer is (m × 8)/(V1 × u);
the time for reading the N relay buffers is t2 ═ t1 × N;
and T2 is less than or equal to T, and substituted into the formula, N < T2/T1 ═ int) ((m × 8)/V2)/((m × 8)/(V1 × u)), (int) V1 × u/V2;
suppose that: v1 ═ 10 Mbps; 115200bps for V2; m is 256 Bytes; u is 0.8;
then there are: n < (int)10M 0.8/115200 ═ (int)69.4444, yielding N ═ 69; the traditional method can support 5 RS485 bus channels at most, and the technical scheme can support 69 RS485 bus channels theoretically at most; in practical application, 30 RS485 bus channels are used as an optimal deployment scheme, and compared with the traditional technology, the efficiency of the deployment scheme is improved by 6 times.
Referring to fig. 4 and 5, schematic diagrams of a preferred embodiment B of the present invention are shown, where the embodiment B shows a process in which a single chip receives a system instruction and issues the system instruction to an acquisition unit in a corresponding bus channel.
FIG. 4 is a simplified system, in which only one row of acquisition modules is reserved for showing the hardware layout during the instruction issuing process; each RS485 bus channel is distributed with a corresponding instruction cache in the single chip microcomputer, issues the instruction to the relay instruction cache through the SPI bus, and then sends the instruction to the acquisition module in the corresponding matrix through the relay instruction cache.
Fig. 5 is a flowchart of steps for setting an initial device number X and setting a determination section, and further starting to transmit a system instruction to a device with X equal to 1; judging whether corresponding equipment exists in the RS485 bus channel 1, if so, carrying out the next step; if not, jumping to the next channel and repeating the step; until all channels are judged to be finished;
judging whether a storage space exists in a relay instruction cache corresponding to the bus channel, if so, sending a system instruction to the corresponding relay instruction cache, and simultaneously jumping to the next channel; if not, jumping to the next channel;
the relay instruction cache sends the system instruction to an acquisition module in a subordinate bus channel after receiving the system instruction;
judging whether the acquisition modules with the same equipment numbers in all the bus channels receive system instructions or not, if so, carrying out the next step, and if not, jumping to the initial channel and re-executing the steps;
judging whether the initial equipment number is the maximum value in the judgment interval or not, if so, finishing the sending of the system instruction; if not, adding 1 to the numerical value of the equipment number and executing the steps again.
Referring to fig. 6 and 7, schematic diagrams according to a preferred embodiment C of the present invention are shown, where the embodiment C shows a process in which an acquisition module uploads data to a single chip.
FIG. 6 is a simplified system, in which only one row of acquisition modules is reserved for displaying the hardware layout during uploading data; each RS485 bus channel is distributed with a corresponding data cache in the single chip microcomputer, the acquisition module sends acquired data to the relay data cache, and the relay data cache uploads the data to the data cache in the corresponding matrix of the single chip microcomputer through the SPI bus.
FIG. 7 is a flowchart illustrating steps for setting an initial device number Y and a decision interval, and notifying a device with the device number Y to transmit data back; receiving an interrupt signal for starting to acquire data by the relay data cache; starting data receiving; judging whether corresponding equipment exists in the RS485 bus channel 1 or not, and if so, carrying out the next step; if not, jumping to the next channel and repeating the step; until all channels have been determined;
judging whether the component capacity data in the corresponding equipment is completely read or not, and if so, skipping to the next bus channel; if not, the next step is carried out;
the acquisition module uploads the formed partial volume data to a relay data cache, and the formed partial volume data is read from the relay data cache;
judging whether the data packet is completely read or not, if so, jumping to the next bus channel; if not, the previous step is executed again;
judging whether the data of the acquisition modules with the same equipment number in all the bus channels are completely read, if so, carrying out the next step; if not, jumping to an RS485 channel 1 and executing again;
judging whether the initial equipment number is the maximum value in the judgment interval or not, if so, finishing the data uploading; if not, adding 1 to the initial equipment number value and executing the steps again.
It should be recognized that embodiments of the present invention can be realized and implemented by computer hardware, a combination of hardware and software, or by computer instructions stored in a non-transitory computer readable memory. The methods may be implemented in a computer program using standard programming techniques, including a non-transitory computer-readable storage medium configured with the computer program, where the storage medium so configured causes a computer to operate in a specific and predefined manner, according to the methods and figures described in the detailed description. Each program may be implemented in a high level procedural or object oriented programming language to communicate with a computer system. However, the program(s) can be implemented in assembly or machine language, if desired. In any case, the language may be a compiled or interpreted language. Furthermore, the program can be run on a programmed application specific integrated circuit for this purpose.
Further, the operations of processes described herein can be performed in any suitable order unless otherwise indicated herein or otherwise clearly contradicted by context. The processes described herein (or variations and/or combinations thereof) may be performed under the control of one or more computer systems configured with executable instructions, and may be implemented as code (e.g., executable instructions, one or more computer programs, or one or more applications) collectively executed on one or more processors, by hardware, or combinations thereof. The computer program includes a plurality of instructions executable by one or more processors.
Further, the method may be implemented in any type of computing platform operatively connected to a suitable interface, including but not limited to a personal computer, mini computer, mainframe, workstation, networked or distributed computing environment, separate or integrated computer platform, or in communication with a charged particle tool or other imaging device, and the like. Aspects of the invention may be embodied in machine-readable code stored on a non-transitory storage medium or device, whether removable or integrated into a computing platform, such as a hard disk, optically read and/or write storage medium, RAM, ROM, or the like, such that it may be read by a programmable computer, which when read by the storage medium or device, is operative to configure and operate the computer to perform the procedures described herein. Further, the machine-readable code, or portions thereof, may be transmitted over a wired or wireless network. The invention described herein includes these and other different types of non-transitory computer-readable storage media when such media include instructions or programs that implement the steps described above in conjunction with a microprocessor or other data processor. The invention also includes the computer itself when programmed according to the methods and techniques described herein.
A computer program can be applied to input data to perform the functions described herein to transform the input data to generate output data that is stored to non-volatile memory. The output information may also be applied to one or more output devices, such as a display. In a preferred embodiment of the invention, the transformed data represents physical and tangible objects, including particular visual depictions of physical and tangible objects produced on a display.
The above description is only a preferred embodiment of the present invention, and the present invention is not limited to the above embodiment, and any modifications, equivalent substitutions, improvements, etc. within the spirit and principle of the present invention should be included in the protection scope of the present invention as long as the technical effects of the present invention are achieved by the same means. The invention is capable of other modifications and variations in its technical solution and/or its implementation, within the scope of protection of the invention.

Claims (9)

1. A data processing method based on a component capacity system is characterized by comprising the following steps:
s10, generating a system instruction, and further sending the system instruction to a relay instruction cache;
s20, receiving the system instruction and forwarding the system instruction to an acquisition unit in a corresponding bus channel;
s30, receiving the system instruction cached by the relay instruction, acquiring component content data, executing a corresponding task according to the system instruction, and uploading data to a relay data cache;
and S40, the relay data cache receives the formation and grading data and further sends the data to a processing unit.
2. The data processing method based on component-content-sharing system according to claim 1, wherein the S10 further includes:
s11, generating the system instruction, setting an initial equipment number and a judgment interval, and further sending the system instruction to the bus channel;
s12, judging whether the equipment number of the acquisition unit in the bus channel is the same as the initial equipment number, if so, carrying out the next step; if not, jumping to the next channel and repeating the step; jumping to S15 until all channels are judged to be finished;
s13, judging whether the relay instruction cache corresponding to the bus channel has a storage space, if so, sending the system instruction to the corresponding relay instruction cache; if not, jumping to the next channel and re-executing S12;
s14, judging whether the acquisition units with the same equipment numbers in all the bus channels have received the system instruction, if so, carrying out the next step, otherwise, jumping to the initial channel and re-executing S12;
s15, judging whether the initial equipment number is the maximum value in the judgment interval, if so, ending S10; if not, the value is incremented by 1 and S12 is re-executed.
3. The data processing method based on component-content-sharing system according to claim 1, wherein the S40 further includes:
s41, setting an initial equipment number and a judgment interval;
s42, judging whether a unit which is the same as the initial equipment number exists in the acquisition units in the bus channel, and if so, carrying out the next step; if not, jumping to the next channel and repeating the step; until all channels are judged, jumping to S46;
s43, judging whether the chemical component volume data acquired by the acquisition unit are completely read, if so, jumping to the next bus channel and executing S42 again; if not, the next step is carried out;
s44, reading the component content data from the relay data cache corresponding to the bus channel;
s45, judging whether the component content data are completely read, if so, jumping to the next bus channel and executing S42 again; if not, re-executing S44;
s46, judging whether the data of the acquisition units with the same equipment number in the bus channel are completely read, if so, carrying out the next step; if not, jumping to the initial channel and executing S42 again;
s47, judging whether the initial equipment number is the maximum value in the judgment interval, if so, ending S40; if not, the value is incremented by 1 and S42 is re-executed.
4. The data processing method based on the component-capacitive system according to claim 1, wherein at least 1 bus channel exists; the bus channel comprises at least 1 acquisition unit; the acquisition unit acquires the component and partial volume data of at least 1 battery; the bus channel supports up to 64 of the batteries.
5. The data processing method based on the component-capacitive system according to claim 1, wherein the bus channel corresponds to 1 relay data cache and 1 relay instruction cache respectively.
6. The data processing method based on the component-content system according to claim 1, wherein the system instruction comprises acquisition unit starting, acquisition unit closing, acquisition unit pausing, parameter configuration and system upgrading.
7. The component-capacitor-system-based data processing method according to claim 1, wherein the component-capacitor-data comprises battery voltage, battery current, battery impedance, consumed electric energy, battery temperature and ambient pressure.
8. A data processing system based on a component capacity grading system is characterized by comprising the following modules:
the processing module is used for generating a system instruction and further sending the system instruction to the relay instruction module;
the relay instruction module is connected with the processing module to realize interaction and is used for receiving the system instruction and forwarding the system instruction to the acquisition module in the corresponding bus channel;
the acquisition module is connected with the relay instruction module to realize interaction and is used for receiving the system instruction of the relay instruction module and acquiring component capacity data, further executing a corresponding task according to the system instruction and uploading the component capacity data to the relay data module; and
and the relay data module is connected with the acquisition module and the processing module to realize interaction, is used for receiving the formation and grading data and further sends the formation and grading data to the processing module.
9. A component-capacitive-system-based data processing system according to claim 8, wherein the acquisition module comprises at least 1 acquisition unit.
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