CN111162065A - Semiconductor light emitting device and method of manufacturing the same - Google Patents

Semiconductor light emitting device and method of manufacturing the same Download PDF

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Publication number
CN111162065A
CN111162065A CN202010072623.5A CN202010072623A CN111162065A CN 111162065 A CN111162065 A CN 111162065A CN 202010072623 A CN202010072623 A CN 202010072623A CN 111162065 A CN111162065 A CN 111162065A
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China
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light
isolation wall
emitting
substrate
groove
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Chinese (zh)
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李刚
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Zhejiang Yunuo Energy Saving Technology Co.,Ltd.
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Shenzhen Dadao Semiconductor Co ltd
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Priority to CN202010072623.5A priority Critical patent/CN111162065A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H01L25/167—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52—Encapsulations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Led Device Packages (AREA)

Abstract

The invention discloses a semiconductor light-emitting device and a manufacturing method thereof, wherein the semiconductor light-emitting device comprises a substrate, an external bonding pad, a first light-emitting component, a first light isolation wall and a second light isolation wall; the substrate comprises a first surface and a second surface which are opposite, and the first surface is provided with a first conductive circuit; the external bonding pad is arranged on the first surface and/or the second surface of the substrate and is in conductive connection with the first conductive circuit; the first light-emitting assembly is arranged on the first surface of the substrate and is in conductive connection with the first conductive circuit; the first light-emitting assembly comprises a plurality of first light-emitting units; each first light-emitting unit comprises at least one light-emitting chip; the first light isolation wall is arranged on the first surface and is provided with a plurality of independent first grooves, and each first light emitting unit is positioned in one corresponding first groove; the setting of second light isolation wall is on first light isolation wall and encloses and establish in first recess periphery. The invention solves the problem of light channeling among different light emitting areas, and has the advantages of simple processing, low cost and good reliability.

Description

Semiconductor light emitting device and method of manufacturing the same
Technical Field
The invention relates to the technical field of light-emitting devices, in particular to a semiconductor light-emitting device and a manufacturing method thereof.
Background
RGB light emitting devices manufactured based on semiconductor light emitting elements have been widely used in the field of indoor and outdoor displays. With the reduction of pixel size and pixel pitch, the miniLED-based high-definition ultra-fine pitch light emitting device is one of the keys for realizing 8K ultra-high resolution, medium and large-size televisions and displays.
A typical light emitting device structure is shown in fig. 1, and includes a substrate 11, a light emitting element 12 disposed on the substrate 11, and the light emitting element 12 generally includes a support 121, a light emitting chip 122, and a light transmissive layer 123. To realize an RGB display, each light emitting element 12 typically includes at least a red chip, a blue chip, and a green chip. As can be seen from fig. 1, since each light emitting element 12 has the holder 121, miniaturization of the light emitting element 12 is greatly limited. Even if the size of the light emitting elements 12 can be made small, for example, 1mmx1mm, each light emitting element 12 includes at least four external connection pads because each light emitting element 12 includes at least one red chip, one blue chip, and one green chip. Since the size of the light emitting element 12 is too small and the size of the pad is limited, the strength of reflow soldering of the light emitting element 12 to the substrate 11 is low, and the flatness and pitch are not easily controlled. Thousands of light emitting elements 12 which are closely arranged and reflow-soldered on the substrate 11 are easily detached by external force such as collision, vibration, extrusion, etc., resulting in poor display effect, cumbersome repair work, and high cost.
In order to solve the problem encountered with miniaturization of a light emitting element, another common light emitting device includes a substrate 21, a light emitting chip 22, and a light transmitting layer 23 as shown in fig. 2. As shown in fig. 2, the light emitting chip 22 replaces the light emitting element 12 in fig. 1, since the light emitting chip 22 itself has no support, the size can be minimized, the light transmitting layer 23 can not only protect the gold wires, but also play a role in moisture protection, dust protection, and collision prevention, and the light emitting chip 22 is not easily damaged by external force.
When the light emitting device of fig. 2 is used for RGB display, in order to improve contrast of a display image, it is necessary to reduce the reflectance of the non-light-emitting surface. Ideally, the non-light-emitting surface is blackened completely. Based on the structure shown in fig. 2, in order to improve the contrast of the displayed image, it is a common practice to dope a colorant into the light-transmitting layer 23, reduce the contrast ratio of the light-transmitting layer 23, and increase the degree of blackness of the non-light-emitting surface, and at the same time, the doping of the colorant greatly reduces the light transmittance of the light-transmitting layer 23, and usually sacrifices 40% of light. At the same power density, the brightness of the light emitting device is greatly compromised. If the brightness is increased by increasing the power density, it will bring much burden to the power configuration, the driving choice, the heat conduction and the heat dissipation design, and will increase the cost. As can be seen from fig. 2, some of the light emitted from the light emitting chip 22 propagates in the horizontal direction in the light transmissive layer 23, and an unavoidable crosstalk phenomenon occurs between different light emitting regions, which affects image definition, resolution, and contrast.
In order to avoid the influence of the light-transmitting layer doped with the colorant on the brightness and further improve the degree of black on the non-light-emitting surface, a sheet is usually sleeved on the light-emitting device. The sheet is provided with corresponding through holes at the positions corresponding to the light-emitting chips or the light-emitting elements, so that the light-emitting chips or the light-emitting elements can be exposed, and the emitted light is not shielded by the sheet and is emitted from the light-emitting direction. Meanwhile, the thin sheet is opaque, so that the light channeling phenomenon among different light emitting areas can be effectively reduced.
In order to protect the sheet and protect the sheet from moisture, dust and impact, after the sheet is sleeved on the upper surface of the light-emitting device, a light-transmitting layer is usually arranged on the upper surface of the light-emitting device to fill the gap between the sheet and the light-emitting chip or the light-emitting element, and the sheet can be protected from being damaged by external force. The light-transmitting layer cannot be too thick, otherwise, the light-transmitting layer can cause light channeling phenomenon among different light-emitting areas, and the image definition, the resolution and the contrast are influenced. The surface of the sheet facing the light emergent direction is usually black to improve the degree of blackness of the non-light emergent region. Obviously, as the pixel pitch is reduced, the number of through holes on the sheet is increased and decreased, and the processing difficulty and cost thereof are greatly increased. The mounting accuracy and difficulty of the sheet on the light emitting device are higher and higher.
Therefore, due to the inherent defects and shortcomings of the above-mentioned light emitting device structure, the contradiction between further reduction of the pixel size and the pixel pitch and reliability, the contradiction between improvement of the brightness and increase of the contrast, the problem between high light transmittance of the light emitting surface and the degree of blackness of the light emitting surface, the problem of light channeling between different light emitting areas, and the problems of difficulty in processing, high cost, poor reliability, etc. due to the reduction of the pixel size and the pixel pitch cannot be solved.
Disclosure of Invention
The present invention is directed to provide a semiconductor light emitting device and a method for manufacturing the same, which can prevent light from escaping between light emitting regions and can be easily processed.
The technical scheme adopted by the invention for solving the technical problems is as follows: the semiconductor light-emitting device comprises a substrate, an external bonding pad, a first light-emitting component, a first light isolation wall and a second light isolation wall;
the substrate comprises a first surface and a second surface which are opposite, and the first surface is provided with a first conductive circuit; the external bonding pad is arranged on the first surface and/or the second surface of the substrate and is in conductive connection with the first conductive circuit; the first light-emitting assembly is arranged on the first surface of the substrate and is in conductive connection with the first conductive circuit; the first light-emitting assembly comprises a plurality of first light-emitting units; each first light-emitting unit comprises at least one light-emitting chip;
the first light isolation wall is arranged on the first surface and is provided with a plurality of independent first grooves, and each first light emitting unit is positioned in one corresponding first groove; the second light isolation wall is arranged on the first light isolation wall and surrounds the periphery of the first groove.
Preferably, the side wall of the first groove is attached to the side surface of the light emitting chip of the corresponding first light emitting unit or a gap is left.
Preferably, a conductive channel penetrating through the first surface and the second surface of the substrate is arranged in the substrate; the external connection pad arranged on the second surface of the substrate is in conductive connection with the first conductive circuit through the conductive channel.
Preferably, the first light isolation wall is made of one or more of silica gel, resin, ink, glass glaze, liquid glass, paint, photosensitive ink, photosensitive glue and heat curing glue;
the second optical isolation wall is made of one or more of photosensitive developing ink, photosensitive glue, glass glaze, liquid glass, paint, resin and silica gel.
Preferably, the light emitting device further includes a light transmitting layer; the euphotic layer is arranged between the first optical isolation wall and the second optical isolation wall, wraps the surface and the exposed side face of the light-emitting chip and also fills a gap between the first optical isolation wall and the corresponding light-emitting chip;
and part or all of the second light isolation wall penetrates through the light-transmitting layer arranged on the first light isolation wall to the surface of the first light isolation wall and/or the inside of the first light isolation wall.
Preferably, a light absorbing layer or a light reflecting layer is arranged on part or all of an interface between the light transmitting layer and the first surface of the substrate; the height of the light absorption layer or the light reflection layer is smaller than that of the first light isolation wall.
Preferably, the light-transmitting layer is colorless and transparent or doped with at least one of photoluminescent powder, light-diffusing powder, and coloring powder.
Preferably, the photoluminescent powder is a phosphor and/or quantum dots;
the fluorescent powder comprises one or more of YAG fluorescent powder, oxide fluorescent powder, nitride fluorescent powder, fluoride fluorescent powder, aluminate fluorescent powder, silicate fluorescent powder and nitrogen oxide fluorescent powder;
the quantum dots comprise one or more of silicon quantum dots, germanium quantum dots, cadmium sulfide quantum dots, cadmium selenide quantum dots, cadmium telluride quantum dots, zinc selenide quantum dots, lead sulfide quantum dots, lead selenide quantum dots, indium phosphide quantum dots and indium arsenide quantum dots;
the light diffusion powder is one or more of glass powder, ceramic powder, oxide powder and nitride powder with micron, submicron and nanometer particle diameters;
the coloring powder is one or more of carbon black, oxide powder and salts with micron, submicron and nanometer particle diameters.
Preferably, the second surface of the substrate is provided with a second conductive circuit.
Preferably, the second surface is provided with an electronic component and/or a second light emitting assembly which are electrically connected with the second conductive circuit.
Preferably, the second light emitting assembly includes a plurality of second light emitting units, a third light isolation wall and a fourth light isolation wall;
a plurality of independent third grooves are formed on the third light isolation wall; each second light-emitting unit comprises at least one light-emitting chip; each second light-emitting unit is positioned in one corresponding third groove;
the fourth light isolation wall is arranged on the third light isolation wall and surrounds the periphery of the third groove.
Preferably, the second surface of the substrate is provided with at least one flat surface for welding or adhering to the surface of the heat sink and/or the surface of the module support; and/or the presence of a gas in the gas,
the second surface of the substrate is provided with at least one circuit board which is in conductive connection with the external bonding pad; the circuit board is a double-sided single-layer or multi-layer circuit board.
The present invention also provides a method of manufacturing a semiconductor light emitting device, comprising the steps of:
s1, arranging external connection pads on the first surface and/or the second surface of the substrate;
s2, arranging a first conductive circuit on the first surface of the substrate, and connecting the first conductive circuit with the external connection pad in a conductive manner;
steps S1 and S2 are performed sequentially, or step S2 is performed before S1;
s3, arranging a first light-emitting assembly on the first surface of the substrate, and enabling the first light-emitting assembly to be in conductive connection with the first conductive circuit; the first light-emitting assembly comprises a plurality of first light-emitting units; each first light-emitting unit comprises at least one light-emitting chip;
s4, arranging a first light isolation wall on the first surface of the substrate, forming a plurality of independent first grooves, and positioning each first light-emitting unit in one corresponding first groove;
s5, arranging a second light isolation wall on the first light isolation wall; the second light isolation wall is arranged on the first light isolation wall and surrounds the periphery of the first groove.
Preferably, step S5 is followed by: and the first light-emitting unit and the first light-isolating wall are provided with light-transmitting layers, the light-transmitting layers wrap the surface and the exposed side surface of the light-emitting chip and also fill a gap between the first light-isolating wall and the corresponding light-emitting chip.
Preferably, step S5 is preceded by: the first light-emitting unit and the first light-isolating wall are provided with light-transmitting layers, the light-transmitting layers wrap the surface and the exposed side face of the light-emitting chip and also fill gaps between the first light-isolating wall and the corresponding light-emitting chip;
removing part or all of the euphotic layer positioned at the periphery of the first light-emitting unit to form a hollow-out area exposing the first light isolation wall;
in step S5, a second light isolation wall is disposed in the hollow portion and on a part or all of the light-transmitting layer, and a bottom surface of the second light isolation wall is located on a surface of the first light isolation wall and/or in the first light isolation wall.
Preferably, the manufacturing method further includes:
s6, roughening part or all of the surface of the second optical isolation wall; or the like, or, alternatively,
and roughening part or all of the surface of the second optical isolation wall and part or all of the surface of the light-transmitting layer.
Preferably, the manufacturing method further comprises the steps of:
and S7, arranging at least one circuit board on the second surface of the substrate, and electrically connecting the circuit board with the external connection pad.
Preferably, step S2 further includes: and arranging a second conductive circuit on the second surface of the substrate, and electrically connecting the second conductive circuit with the external bonding pad.
Preferably, the manufacturing method further includes:
and S7, arranging an electronic component on the second surface of the substrate, and enabling the electronic component to be in conductive connection with the second conductive circuit.
Preferably, the step S4 includes the steps of:
s4-1, coating a first light isolation wall on the first surface of the substrate and covering the light emitting chip;
s4-2, arranging a mask on the surface of the first optical isolation wall;
s4-3, exposing and curing the first light isolation wall which is not covered by the mask;
s4-4, removing the mask;
s4-5, developing and removing the first light isolation wall covered by the mask to form the first groove and expose the first light emitting unit corresponding to the first groove.
Preferably, the step S4 includes the steps of:
s4-1, coating a first light isolation wall on the first surface of the substrate and covering the light emitting chip;
s4-2, arranging a mask on the surface of the first optical isolation wall;
s4-3, exposing the first light isolation wall which is not covered by the mask;
s4-4, removing the mask;
s4-5, developing and removing the first light isolation wall uncovered by the mask to form the first groove and expose the first light emitting unit corresponding to the first groove.
Preferably, the step S4 includes the steps of:
s4-1, coating a first light isolation wall on the first surface of the substrate and covering the light emitting chip;
s4-2, removing the first optical isolation wall covering the surface of the light-emitting chip;
and S4-3, curing the first light isolation wall left on the substrate.
Preferably, the step S5 includes the steps of:
s5-1, coating a second optical isolation wall on the first optical isolation wall, and covering the light-emitting chip;
s5-2, arranging a mask on the surface of the second optical isolation wall;
s5-3, exposing and curing the second optical isolation wall which is not covered by the mask;
s5-4, removing the mask;
s5-5, developing and removing the second light isolation wall covered by the mask to form a second groove communicated with the first groove, and exposing the first light emitting unit corresponding to the second groove and the first groove.
Preferably, the step S5 includes the steps of:
s5-1, coating a second optical isolation wall on the first optical isolation wall, and covering the light-emitting chip;
s5-2, arranging a mask on the surface of the second optical isolation wall;
s5-3, exposing the second optical isolation wall which is not covered by the mask;
s5-4, removing the mask;
s5-5, developing and removing the second light isolation wall uncovered by the mask to form a second groove communicated with the first groove, and exposing the first light emitting unit corresponding to the second groove and the first groove.
Preferably, the step S5 includes the steps of:
s5-1, arranging the second light isolation wall on the first light isolation wall along the periphery of the first groove;
and S5-2, solidifying the second light isolation wall.
Preferably, before step S4, several of the substrates are spliced in a side-to-side relationship;
in step S4, the first optical isolation walls cover all the first surfaces of the substrates.
The semiconductor light-emitting device solves the problem of light channeling among different light-emitting areas, the problem of high light transmittance of the light-emitting surface and the problem of blackness degree of the non-light-emitting surface through the arrangement of the optical isolation wall among the light-emitting units, the contradiction between further reduction of the pixel size and the pixel spacing and the reliability, the contradiction between improvement of the brightness and increase of the contrast, and has the advantages of simple processing, low cost and good reliability. The manufacturing method of the light-emitting device has the advantages of short flow, simple process and low manufacturing cost, and is suitable for large-scale industrial production.
Drawings
The invention will be further described with reference to the accompanying drawings and examples, in which:
fig. 1 and fig. 2 are schematic cross-sectional views of two light emitting devices in the prior art respectively;
fig. 3 is a schematic cross-sectional view of a semiconductor light emitting device according to an embodiment of the present invention;
fig. 4 is a schematic cross-sectional view of a light-emitting device according to another embodiment of the present invention.
Detailed Description
For a more clear understanding of the technical features, objects and effects of the present invention, embodiments of the present invention will now be described in detail with reference to the accompanying drawings.
As shown in fig. 3 and 4, the semiconductor light emitting device of the present invention includes a substrate 31, a peripheral pad 32, a first light emitting element, a first light isolation wall 33, and a second light isolation wall 34.
Wherein the substrate 31 comprises a first and a second opposite surface, the first surface being provided with a first electrically conductive circuit 36. The external connection pad 32 is provided on at least one of the first surface and the second surface of the substrate 31, and the external connection pad 32 is conductively connected to the first conductive circuit 36. The first light emitting element is disposed on the first surface of the substrate 31 and is electrically connected to the first conductive circuit 36.
The first light emitting assembly may include a number of first light emitting units 35. Each of the first light emitting units 35 includes at least one light emitting chip, that is, each of the light emitting units 35 may include one light emitting chip 351, and may also include two or more light emitting chips 351 shown in fig. 1.
The first light isolation walls 33 are disposed on the first surface of the substrate 31, and a plurality of independent first grooves 330 are formed, i.e., the first grooves 330 are not communicated with each other. Each first light emitting unit 35 is located in a corresponding first groove 330. The height of the first optical isolation wall 33 may be smaller than the height of the light emitting chip 351, or may be greater than or equal to the height of the light emitting chip 351.
Second light isolation wall 34 sets up on first light isolation wall 33 and encloses the periphery of establishing at first recess 330, keeps apart adjacent first luminescence unit 35 to guarantee can not lead to scurrying the problem of light because the side is luminous between the adjacent first luminescence unit 35.
Specifically, the substrate 31 may be, but is not limited to, a ceramic plate, a glass plate, a metal plate, or FR4 (glass fiber plate). The external connection pads 32 may be located on the first surface and/or the second surface of the substrate 31. For the external connection pad 32 on the first surface of the substrate 31, the first conductive circuit 36 can be electrically connected with the external connection pad 32 in a direct connection manner; for the external connection pads 32 on the second surface of the substrate 31, the substrate 31 may be provided with conductive vias 310 penetrating the first and second surfaces thereof, and the external connection pads 32 are electrically connected to the first conductive circuits 36 through the conductive vias 310.
The first conductive circuit 36 may be, but is not limited to, one or more combinations of single layer, multilayer wiring boards.
On the first surface of the substrate 31, a plurality of first light emitting cells 35 are located one by one in the first grooves 330 of the first light isolation walls 33. The sidewalls of the first groove 330 may be attached to the sides of the light emitting chip 351 of the corresponding first light emitting unit 35 or have a gap.
The first light isolation wall 33 may be made of one or more of silica gel, resin, ink, glass glaze, liquid glass, paint, photosensitive ink, photosensitive glue, and heat-curable glue. As shown in fig. 3, in one embodiment, the first light isolation wall 33 is formed on the substrate 31 by exposing and developing photosensitive ink or photosensitive resist, and is located at the periphery of the first light emitting unit 35. In another embodiment, as shown in fig. 4, the first light isolation wall 33 is formed on the substrate 31 and located at the periphery of the first light emitting unit 35 by coating at least one of silicone, resin, ink, glass glaze, liquid glass, paint and heat-curable adhesive, and the first light isolation wall 33 is also located between adjacent light emitting chips 351 in the first light emitting unit 35.
The second light isolation wall 34 may be made of one or more of photosensitive developing ink, photosensitive paste, glass glaze, liquid glass, paint, resin, and silica gel.
In addition, the second surface of the substrate 31 may be further provided with at least one flat surface for being soldered or adhered to a surface of the heat sink and/or a surface of the module holder, so as to fix the light emitting module on the heat sink and/or the module holder. In the first light emitting assembly, the driving and controlling device of the light emitting chip may be disposed on the exposed first surface and/or second surface of the substrate 31; the drive and control device output is conductively connected to the external bond pad 32.
Further, the light-emitting device of the present invention may further include a light-transmitting layer 37. The light-transmitting layer 37 is disposed between the first light-isolating wall 33 and the second light-isolating wall 34, and wraps the surface and the exposed side of the light-emitting chip 351 to protect and transmit light. It is also understood that the light-transmissive layer 37 is filled in the first groove 330 while wrapping the surface and the exposed side surface of the light-emitting chip 351. Part or all of the second light isolation wall 34 penetrates the light-transmitting layer 37 provided on the first light isolation wall 33 to the surface of the first light isolation wall 33 and/or inside the first light isolation wall 33, i.e., the bottom surface of the second light isolation wall 34 may be located on the surface of the first light isolation wall 33 and/or inside the first light isolation wall 33.
The top surface of light-transmissive layer 37 may be flush with the top surface of second light-isolating wall 34, or may be higher or lower than the top surface of second light-isolating wall 34. The top surface of light-transmitting layer 37 may be, but is not limited to, one or more of a flat surface, a convex surface, a concave surface, a circular surface, and an elliptical surface.
The surfaces of the second light isolation wall 34 and the light-transmitting layer 37 may also be roughened by a roughening process such as sand blasting to further improve surface color uniformity and surface antireflection ability.
The light-transmitting layer 37 may be formed of, but not limited to, at least one of epoxy, silicone, glass glaze, and liquid glass. Further, the light-transmitting layer 37 may be colorless and transparent, and may be doped with at least one of photoluminescent powder, light-diffusing powder, and coloring powder as necessary to achieve a corresponding light-emitting effect.
The photoluminescent powder may be a phosphor and/or quantum dots. The fluorescent powder includes but is not limited to one or more of YAG fluorescent powder, oxide fluorescent powder, nitride fluorescent powder, fluoride fluorescent powder, aluminate fluorescent powder, silicate fluorescent powder and nitrogen oxide fluorescent powder. Quantum dots include, but are not limited to, one or more of silicon quantum dots, germanium quantum dots, cadmium sulfide quantum dots, cadmium selenide quantum dots, cadmium telluride quantum dots, zinc selenide quantum dots, lead sulfide quantum dots, lead selenide quantum dots, indium phosphide quantum dots, and indium arsenide quantum dots.
The light diffusing powder may be, but is not limited to, one or more of micron, submicron, and nanometer sized glass powder, ceramic powder, oxide powder, and nitride powder. The colored powder may be, but is not limited to, one or more of micron, submicron, and nanometer particle size carbon black, oxide powder, and salts.
As shown in fig. 3, in an embodiment of the invention, the first groove 330 is attached to a side surface of the light emitting chip 351 of the corresponding first light emitting unit 35. The light-transmissive layer 37 is filled in the first groove 330, and wraps the surface of the light-emitting chip 351 and the exposed side surface, which is mainly the side surface of the light-emitting chip 351 opposite to the other light-emitting chip 351.
In other embodiments where the first groove 330 and the side surface of the corresponding light-emitting chip 351 of the first light-emitting unit 35 are spaced apart, the light-transmissive layer 37 is filled in the first groove 330, wraps the surface and the exposed side surface of the light-emitting chip 351, and also fills the space between the first light-isolating wall 33 and the corresponding light-emitting chip 351.
Further, in the light emitting device of the present invention, a light absorbing layer or a light reflecting layer (not shown) may be further provided at a part or all of the interface between the light transmitting layer 37 and the first surface of the substrate 31. The height of the light absorbing layer or the light reflecting layer is smaller than that of the first light isolation wall 33.
In other embodiments, the second surface of the substrate 31 may also be provided with a second conductive circuit; the second conductive circuit is conductively connected to the external connection pad 32. The second surface of the substrate 31 may further be provided with a second light emitting element and/or an electronic component electrically connected to the second conductive circuit.
The second light-emitting component comprises a plurality of second light-emitting units and a third light isolation wall; a plurality of independent third grooves are formed on the third light isolation wall; each second light-emitting unit comprises at least one light-emitting chip, and each second light-emitting unit is correspondingly arranged in one corresponding third groove. The height of the third light isolation wall can be smaller than the height of the light emitting chip of the second light emitting unit, and can also be larger than or equal to the height of the light emitting chip of the second light emitting unit. The second light-emitting component further can include a fourth light isolation wall, and the fourth light isolation wall is arranged on the third light isolation wall and surrounds the periphery of the third groove.
The specific arrangement of the second light emitting module and the third and fourth light isolation walls thereof can refer to the arrangement of the first light emitting module and the first and second light isolation walls 33 and 34, respectively.
In other embodiments, the second surface of the substrate 31 may further be provided with at least one circuit board, and the circuit board is electrically connected to the external connection pad 32. The circuit board may be a double-sided single layer or multilayer circuit board.
Referring to fig. 3 and 4, the method for manufacturing a light emitting device of the present invention may include the steps of:
and S1, arranging the external connection pad 32 on the first surface and/or the second surface of the substrate 31.
S2, disposing the first conductive circuit 36 on the first surface of the substrate 31, and electrically connecting the first conductive circuit 36 with the external connection pad 32.
The above steps S1 and S2 may be performed sequentially, and step S2 may be performed before step S1. When the external connection pad 32 is disposed on the second surface of the substrate 31, the first conductive circuit 36 is electrically connected to the external connection pad 32 through the conductive via 310.
In some embodiments, step S2 further includes: a second conductive circuit is disposed on the second surface of the substrate 31 and is electrically connected to the external connection pad 32. Alternatively, at least one flat surface is disposed on the second surface of the substrate 31 for being soldered or adhered to the surface of the heat sink and/or the surface of the module holder, so as to fix the light emitting module on the heat sink and/or the module holder.
S3, disposing a first light emitting element on the first surface of the substrate 31 and electrically connecting the first light emitting element to the first conductive circuit 36.
Wherein, the first light-emitting assembly comprises a plurality of first light-emitting units 35; each of the first light emitting units 35 includes at least one light emitting chip 351.
S4, disposing the first light isolation wall 33 on the first surface of the substrate 31, and forming a plurality of independent first grooves 330, wherein each first light-emitting unit 35 is located in a corresponding first groove 330.
Referring to fig. 3, when the first optical isolation wall 33 uses negative photosensitive ink or negative photosensitive glue, step S4 may specifically include the steps of:
s4-1, the first light isolation wall 33 is coated on the first surface of the substrate 31 and covers the light emitting chip 351.
S4-2, a mask is provided on the surface of the first optical isolation wall 33.
The mask covers the region corresponding to the first recess 330 to be formed subsequently.
S4-3, exposing and curing the first light isolation wall 33 which is not covered by the mask.
Wherein the region not covered by the mask is a portion of the first optical isolation wall 33 forming the periphery of the first groove 330.
S4-4, removing the mask.
S4-5, developing to remove the first light isolation wall 33 covered by the mask, thereby forming a first groove 330 and exposing the first light emitting unit 35 corresponding to the first groove 330. The first light emitting units 35 are respectively corresponding to a first groove 330.
Referring to fig. 3, when the first optical isolation wall 33 uses positive photosensitive ink or positive photosensitive resist, step S4 may specifically include the steps of:
s4-1, the first light isolation wall 33 is coated on the first surface of the substrate 31 and covers the light emitting chip 351.
S4-2, a mask is provided on the surface of the first optical isolation wall 33.
The mask covers the area outside the first recess 330 to be formed later.
S4-3, the first optical isolation wall 33 not covered by the mask is exposed.
The area not covered by the mask is the area corresponding to the first groove 330.
S4-4, removing the mask.
S4-5, developing to remove the first light isolation wall 33 uncovered by the mask, thereby forming a first groove 330 and exposing the first light emitting unit 35 corresponding to the first groove 330. The first light emitting units 35 are respectively corresponding to a first groove 330.
Referring to fig. 4, when the first optical isolation wall 33 employs at least one of glass glaze, liquid glass, paint, resin, silica gel, and the like, step S4 may include the steps of:
s4-1, the first light isolation wall 33 is coated on the first surface of the substrate 31 and covers the light emitting chip 351.
S4-2, removing the first light isolation wall 33 covering the surface of the light emitting chip 351 to form a first groove 330, and exposing the first light emitting unit 35 corresponding to the first groove 330. In the first light emitting unit 35, the first light isolation wall 33 is also formed between the light emitting chips 351.
S4-3, curing the first light isolation wall 33 left on the substrate 31.
S5, providing the second light isolation wall 34 on the first light isolation wall 33; the second light isolation wall 34 is provided on the first light isolation wall 33 and surrounds the outer periphery of the first groove 330.
When the second light isolation wall 34 uses negative photosensitive developing ink or negative photosensitive resist, the step S5 may specifically include the steps of:
s5-1, the second light isolation wall 34 is coated on the first light isolation wall 33, and covers the light emitting chip 351.
S5-2, a mask is arranged on the surface of the second optical isolation wall 34.
The area covered by the mask is the area corresponding to the first light emitting unit 35 and the first groove 330.
S5-3, exposing and curing the second light isolation wall 34 which is not covered by the mask.
S5-4, removing the mask.
S5-5, developing and removing the second light isolation wall 34 covered by the mask to form a second groove communicated with the first groove 330, and exposing the first light-emitting unit 35 corresponding to the second groove and the first groove 330.
When the second light-shielding wall 34 uses positive photosensitive developing ink or positive photosensitive resist, the step S5 may specifically include the steps of:
s5-1, the second light isolation wall 34 is coated on the first light isolation wall 33, and covers the light emitting chip 351.
S5-2, a mask is arranged on the surface of the second optical isolation wall 34.
The mask covers the portion of the second optical isolation wall 34 corresponding to the region other than the first groove 330.
S5-3, exposing the second optical isolation wall 34 not covered by the mask.
S5-4, removing the mask.
S5-5, developing and removing the second light isolation wall 34 uncovered by the mask to form a second groove communicated with the first groove 330 and expose the first light emitting unit 35 corresponding to the second groove and the first groove 330.
When the second optical isolation wall 34 is made of at least one of glass glaze, liquid glass, paint, resin and silica gel, the step S5 may specifically include the steps of:
s5-1, the second light isolation wall 34 is provided on the first light isolation wall 33 along the outer periphery of the first groove 330.
S5-2, solidifying the second light isolation wall 34.
The manufacturing method of the present invention further includes providing the light-transmitting layer 37. The light-transmissive layer 37 may be provided before or after the second light-isolation wall 34.
When the light-transmissive layer 37 is provided behind the second light-isolating wall 34, the method further includes, after step S5 described above: a light-transmitting layer 37 is disposed on the first light-emitting unit 35 and the first light-isolating wall 33, and the light-transmitting layer 37 wraps the surface and the exposed side surface of the light-emitting chip 351. When a gap is left between the first groove 330 and the side surface of the light-emitting chip 351 of the corresponding first light-emitting unit 35, the light-transmitting layer 37 also fills the gap between the first light-isolating wall 33 and the corresponding light-emitting chip 351.
When the light-transmissive layer 37 is provided before the second light-isolating wall 34, before step S5, the method further includes: a light-transmitting layer 37 is disposed on the first light-emitting unit 35 and the first light-isolating wall 33, and the light-transmitting layer 37 wraps the surface and the exposed side surface of the light-emitting chip. When a gap is left between the first groove 330 and the side surface of the light-emitting chip 351 of the corresponding first light-emitting unit 35, the light-transmitting layer 37 also fills the gap between the first light-isolating wall 33 and the corresponding light-emitting chip 351. Then, a part or all of the transparent layer 37 at the periphery of the first light emitting unit 35 is removed to form a hollow area exposing the first light isolation wall 33. In step S5, the second light isolation wall 34 is provided in the hollow portion and on a part or all of the light-transmitting layer 37, and the bottom surface of the second light isolation wall 34 is positioned on the surface of the first light isolation wall 33 and/or in the first light isolation wall 33.
Further, the manufacturing method of the present invention may further include:
s6, roughening part or all of the surface of the second light isolation wall 34; or the like, or, alternatively,
part or all of the surface of the second light isolation wall 34 and part or all of the surface of the light-transmitting layer 37 are roughened.
In this case, roughening may be performed by, for example, sandblasting, to roughen part or all of the surface of the second optical isolation wall 34 and part or all of the surface of the light-transmitting layer 37.
In the manufacturing method of the present invention, when the second surface of the substrate 31 is provided with the second conductive circuit, the method may further include:
s7, disposing an electronic component on the second surface of the substrate 31, and electrically connecting the electronic component to the second conductive circuit. And/or, a second light emitting element is disposed on a second surface of the substrate 31.
The second light-emitting component comprises a plurality of second light-emitting units, a third light isolation wall and a fourth light isolation wall. The specific methods for disposing the second light emitting module and the third and fourth light isolation walls thereof can be referred to the above-mentioned disposition of the first light emitting module and the first and second light isolation walls 33 and 34, respectively.
In addition, the manufacturing method of the present invention may further include, as necessary:
and S7, arranging at least one circuit board on the second surface of the substrate 31, and electrically connecting the circuit board with the external connection pad 32. The circuit board can be a double-sided single-layer circuit board or a multi-layer circuit board.
The semiconductor light-emitting device can be used in display screens and backlight modules. In the manufacturing method of the present invention, before step S4, a plurality of substrates 31 may be arranged on the surface of the support by being assembled with their sides facing each other closely. The sides of the substrate 31 are in close contact without a gap therebetween. The substrates 31 can be joined together to form a display screen or a backlight module.
In step S4, when the first light isolation walls 33 are disposed, the first light isolation walls 33 cover the first surfaces of all the substrates 31, and also cover the connecting seams between the substrates 31, so as to ensure the uniformity of the appearance of the substrates of the display screen or the backlight module.
In summary, the manufacturing method of the semiconductor light emitting device of the invention has the advantages of short flow, simple process and low manufacturing cost, and is suitable for large-scale and large-area industrial production.
The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes performed by the present specification and drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.

Claims (22)

1. A semiconductor light-emitting device is characterized by comprising a substrate, an external bonding pad, a first light-emitting component, a first light isolation wall and a second light isolation wall;
the substrate comprises a first surface and a second surface which are opposite, and the first surface is provided with a first conductive circuit; the external bonding pad is arranged on the first surface and/or the second surface of the substrate and is in conductive connection with the first conductive circuit; the first light-emitting assembly is arranged on the first surface of the substrate and is in conductive connection with the first conductive circuit; the first light-emitting assembly comprises a plurality of first light-emitting units; each first light-emitting unit comprises at least one light-emitting chip;
the first light isolation wall is arranged on the first surface and is provided with a plurality of independent first grooves, and each first light emitting unit is positioned in one corresponding first groove; the second light isolation wall is arranged on the first light isolation wall and surrounds the periphery of the first groove.
2. The semiconductor light-emitting device according to claim 1, wherein a side wall of the first groove is attached to a side surface of the light-emitting chip of the corresponding first light-emitting unit or a gap is left.
3. The semiconductor light emitting device of claim 1, wherein the substrate has a conductive via formed therein through the first and second surfaces thereof; the external connection pad arranged on the second surface of the substrate is in conductive connection with the first conductive circuit through the conductive channel.
4. The semiconductor light emitting device according to claim 1, wherein the first light isolation wall is made of one or more of silicone, resin, ink, glass glaze, liquid glass, paint, photosensitive ink, photosensitive glue, and heat-curable glue;
the second optical isolation wall is made of one or more of photosensitive developing ink, photosensitive glue, glass glaze, liquid glass, paint, resin and silica gel.
5. The light-emitting device according to claim 1, further comprising a light-transmitting layer; the euphotic layer is arranged between the first optical isolation wall and the second optical isolation wall, wraps the surface and the exposed side face of the light-emitting chip and also fills a gap between the first optical isolation wall and the corresponding light-emitting chip;
and part or all of the second light isolation wall penetrates through the light-transmitting layer arranged on the first light isolation wall to the surface of the first light isolation wall and/or the inside of the first light isolation wall.
6. The semiconductor light-emitting device according to claim 5, wherein part or all of an interface between the light-transmitting layer and the first surface of the substrate is provided with a light-absorbing layer or a light-reflecting layer; the height of the light absorption layer or the light reflection layer is smaller than that of the first light isolation wall.
7. The semiconductor light emitting device according to claim 5, wherein the light transmitting layer is colorless and transparent or doped with at least one of photoluminescent powder, light diffusing powder, and coloring powder.
8. The semiconductor light emitting device according to claim 7, wherein the photoluminescent powder is a phosphor and/or quantum dots;
the fluorescent powder comprises one or more of YAG fluorescent powder, oxide fluorescent powder, nitride fluorescent powder, fluoride fluorescent powder, aluminate fluorescent powder, silicate fluorescent powder and nitrogen oxide fluorescent powder;
the quantum dots comprise one or more of silicon quantum dots, germanium quantum dots, cadmium sulfide quantum dots, cadmium selenide quantum dots, cadmium telluride quantum dots, zinc selenide quantum dots, lead sulfide quantum dots, lead selenide quantum dots, indium phosphide quantum dots and indium arsenide quantum dots;
the light diffusion powder is one or more of glass powder, ceramic powder, oxide powder and nitride powder with micron, submicron and nanometer particle diameters;
the coloring powder is one or more of carbon black, oxide powder and salts with micron, submicron and nanometer particle diameters.
9. A semiconductor light emitting device according to any one of claims 1 to 8, wherein the second surface of the substrate is provided with a second electrically conductive circuit.
10. A semiconductor light emitting device according to claim 9, wherein the second surface is provided with an electronic component and/or a second light emitting element conductively connected to the second conductive circuit.
11. The semiconductor light emitting device as claimed in claim 10, wherein the second light emitting assembly comprises a plurality of second light emitting units, a third light isolation wall and a fourth light isolation wall;
a plurality of independent third grooves are formed on the third light isolation wall; each second light-emitting unit comprises at least one light-emitting chip; each second light-emitting unit is positioned in one corresponding third groove;
the fourth light isolation wall is arranged on the third light isolation wall and surrounds the periphery of the third groove.
12. A semiconductor light emitting device according to any one of claims 1 to 8, wherein the second surface of the substrate is provided with at least one flat surface for soldering or adhering to a surface of a heat sink and/or a surface of a module holder; and/or the presence of a gas in the gas,
the second surface of the substrate is provided with at least one circuit board which is in conductive connection with the external bonding pad; the circuit board is a double-sided single-layer or multi-layer circuit board.
13. A method of manufacturing a semiconductor light emitting device, comprising the steps of:
s1, arranging external connection pads on the first surface and/or the second surface of the substrate;
s2, arranging a first conductive circuit on the first surface of the substrate, and connecting the first conductive circuit with the external connection pad in a conductive manner;
steps S1 and S2 are performed sequentially, or step S2 is performed before S1;
s3, arranging a first light-emitting assembly on the first surface of the substrate, and enabling the first light-emitting assembly to be in conductive connection with the first conductive circuit; the first light-emitting assembly comprises a plurality of first light-emitting units; each first light-emitting unit comprises at least one light-emitting chip;
s4, arranging a first light isolation wall on the first surface of the substrate, forming a plurality of independent first grooves, and positioning each first light-emitting unit in one corresponding first groove;
s5, arranging a second light isolation wall on the first light isolation wall; the second light isolation wall is arranged on the first light isolation wall and surrounds the periphery of the first groove.
14. The method of manufacturing a semiconductor light emitting device according to claim 13, further comprising, after step S5: and the first light-emitting unit and the first light-isolating wall are provided with light-transmitting layers, the light-transmitting layers wrap the surface and the exposed side surface of the light-emitting chip and also fill a gap between the first light-isolating wall and the corresponding light-emitting chip.
15. The method of manufacturing a semiconductor light emitting device according to claim 13, further comprising, before step S5: the first light-emitting unit and the first light-isolating wall are provided with light-transmitting layers, the light-transmitting layers wrap the surface and the exposed side face of the light-emitting chip and also fill gaps between the first light-isolating wall and the corresponding light-emitting chip;
removing part or all of the euphotic layer positioned at the periphery of the first light-emitting unit to form a hollow-out area exposing the first light isolation wall;
in step S5, a second light isolation wall is disposed in the hollow portion and on a part or all of the light-transmitting layer, and a bottom surface of the second light isolation wall is located on a surface of the first light isolation wall and/or in the first light isolation wall.
16. The manufacturing method of the semiconductor light emitting device according to claim 14 or 15, characterized by further comprising:
s6, roughening part or all of the surface of the second optical isolation wall; or the like, or, alternatively,
and roughening part or all of the surface of the second optical isolation wall and part or all of the surface of the light-transmitting layer.
17. The method of manufacturing a semiconductor light emitting device according to claim 13, further comprising the steps of:
and S7, arranging at least one circuit board on the second surface of the substrate, and electrically connecting the circuit board with the external connection pad.
18. The method of manufacturing a semiconductor light emitting device according to claim 13, wherein step S2 further includes: and arranging a second conductive circuit on the second surface of the substrate, and electrically connecting the second conductive circuit with the external bonding pad.
19. The method of manufacturing a semiconductor light emitting device according to claim 18, further comprising:
and S7, arranging an electronic component on the second surface of the substrate, and enabling the electronic component to be in conductive connection with the second conductive circuit.
20. The method for manufacturing a semiconductor light emitting device according to claim 13, wherein the step S4 includes the steps of:
s4-1, coating a first light isolation wall on the first surface of the substrate and covering the light emitting chip;
s4-2, arranging a mask on the surface of the first optical isolation wall;
s4-3, exposing and curing the first light isolation wall which is not covered by the mask;
s4-4, removing the mask;
s4-5, developing and removing the first light isolation wall covered by the mask to form the first groove and expose the first light emitting unit corresponding to the first groove; alternatively, the first and second electrodes may be,
the step S4 includes the steps of:
s4-1, coating a first light isolation wall on the first surface of the substrate and covering the light emitting chip;
s4-2, arranging a mask on the surface of the first optical isolation wall;
s4-3, exposing the first light isolation wall which is not covered by the mask;
s4-4, removing the mask;
s4-5, developing and removing the first light isolation wall uncovered by the mask to form the first groove and expose the first light emitting unit corresponding to the first groove; alternatively, the first and second electrodes may be,
the step S4 includes the steps of:
s4-1, coating a first light isolation wall on the first surface of the substrate and covering the light emitting chip;
s4-2, removing the first optical isolation wall covering the surface of the light-emitting chip;
and S4-3, curing the first light isolation wall left on the substrate.
21. The method for manufacturing a semiconductor light emitting device according to claim 13, wherein the step S5 includes the steps of:
s5-1, coating a second optical isolation wall on the first optical isolation wall, and covering the light-emitting chip;
s5-2, arranging a mask on the surface of the second optical isolation wall;
s5-3, exposing and curing the second optical isolation wall which is not covered by the mask;
s5-4, removing the mask;
s5-5, developing and removing the second optical isolation wall covered by the mask to form a second groove communicated with the first groove, and exposing the first light-emitting unit corresponding to the second groove and the first groove; alternatively, the first and second electrodes may be,
the step S5 includes the steps of:
s5-1, coating a second optical isolation wall on the first optical isolation wall, and covering the light-emitting chip;
s5-2, arranging a mask on the surface of the second optical isolation wall;
s5-3, exposing the second optical isolation wall which is not covered by the mask;
s5-4, removing the mask;
s5-5, developing and removing the second optical isolation wall uncovered by the mask to form a second groove communicated with the first groove, and exposing the first light-emitting unit corresponding to the second groove and the first groove; alternatively, the first and second electrodes may be,
the step S5 includes the steps of:
s5-1, arranging the second light isolation wall on the first light isolation wall along the periphery of the first groove;
and S5-2, solidifying the second light isolation wall.
22. The method of manufacturing a semiconductor light emitting device as claimed in claim 13, wherein before the step S4, a plurality of the substrates are joined with their sides closely opposed to each other;
in step S4, the first optical isolation walls cover all the first surfaces of the substrates.
CN202010072623.5A 2020-01-21 2020-01-21 Semiconductor light emitting device and method of manufacturing the same Pending CN111162065A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202010072623.5A CN111162065A (en) 2020-01-21 2020-01-21 Semiconductor light emitting device and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202010072623.5A CN111162065A (en) 2020-01-21 2020-01-21 Semiconductor light emitting device and method of manufacturing the same

Publications (1)

Publication Number Publication Date
CN111162065A true CN111162065A (en) 2020-05-15

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Family Applications (1)

Application Number Title Priority Date Filing Date
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