CN111161524A - Testing device - Google Patents
Testing device Download PDFInfo
- Publication number
- CN111161524A CN111161524A CN201911265245.6A CN201911265245A CN111161524A CN 111161524 A CN111161524 A CN 111161524A CN 201911265245 A CN201911265245 A CN 201911265245A CN 111161524 A CN111161524 A CN 111161524A
- Authority
- CN
- China
- Prior art keywords
- module
- signal
- signals
- fpga
- dsp
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- G—PHYSICS
- G08—SIGNALLING
- G08C—TRANSMISSION SYSTEMS FOR MEASURED VALUES, CONTROL OR SIMILAR SIGNALS
- G08C23/00—Non-electrical signal transmission systems, e.g. optical systems
- G08C23/06—Non-electrical signal transmission systems, e.g. optical systems through light guides, e.g. optical fibres
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/03—Arrangements for fault recovery
- H04B10/032—Arrangements for fault recovery using working and protection systems
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/0078—Avoidance of errors by organising the transmitted data in a format specifically designed to deal with errors, e.g. location
- H04L1/0083—Formatting with frames or packets; Protocol or part of protocol for error control
Abstract
The embodiment of the invention discloses a testing device, which comprises: the system comprises a field programmable gate array FPGA module, a digital signal processor DSP module and an ARM module of a simplified instruction microprocessor; the ARM module is used for setting parameters and sending the parameters to the DSP module; the FPGA module is used for receiving the telemetering signals, carrying out channelizing processing on the telemetering signals and sending the channelized signals to the DSP module; the DSP module is used for demodulating the channelized signals and returning the demodulated signals to the FPGA module; and sending a remote control signal to the FPGA module based on the parameter.
Description
Technical Field
The present invention relates to the field of communications technologies, and in particular, to a test apparatus.
Background
At present, devices used in the wired remote measurement testing stage of satellite ground testing are scattered, a plurality of devices are required to complete related testing functions in the testing process, the testing process and the operation mode are complex, the remote measurement full function can not be rapidly realized, in addition, under the testing scene with high security requirement, the random plugging of serial port cables is not allowed to change the device parameters, and the device use is very inconvenient. There is currently no effective solution to this problem.
Disclosure of Invention
In view of the above, embodiments of the present invention provide a testing apparatus to solve at least one problem in the prior art.
In order to achieve the above purpose, the technical solution of the embodiment of the present invention is realized as follows:
an embodiment of the present invention provides a testing apparatus, where the apparatus includes: the system comprises a field programmable gate array FPGA module, a digital signal processor DSP module and an ARM module of a simplified instruction microprocessor; wherein the content of the first and second substances,
the ARM module is used for setting parameters and sending the parameters to the DSP module;
the FPGA module is used for receiving the telemetering signals, carrying out channelizing processing on the telemetering signals and sending the channelized signals to the DSP module;
the DSP module is used for demodulating the channelized signals and returning the demodulated signals to the FPGA module; and receiving the parameters and sending the parameters to the FPGA module.
In an optional embodiment, the FPGA module comprises: the analog module is used for generating data based on the telemetering signal, converting the data and carrying out self-loop test on the processed data
In an optional embodiment, the FPGA module comprises: and the decoding module is used for decoding the telemetry signal and displaying the decoding processing state to the ARM module.
In an optional embodiment, the FPGA module comprises: and the remote control module is used for generating remote control data and generating a remote control signal based on the remote control data.
In an optional embodiment, the FPGA module comprises: and the signal isolation module is used for performing optical coupling isolation on the differential signals in the telemetering signals and dividing the isolated signals into two paths for output.
In an optional embodiment, the FPGA module comprises: a first conversion module and a second conversion module; wherein the content of the first and second substances,
the first conversion module is used for converting the telemetry signal into an optical signal transmitted by an optical fiber;
the second conversion module is used for converting the optical signal into an electrical signal and generating data based on the electrical signal.
In an alternative embodiment, the DSP module includes a signal generation module for receiving the parameter and generating a control signal based on the parameter.
In an alternative embodiment, the DSP module and the FPGA module communicate via a bus.
In an alternative embodiment, the apparatus further comprises: and the serial port module is used for connecting the DSP module and the ARM module and realizing serial port communication between the DSP module and the ARM module.
In an alternative embodiment, the DSP module and the FPGA module communicate via a bus.
The embodiment of the invention provides a testing device, which comprises: the system comprises a field programmable gate array FPGA module, a digital signal processor DSP module and an ARM module of a simplified instruction microprocessor; the ARM module is used for setting parameters and sending the parameters to the DSP module; the FPGA module is used for receiving the telemetering signals, carrying out channelizing processing on the telemetering signals and sending the channelized signals to the DSP module; the DSP module is used for demodulating the channelized signals and returning the demodulated signals to the FPGA module; and receiving the parameters and sending the parameters to the FPGA module. In the embodiment of the invention, the parameters of the equipment can be set at any time through the architecture design of the ARM, the DSP and the FPGA, the test process and the operation mode are simple, and the full functions of remote control and remote measurement can be quickly realized.
Drawings
FIG. 1 is a schematic structural diagram of an embodiment of a testing apparatus according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a data transmission flow in the simulation module according to an embodiment of the present invention;
FIG. 3 is a diagram illustrating a format of a data frame in a simulation module according to an embodiment of the present invention;
FIG. 4 is a block diagram illustrating a PCM decoding function according to an embodiment of the present invention;
fig. 5 is a schematic diagram of a remote control data transmission flow provided in an embodiment of the present invention;
fig. 6 is a schematic diagram of a format of a remote control data frame according to an embodiment of the present invention;
FIG. 7 is a schematic diagram of a signal isolation circuit according to an embodiment of the present invention;
fig. 8 is a schematic diagram of a dual-fiber self-healing network according to an embodiment of the present invention.
Detailed Description
So that the manner in which the features and aspects of the embodiments of the present invention can be understood in detail, a more particular description of the embodiments of the invention, briefly summarized above, may be had by reference to the embodiments, some of which are illustrated in the appended drawings.
An embodiment of the present invention provides a testing apparatus, and fig. 1 is a schematic structural diagram of an implementation manner of the testing apparatus provided in the embodiment of the present invention, as shown in fig. 1, the apparatus includes: the system comprises a field programmable gate array FPGA module 101, a digital signal processor DSP module 102 and a reduced instruction microprocessor ARM module 103; wherein the content of the first and second substances,
the ARM module 103 is used for setting parameters and sending the parameters to the DSP module 102;
the FPGA module 101 is configured to receive a telemetry signal, perform channelization processing on the telemetry signal, and send a channelized signal to the DSP module 102;
the DSP module 102 is configured to demodulate the channelized signal and return the demodulated signal to the FPGA module 101; and receiving the parameters and sending the parameters to the FPGA module 101.
In the embodiment of the present invention, the ARM module 103 may implement a liquid crystal display control function when running a Linux operating system, and specifically, the ARM module 103 is provided with a panel, so that a user may set parameters of the baseband device through the panel, and may also change the parameters of the baseband device at any time without changing the parameters of the baseband device by means of an external device.
In the embodiment of the invention, the testing device can be used for testing wired signals, the wired test is directly connected with a satellite digital system and used for receiving Pulse Code Modulation (PCM) signals, which are also called baseband signals; in the actual satellite test, the radio frequency channel test adopts intermediate frequency baseband equipment such as imported Cortex to complete the remote measurement and remote control transceiving function of intermediate frequency signals. Finally, the function of mutual backup and comparison with the radio frequency channel is realized, and further, the wired signal test is realized.
The FPGA module 101 receives a telemetry signal, converts the telemetry signal into a PCM signal, performs channelization processing on the PCM signal to separate signals of different frequency bands, completes separation of the PCM signal on a frequency domain, and sends the channelized signal to the DSP module 102 in the form of a burst packet, where the burst packet may be sent in a data polling manner.
In the embodiment of the present invention, after the DSP module 102 completes data transceiving of the burst packet, the signal after channelization processing in the burst packet is demodulated, and the demodulated signal is sent to the ARM module 101.
The embodiment of the invention can simplify the operation mode, and the invention uses the front-end display screen to display the state and control the equipment in view of the mode that the existing equipment is controlled by a serial port mode, thereby being convenient for the operation of a tester.
In an optional embodiment of the present invention, the FPGA module 101 includes: and the simulation module is used for generating data based on the telemetry signal, converting the data and carrying out simulation test on the processed data.
In this embodiment, the simulation module may include an analog telemetry signal source, which may simulate a wired telemetry signal prior to a whole satellite test, and may be used for a closed-loop self-test. Specifically, the simulation module can generate the telemetry signal into data by designing a data source generation algorithm, a data scrambling algorithm and a data modulation algorithm, and realize the functions of data serial-parallel conversion, data scrambling, NRZ modulation and the like in the FPGA. Wherein the telemetry signal may generate data in a plurality of code patterns including 55 codes, AA codes, step codes, pseudo-random numbers, file data, and the like. The simulation module may include a scrambling module that may scramble serial data according to a polynomial h (x) of x8+ x7+ x5+ x3+1, and a Non-Return to zero (NRZ) modulation module, and the frame header is not scrambled. The NRZ modulation module may receive a continuous data stream and differentially modulate it. The NRZ modulation module can completely belong to a physical layer, does not distinguish whether a frame header exists, can judge whether current data is consistent with previous data during NRZ modulation, and generates corresponding output. For convenience of understanding, an example is described here, and fig. 2 is a schematic diagram of a data transmission flow in the analog module according to an embodiment of the present invention; as shown in fig. 2. As an example, in fig. 2, file data is generated based on the telemetry signal, and the file data is transmitted sequentially through the data generation module, the parallel-serial conversion module, the scrambling module, and the NRZ modulation module. FIG. 3 is a diagram illustrating a format of a data frame in a simulation module according to an embodiment of the present invention; as shown in fig. 3, the format of the data frame includes a frame header, a frame count, frame contents, and a user defined code.
The embodiment of the invention can integrate the functions of remote measurement simulation, remote control generation, remote measurement receiving and the like, can realize multi-path remote control output and multi-path PCM remote measurement receiving, changes the prior test modes of a plurality of test devices and a plurality of control software, simplifies the test devices and simplifies the test flow.
In an optional embodiment of the present invention, the FPGA module 101 includes: and the decoding module is used for decoding the telemetry signal and displaying the decoding processing state to the ARM module.
In this embodiment, the decoding module may receive the PCM telemetry signal, and perform decoding processes such as PCM signal descrambling, decoding, frame synchronization, and the like on the telemetry signal PCM. The decoding processing procedure can add algorithms such as descrambling, RS decoding, convolution decoding and the like. PCM telemetry signal decoding status may include search, check, synchronization, verification. And the state of the decoding process can be displayed to the ARM module through the DSP module, and the current working state is displayed on a panel in the ARM module. For convenience of understanding, the example is illustrated here, and fig. 4 is a schematic diagram of a PCM decoding function provided by an embodiment of the present invention; as shown in fig. 4. As an example, in fig. 4, the decoding module may include a PCM demodulation parameter configuration module, and after the telemetry signal is input to the PCM demodulation parameter configuration module, the telemetry signal is output as a multi-channel signal through corresponding decoding processing, and is also output in a synchronous state to be displayed to the ARM module.
The device provided by the embodiment of the invention can receive the telemetering signals at a high code rate, so that the testing device has a 1M code rate telemetering receiving function, integrates data analysis functions such as equipment control, data comparison, frame counting statistics and the like, has a synchronous comparison function of at most three paths of data, and enhances the data analysis capability.
In an optional embodiment of the present invention, the FPGA module comprises: and the remote control module is used for generating remote control data and generating a remote control signal based on the remote control data.
In this embodiment, the remote control module may be a wired remote control module, and the remote control module may receive remote control data sent by remote control front-end software, convert the remote control data into a PCM (RS422) signal and send the PCM signal to a satellite integrated electronic subsystem related device, where the PCM signal may be set with a signal code type (NRZ-L, NRZ-S, NRZ-M), a code rate, and a data frame format (frame length, frame synchronization header). The FPGA module 101 automatically triggers sending each time it receives remote control data. When remote control data is not transmitted, the remote control module has 2 states: state 1 is a suspended state, and no output is sent; and the state 2 is an idle state and continuously transmits idle codes. Once the remote control data is written into the FPGA module 101 from the DSP module 102, the current remote control data is sent, and the idle code continues to be sent when the sending of the remote control data is finished. If the idle code is not enabled, the module does not make any output. For convenience of understanding, an example is described here, and fig. 5 is a schematic diagram of a remote control data transmission flow provided by an embodiment of the present invention; as shown in fig. 5. As an example, in fig. 5, remote control data is obtained based on the remote control signal, and then the remote control data is transmitted sequentially through a remote control generation module, a parallel-to-serial conversion module, and an NRZ modulation module (NRZ modulation for short). Fig. 6 is a schematic diagram of a format of a remote control data frame according to an embodiment of the present invention; as shown in fig. 6, the format of the remote control data frame includes a preamble, remote control frame contents, and an idle code.
In an optional embodiment of the present invention, the FPGA module comprises: and the signal isolation module is used for performing optical coupling isolation on the differential signals in the telemetering signals and dividing the isolated signals into two paths for output.
In this embodiment, the signal isolation module may include a signal isolation circuit, and the signal isolation circuit includes an optical fiber medium conversion module, and as an example, the optical fiber medium conversion module may include an optical fiber medium converter. The purpose of the design of the signal isolation circuit is to avoid the influence of the optical fiber medium conversion module on the satellite equipment, or damage to the satellite equipment caused by the problem of the ground circuit, or even burn the satellite equipment. The signal isolation circuit design can comprehensively isolate satellite-ground signals. For convenience of understanding, the example is illustrated here, and fig. 7 is a schematic diagram of a signal isolation circuit provided by an embodiment of the present invention; as shown in fig. 7. As an example, in fig. 7, the isolation signal may be divided into telemetry 422 differential signal isolation and differential signal conversion chip power isolation. The satellite telemetry 422 differential signal is converted into a single-ended TTL level signal through a differential signal receiving chip, the single-ended TTL level signal is buffered and then enters the optical coupler to realize optical coupling isolation, an output signal after the optical coupling isolation is divided into two paths, one path enters the optical fiber medium conversion module, and the other path enters the level signal conversion module. Because the code rate of the telemetering signal is high, a common optical coupling isolation device can possibly influence the signal, and a high-speed optical coupling can be adopted in the signal isolation module to realize the isolation function so as to meet the telemetering signal with the 1M code rate.
The embodiment of the invention adds an isolation design. By adopting a hardware data isolation design, the ground test equipment is ensured not to influence the satellite, and the problem of the on-satellite equipment caused by the problem of the ground equipment is avoided.
In an optional embodiment of the present invention, the FPGA module 101 includes: a first conversion module and a second conversion module; wherein the content of the first and second substances,
the first conversion module is used for converting the telemetry signal into an optical signal transmitted by an optical fiber;
the second conversion module is used for converting the optical signal into an electrical signal and generating data based on the electrical signal.
In this embodiment, the first conversion module may include an isolation conversion module and an optical fiber conversion module, and the satellite downlink wired telemetry signal is converted from an electrical signal of an RS422 level standard to an optical signal capable of being transmitted over a long-distance optical fiber by turning on the isolation conversion module and the optical fiber conversion module. The second conversion module can comprise an optical fiber conversion module and a PCM decoding module, optical signals transmitted by optical fibers by the satellite wired telemetry front-end equipment can be recovered into LVTTL electric signals by starting the optical fiber conversion module and the PCM decoding module, then the LVTTL electric signals are accessed into the PCM decoding module for data decoding, and the decoded data are transmitted to the general control computer through the Ethernet interface.
For convenience of understanding, the example is described here, and fig. 8 is a schematic diagram of a dual-fiber self-healing network according to an embodiment of the present invention; as shown in fig. 8. As an example, in fig. 8, in order to adapt to long-distance transmission of wired signals or use of a transmission tower, the present invention designs an optical fiber medium conversion module to convert telemetry signals into optical signals to adapt to long-distance signal transmission. The embodiment of the invention designs a remote transmission mode, and can realize remote signal transmission through the optical transceiver.
In an alternative embodiment of the present invention, the DSP module 102 includes a signal generating module for receiving the parameter and generating a control signal based on the parameter.
In this embodiment, a panel is disposed in the ARM module 103, and a user can set parameters of the baseband device through the panel and also can change the parameters of the baseband device at any time, wherein the panel may be a front panel. The signal generation module in the DSP module 102 may receive the parameter at any time, generate a control signal based on the parameter, where the control signal may be used to control the FPGA module 101, and the control signal may also be sent to the ARM module 103.
In an optional embodiment of the present invention, the ARM module 103 includes a display module, configured to receive the control signal and display a control function based on the control signal.
In this embodiment, the display module may include a state display module and a control display module, and the state display module may display the state of the control signal; the control display module can display the control function of the control signal.
In an optional embodiment of the present invention, the ARM module 103 and the DSP module 102 communicate via a serial port.
In this embodiment, a serial port module may be disposed between the ARM module 103 and the DSP module 102, and the serial port module is connected to the ARM module 103 and the DSP module 102, so that the ARM module 103 and the DSP module 102 perform serial port communication through an interface in the serial port module. In addition, interfaces can also be arranged on the ARM module 103 and the DSP module 102, and serial port communication is performed through the interfaces.
In an alternative embodiment of the present invention, the DSP module 102 and the FPGA module 101 communicate via a bus.
In this embodiment, the DSP module 102 and the FPGA module 101 communicate with each other in a bus manner to transmit parameters and telemetry data.
In an optional embodiment of the invention, the apparatus further comprises: and the Ethernet interface module is used for acquiring the demodulated signal and sending the demodulated signal to an upper computer.
In this embodiment, the ethernet interface module may be a TCP/IP ethernet port, and the ethernet interface module connects the DSP module 102 to the upper computer.
The device provided by the embodiment of the invention adopts the ideas of modularization and hierarchical design to divide the module into a plurality of independent functional modules according to the function. In order to improve the real-time performance and flexibility of the module, a multithreading management control technology is adopted for design. The whole processing task is divided into a user input monitoring thread, a command processing thread, a data processing and graphic display thread, a control management thread and the like, and each thread corresponds to a corresponding functional module to realize different functions. The threads are independent and communicate with each other, and are scheduled and executed under the coordination control of the main thread. In addition, the module in the embodiment of the invention is designed with a data comparison function, has at most three telemetry data synchronous comparison functions, can detect whether data is lost or not and whether data has error codes or not, can set an asymmetric byte, and provides a more convenient and comprehensive data analysis function for testers.
The embodiment of the invention provides a testing device, which comprises: the system comprises a field programmable gate array FPGA module, a digital signal processor DSP module and an ARM module of a simplified instruction microprocessor; the ARM module is used for setting parameters and sending the parameters to the DSP module; the FPGA module is used for receiving the telemetering signals, carrying out channelizing processing on the telemetering signals and sending the channelized signals to the DSP module; the DSP module is used for demodulating the channelized signals and returning the demodulated signals to the FPGA module; and sending a remote control signal to the FPGA module based on the parameter. In the embodiment of the invention, the parameters of the equipment can be set at any time through the architecture design of the ARM, the DSP and the FPGA, the test process and the operation mode are simple, and the full functions of remote control and remote measurement can be quickly realized.
It is to be understood that the embodiments described herein may be implemented in hardware, software, firmware, middleware, microcode, or any combination thereof. For a hardware implementation, the Processing units may be implemented within one or more Application Specific Integrated Circuits (ASICs), Digital Signal Processors (DSPs), Digital Signal Processing Devices (DSPDs), Programmable Logic Devices (PLDs), FPGAs, general purpose processors, controllers, micro-controllers, microprocessors, other electronic units designed to perform the functions described herein, or a combination thereof.
For a software implementation, the techniques described herein may be implemented with modules (e.g., procedures, functions, and so on) that perform the functions described herein. The software codes may be stored in a memory module and executed by the control unit. The memory module may be implemented in the control unit or external to the control unit.
The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and all the changes or substitutions should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the appended claims.
It should be appreciated that reference throughout this specification to "one embodiment" or "an embodiment" means that a particular feature, structure or characteristic described in connection with the embodiment is included in at least one embodiment of the present invention. Thus, the appearances of the phrases "in one embodiment" or "in an embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. It should be understood that, in various embodiments of the present invention, the sequence numbers of the above-mentioned processes do not mean the execution sequence, and the execution sequence of each process should be determined by its function and inherent logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention. The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
In the embodiments provided in the present invention, it should be understood that the disclosed method and apparatus can be implemented in other ways. The above-described device embodiments are merely illustrative, for example, the division of the unit is only a logical functional division, and there may be other division ways in actual implementation, such as: multiple units or components may be combined, or may be integrated into another system, or some features may be omitted, or not implemented. In addition, the coupling, direct coupling or communication connection between the components shown or discussed may be through some interfaces, and the indirect coupling or communication connection between the devices or units may be electrical, mechanical or other forms.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, that is, may be located in one place, or may be distributed on a plurality of network units; some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, all the functional units in the embodiments of the present invention may be integrated into one processing module, or each unit may be separately used as one unit, or two or more units may be integrated into one unit; the integrated unit can be realized in a form of hardware, or in a form of hardware plus a software functional unit. Those of ordinary skill in the art will understand that: all or part of the steps for implementing the method embodiments may be implemented by hardware related to program instructions, and the program may be stored in a computer readable storage medium, and when executed, the program performs the steps including the method embodiments; and the aforementioned storage medium includes: a mobile storage device, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
The methods disclosed in the several method embodiments provided by the present invention can be combined arbitrarily without conflict to obtain new method embodiments.
Features disclosed in several of the product embodiments provided by the invention may be combined in any combination to yield new product embodiments without conflict.
The features disclosed in the several method or apparatus embodiments provided by the present invention may be combined arbitrarily, without conflict, to arrive at new method embodiments or apparatus embodiments.
The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and all the changes or substitutions should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the appended claims.
Claims (10)
1. A test apparatus, the apparatus comprising: the system comprises a field programmable gate array FPGA module, a digital signal processor DSP module and an ARM module of a simplified instruction microprocessor; wherein the content of the first and second substances,
the ARM module is used for setting parameters and sending the parameters to the DSP module;
the FPGA module is used for receiving the telemetering signals, carrying out channelizing processing on the telemetering signals and sending the channelized signals to the DSP module;
the DSP module is used for demodulating the channelized signals and returning the demodulated signals to the FPGA module; and receiving the parameters and sending the parameters to the FPGA module.
2. The apparatus of claim 1, wherein the FPGA module comprises: and the simulation module is used for generating data based on the telemetry signal, converting the data and carrying out self-loop test on the processed data.
3. The apparatus of claim 1, wherein the FPGA module comprises: and the decoding module is used for decoding the telemetry signal and displaying the decoding processing state to the ARM module.
4. The apparatus of claim 1, wherein the FPGA module comprises: and the remote control module is used for generating remote control data and generating a remote control signal based on the remote control data.
5. The apparatus of claim 1, wherein the FPGA module comprises: and the signal isolation module is used for performing optical coupling isolation on the differential signals in the telemetering signals and dividing the isolated signals into two paths for output.
6. The apparatus of claim 1, wherein the FPGA module comprises: a first conversion module and a second conversion module; wherein the content of the first and second substances,
the first conversion module is used for converting the telemetry signal into an optical signal transmitted by an optical fiber;
the second conversion module is used for converting the optical signal into an electrical signal and generating data based on the electrical signal.
7. The apparatus of claim 1, wherein the DSP module comprises a signal generation module configured to receive the parameter and generate a control signal based on the parameter.
8. The apparatus of claim 7, wherein the ARM module comprises a display module configured to receive the control signal and display a control function based on the control signal.
9. The apparatus of claim 1, wherein the ARM module and the DSP module communicate via a serial port.
10. The apparatus of claim 1, wherein the DSP module and the FPGA module communicate over a bus.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911265245.6A CN111161524B (en) | 2019-12-11 | 2019-12-11 | Testing device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911265245.6A CN111161524B (en) | 2019-12-11 | 2019-12-11 | Testing device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN111161524A true CN111161524A (en) | 2020-05-15 |
| CN111161524B CN111161524B (en) | 2022-03-04 |
Family
ID=70556972
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201911265245.6A Active CN111161524B (en) | 2019-12-11 | 2019-12-11 | Testing device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN111161524B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116437070A (en) * | 2023-03-29 | 2023-07-14 | 东方空间技术(山东)有限公司 | Terminal state detection system, method, computer equipment and storage medium |
Citations (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101059773A (en) * | 2007-02-07 | 2007-10-24 | 北京航空航天大学 | Bus model-based embedded system emulated platform |
| CN101800587A (en) * | 2009-12-30 | 2010-08-11 | 哈尔滨工业大学 | PCM code stream simulator with two working modes and FPGA working method in simulator |
| CN102520715A (en) * | 2011-12-28 | 2012-06-27 | 北京航空航天大学 | Universal satellite ground overall control test system |
| CN102645928A (en) * | 2012-01-19 | 2012-08-22 | 中国电子科技集团公司第十研究所 | Test platform for baseband equipment of test control system |
| CN102801435A (en) * | 2012-06-28 | 2012-11-28 | 航天东方红卫星有限公司 | C3I system applicable to small satellite launch site |
| CN203014825U (en) * | 2012-11-30 | 2013-06-19 | 中国空间技术研究院 | PCM interface test device |
| US20130272152A1 (en) * | 2012-04-17 | 2013-10-17 | Eutelsat S A | Method for testing an amplification path for telecommunications satellite repeater |
| CN103501203A (en) * | 2013-09-26 | 2014-01-08 | 北京空间飞行器总体设计部 | Laser satellite-ground communication link test system suitable for remote sensing satellite |
| CN103684575A (en) * | 2013-11-29 | 2014-03-26 | 中国空间技术研究院 | Digital intermediate frequency measurement and control platform based on embedded technology |
| KR20140137827A (en) * | 2013-05-24 | 2014-12-03 | 한국항공우주산업 주식회사 | On Board Computer for the LEO Satellite |
| CN105137807A (en) * | 2015-08-12 | 2015-12-09 | 上海卫星工程研究所 | Universal full-digital housekeeping simulation platform |
| CN105337674A (en) * | 2015-09-22 | 2016-02-17 | 电子科技大学 | Space measurement and control communication system comprehensive testing verification platform |
| CN205430259U (en) * | 2016-03-23 | 2016-08-03 | 上海航天测控通信研究所 | Count general ground integration testing system that passes transmitter |
| KR101711543B1 (en) * | 2016-02-11 | 2017-03-02 | 국방과학연구소 | An apparatus for encoding data in a distributed telemetry encoder system |
| CN106774106A (en) * | 2016-11-22 | 2017-05-31 | 航天恒星科技有限公司 | Embedded satellite monitoring platform |
| CN206293978U (en) * | 2016-12-27 | 2017-06-30 | 陕西中兴祥林电子科技有限公司 | A kind of distribution power automation terminal |
| CN107769836A (en) * | 2017-09-13 | 2018-03-06 | 长光卫星技术有限公司 | Satellite General automatic test platform and its data interactive method |
| CN107896130A (en) * | 2017-12-18 | 2018-04-10 | 长光卫星技术有限公司 | Satellite measurement and control ground comprehensive test system based on PXI framework |
-
2019
- 2019-12-11 CN CN201911265245.6A patent/CN111161524B/en active Active
Patent Citations (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101059773A (en) * | 2007-02-07 | 2007-10-24 | 北京航空航天大学 | Bus model-based embedded system emulated platform |
| CN101800587A (en) * | 2009-12-30 | 2010-08-11 | 哈尔滨工业大学 | PCM code stream simulator with two working modes and FPGA working method in simulator |
| CN102520715A (en) * | 2011-12-28 | 2012-06-27 | 北京航空航天大学 | Universal satellite ground overall control test system |
| CN102645928A (en) * | 2012-01-19 | 2012-08-22 | 中国电子科技集团公司第十研究所 | Test platform for baseband equipment of test control system |
| US20130272152A1 (en) * | 2012-04-17 | 2013-10-17 | Eutelsat S A | Method for testing an amplification path for telecommunications satellite repeater |
| CN102801435A (en) * | 2012-06-28 | 2012-11-28 | 航天东方红卫星有限公司 | C3I system applicable to small satellite launch site |
| CN203014825U (en) * | 2012-11-30 | 2013-06-19 | 中国空间技术研究院 | PCM interface test device |
| KR20140137827A (en) * | 2013-05-24 | 2014-12-03 | 한국항공우주산업 주식회사 | On Board Computer for the LEO Satellite |
| CN103501203A (en) * | 2013-09-26 | 2014-01-08 | 北京空间飞行器总体设计部 | Laser satellite-ground communication link test system suitable for remote sensing satellite |
| CN103684575A (en) * | 2013-11-29 | 2014-03-26 | 中国空间技术研究院 | Digital intermediate frequency measurement and control platform based on embedded technology |
| CN105137807A (en) * | 2015-08-12 | 2015-12-09 | 上海卫星工程研究所 | Universal full-digital housekeeping simulation platform |
| CN105337674A (en) * | 2015-09-22 | 2016-02-17 | 电子科技大学 | Space measurement and control communication system comprehensive testing verification platform |
| KR101711543B1 (en) * | 2016-02-11 | 2017-03-02 | 국방과학연구소 | An apparatus for encoding data in a distributed telemetry encoder system |
| CN205430259U (en) * | 2016-03-23 | 2016-08-03 | 上海航天测控通信研究所 | Count general ground integration testing system that passes transmitter |
| CN106774106A (en) * | 2016-11-22 | 2017-05-31 | 航天恒星科技有限公司 | Embedded satellite monitoring platform |
| CN206293978U (en) * | 2016-12-27 | 2017-06-30 | 陕西中兴祥林电子科技有限公司 | A kind of distribution power automation terminal |
| CN107769836A (en) * | 2017-09-13 | 2018-03-06 | 长光卫星技术有限公司 | Satellite General automatic test platform and its data interactive method |
| CN107896130A (en) * | 2017-12-18 | 2018-04-10 | 长光卫星技术有限公司 | Satellite measurement and control ground comprehensive test system based on PXI framework |
Non-Patent Citations (2)
| Title |
|---|
| 何铭俊等: "一体化小卫星综合测试系统的设计", 《计算机测量与控制》 * |
| 王瑞等: "基于PXI总线的遥测信号测试平台的设计", 《微型机与应用》 * |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116437070A (en) * | 2023-03-29 | 2023-07-14 | 东方空间技术(山东)有限公司 | Terminal state detection system, method, computer equipment and storage medium |
| CN116437070B (en) * | 2023-03-29 | 2023-12-29 | 东方空间技术(山东)有限公司 | Terminal state detection system, method, computer equipment and storage medium |
Also Published As
| Publication number | Publication date |
|---|---|
| CN111161524B (en) | 2022-03-04 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US9602226B2 (en) | Distributed spectrum analyzer and method of spectrum analysis applying same | |
| EP3568929B1 (en) | Apparatus and method for monitoring optical links | |
| CN107360584B (en) | RRU (remote radio unit) testing system and method | |
| CN105306156A (en) | Remote sensing satellite data transmission product automatic testing system and method | |
| CN102988048B (en) | Magnetic resonance fiber spectrometer and RF Receiving Device thereof | |
| CN107294627B (en) | Whole machine testing and aging method and system for RRU | |
| CN111161524B (en) | Testing device | |
| CN107426016B (en) | Design method of high-reliability ground measurement and control link for satellite emission area electrical test | |
| CN109150300A (en) | Multi-path digital signal transmission by optical fiber test equipment | |
| KR20160021264A (en) | Communication method and device | |
| CN106330324B (en) | Control method and device | |
| KR101488776B1 (en) | Method And Apparatus for Monitoring Wireless Signal In Cloud-RAN | |
| CN113472389B (en) | Low-delay configurable wireless rapid frequency hopping system based on FPGA | |
| CN104660989A (en) | Optical fiber-to-full configuration type Camera link real-time image optical transceiver based on FPGA (Field Programmable Gate Array) | |
| CN103812562A (en) | Method and device for prolonging transmission distance of passive optical network | |
| CN203352596U (en) | Near-end monitoring equipment, far-end monitoring equipment and distributed base station monitoring system | |
| CN108512623A (en) | The conjunction fibre QKD system and its transmission method of quantum channel and classical channel | |
| TWI609575B (en) | Portable WDM interface device and method | |
| CN106656362B (en) | Detection method and device | |
| CN101668228A (en) | Device and method for testing interface | |
| CN112187795A (en) | High-speed medium-voltage carrier encryption transparent transmission device | |
| CN204392249U (en) | The integral system of remote sensing satellite receiving system | |
| CN107294630B (en) | Simulation test system of carrier wave-micropower dual-mode module | |
| CN202503520U (en) | High-speed Ethernet optical module and radio-frequency data transmission device thereof | |
| CN210536850U (en) | Optical network protocol analyzer |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |