CN111158265B - Simulation device of power management chip - Google Patents
Simulation device of power management chip Download PDFInfo
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- CN111158265B CN111158265B CN202010073781.2A CN202010073781A CN111158265B CN 111158265 B CN111158265 B CN 111158265B CN 202010073781 A CN202010073781 A CN 202010073781A CN 111158265 B CN111158265 B CN 111158265B
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B17/00—Systems involving the use of models or simulators of said systems
- G05B17/02—Systems involving the use of models or simulators of said systems electric
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2855—Environmental, reliability or burn-in testing
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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Abstract
The invention relates to an analog device of a power management chip, which comprises a power input end, a feedback signal input end, a driving signal output end and a sampling signal input end, wherein the feedback signal input end is connected with the sampling signal input end; the power supply processing unit is connected with the power supply input end; a feedback signal processing unit connected to the feedback signal input terminal to output a first control signal; the trigger unit is connected with the feedback signal processing unit and the sampling signal input end to output a trigger signal; the PWM control unit is connected with the trigger unit to output a second control signal; the driving unit is connected with the PWM control unit to output a driving signal; the reference voltage unit is respectively connected with the power supply processing unit and the feedback signal processing unit and used for providing a reference voltage signal; the debugging parameter input end is connected with the reference voltage unit and used for receiving debugging parameters; the reference voltage unit outputs a reference voltage signal according to the debugging parameter. The invention can truly obtain the test results under various environments.
Description
Technical Field
The invention relates to the field of hardware simulation systems of power management chips, in particular to an analog device of a power management chip.
Background
The development period of the semiconductor chip is long, and the modification and the function expansion need to be accurately demonstrated in the design process. Software and hardware simulation systems can help designers determine the functionality of a chip faster during the design process. The hardware simulation system reconstructs the functions of the simulated chip on a circuit, has higher cost but is applied to more complex chip design due to real-time response. However, for simplicity, the conventional simulation system is limited by circuit element selection or speed limitation caused by circuit size expansion, and the ratio of the simulation system to the simulated object can only realize the basic function of the system, but parameter changes of the simulated object caused by manufacturing factors are ignored, so that the characteristics of the simulated object to the system under condition changes, such as temperature changes, cannot be truly simulated, and the characteristics can only be estimated by means of a long-time software model.
Disclosure of Invention
The present invention provides an analog device of a power management chip, aiming at the above-mentioned defects in the prior art.
The technical scheme adopted by the invention for solving the technical problems is as follows: an analog device for constructing a power management chip comprises
The device comprises a power input end, a feedback signal input end, a driving signal output end and a sampling signal input end, wherein the power input end is used for being externally connected with a power supply input, the feedback signal input end is used for receiving a feedback signal, the driving signal output end is used for outputting a driving signal, and the sampling signal input end is used for acquiring a sampling signal;
the power supply processing unit is connected with the power supply input end and used for providing power supply voltage for the internal working circuit;
the feedback signal processing unit is connected with the feedback signal input end and used for receiving the feedback signal to output a first control signal;
the trigger unit is connected with the feedback signal processing unit and the sampling signal input end and used for receiving the first control signal and the sampling signal to output a trigger signal;
the PWM control unit is connected with the trigger unit and used for receiving the trigger signal to output a second control signal;
the driving unit is connected with the PWM control unit and used for receiving the second control signal to output the driving signal;
the reference voltage unit is respectively connected with the power supply processing unit and the feedback signal processing unit and is used for providing a reference voltage signal;
a debugging parameter input end connected with the reference voltage unit and used for receiving debugging parameters;
and the reference voltage unit outputs the reference voltage signal according to the debugging parameter.
Preferably, the debugging parameter input end comprises a plurality of debugging parameter input ends, and the plurality of debugging parameter input ends are used for simultaneously inputting a plurality of different debugging parameters.
Preferably, the debugging parameters include temperature parameters and manufacturing parameters of the power management chip;
the plurality of debugging parameter inputs comprise a first debugging parameter input used for inputting the temperature parameter and a second debugging parameter input used for inputting the manufacturing parameter.
Preferably, the manufacturing parameter includes a manufacturing number of the power management chip.
Preferably, the method further comprises the following steps: the clock unit is respectively connected with the PWM control unit and the trigger unit and used for providing a clock signal; and/or the under-voltage protection unit is connected with the power supply processing unit, and the reference voltage unit is connected with the under-voltage protection unit.
Preferably, the clock unit includes:
a standard clock output unit for providing a standard clock signal,
the first storage unit is used for storing a clock characteristic curve of the clock signal corresponding to the debugging parameter;
and the clock signal output unit is respectively connected with the debugging parameter input end, the first storage unit and the standard clock output unit and is used for adjusting the standard clock signal according to the debugging parameter and the clock characteristic curve and outputting the corresponding clock signal.
Preferably, the trigger unit includes a comparing unit and a leading edge blanking unit, the leading edge blanking unit is respectively connected to the output end of the comparing unit and the clock unit, the equidirectional input end of the comparing unit is connected to the sampling signal input end, and the reverse input end of the comparing unit is connected to the feedback signal processing unit.
Preferably, the reference voltage unit includes:
a standard voltage output unit for providing a standard voltage signal;
a second storage unit for storing a voltage characteristic curve of the reference voltage signal corresponding to the debugging parameter;
and the reference voltage signal output unit is respectively connected with the debugging parameter input end, the second storage unit and the standard voltage output unit and is used for adjusting the standard voltage signal according to the debugging parameter and the voltage characteristic curve and outputting the corresponding reference voltage signal.
Preferably, the feedback signal comprises a voltage feedback signal and/or a current feedback signal;
the feedback signal processing unit comprises a voltage feedback signal processing unit and/or a current feedback signal processing unit.
Preferably, the feedback signal processing unit further comprises a first gain control circuit connected to the voltage feedback signal processing unit, and the reference voltage unit is connected to the first gain control circuit; and/or
The feedback signal processing unit further comprises a second gain control circuit connected with the current feedback signal processing unit, and the reference voltage unit is connected with the second gain control circuit.
The power management chip simulation device has the following beneficial effects: the influence of the environment on the simulated object can be flexibly adjusted, so that test results in various environments can be really obtained.
Drawings
The invention will be further described with reference to the following drawings and examples, in which:
FIG. 1 is a schematic diagram of an embodiment of an analog device of a power management chip according to the present invention;
FIG. 2 is a schematic circuit diagram of an embodiment of an analog device of a power management chip according to the present invention;
FIG. 3 is a schematic diagram of an operating circuit of an analog device of a power management chip according to an embodiment of the invention.
Detailed Description
For a more clear understanding of the technical features, objects and effects of the present invention, embodiments of the present invention will now be described in detail with reference to the accompanying drawings.
As shown in fig. 1 and fig. 2, in a first embodiment of an analog device 100 of a power management chip according to the present invention, the analog device includes a power input terminal 110 for receiving an external power input, a feedback signal input terminal 120 for receiving a feedback signal, a driving signal output terminal 140 for outputting a driving signal, and a sampling signal input terminal 130 for obtaining a sampling signal; a power processing unit 200 connected to the power input terminal 110 for providing a power supply voltage to the internal operating circuit; a feedback signal processing unit 500 connected to the feedback signal input terminal 120 for receiving a feedback signal to output a first control signal; the trigger unit 600 is connected with the feedback signal processing unit 500 and the sampling signal input terminal 130, and is used for receiving the first control signal and the sampling signal to output a trigger signal; a PWM control unit 300 connected to the trigger unit 600 for receiving the trigger signal to output a second control signal; a driving unit 400 connected to the PWM control unit 300 for receiving the second control signal to output a driving signal; a reference voltage unit 800 respectively connected to the power processing unit 200 and the feedback signal processing unit 500 for providing a reference voltage signal; a debug parameter input terminal 150 connected to the reference voltage unit 800 for receiving debug parameters; the reference voltage unit 800 outputs a reference voltage signal according to the debugging parameter. Specifically, an external power supply is connected to supply power to the internal circuit through the power input end 110, a feedback parameter of the power chip is obtained through the feedback signal input end 120, the feedback signal processing unit 500 outputs a first control signal according to the feedback parameter of the feedback signal input end 120, a sampling parameter of the power chip is obtained through the sampling signal input end 130 to obtain a corresponding sampling signal, the trigger unit 600 receives the first control signal and the sampling signal, generates a trigger signal according to the first control signal and the sampling signal, triggers the PWM control unit 300 to output a second control signal through the trigger signal, and the drive unit 400 receives the second control signal to generate a drive signal to drive the power chip to operate. The input end 150 of the debugging parameter is connected to the reference voltage unit 800, and the reference voltage unit 800 outputs a corresponding reference voltage signal according to the inputted debugging parameter. The debugging parameters input by the debugging parameter input terminal 150 can be set as required, and the debugging parameters are input by changing the debugging parameters, so that the simulation test of the control circuits of various power supply chips under the set manufacturing characteristics can be realized.
In an embodiment, the debugging parameter input terminal 150 includes a plurality of debugging parameter input terminals 150, and the debugging parameter input terminal 150 is configured to input a plurality of different debugging parameters simultaneously, specifically, when simulating the control circuit of the power chip, it may consider a plurality of different influencing factors, and set the corresponding debugging parameter according to different influencing factors, that is, a plurality of debugging parameter input terminals 150 may be set, and a plurality of different debugging parameters are output simultaneously through the plurality of debugging parameter input terminals 150. That is, it is understood that each debug parameter input 150 may input a corresponding debug parameter.
Optionally, the debugging parameters include temperature parameters and manufacturing parameters of the power management chip; the plurality of debug parameter inputs 150 includes a first debug parameter input for inputting a temperature parameter and a second debug parameter input for inputting a manufacturing parameter. Specifically, the selection is made by increasing the temperature parameters and the process. The temperature parameters are input through the first debugging parameter input end and the manufacturing parameters are input through the second debugging parameter input end, so that the reference voltage in the simulation system is manufactured along with the temperature and the process to simulate the operation result of the chip in a real way.
Further, the manufacturing parameter includes a manufacturing number of the power management chip. Specifically, the operation parameters of the same circuit are different under the same working conditions of temperature, voltage and the like by adopting different processes according to the power management chip. The input of the manufacturing parameters may number the different processes. Such as process 1, process 2, etc.
Optionally, in an embodiment, the analog device 100 of the power management chip of the invention further includes a clock unit 700, respectively connected to the PWM control unit 300 and the trigger unit 600, for providing a clock signal; in another embodiment, the analog device of the power management chip of the invention further includes an under-voltage protection unit 900 connected to the power processing unit 200, the reference voltage unit 800 is connected to the under-voltage protection unit 900, and specifically, the clock unit 700 can generate a clock signal to control the switching frequency of the PWM control unit 300, that is, the switching frequency of the PWM control unit 300 is controlled by the switching frequency control module 320 controlled by a signal output by the clock signal of the clock unit 700. And may acquire a corresponding trigger signal according to the clock signal to trigger the PWM control unit 300 through the trigger signal. In addition, in the analog device of the power management chip of the present invention, the under-voltage protection unit 900 may be used to pre-process the power processing unit 200, that is, determine whether the output voltage of the power processing unit 200 meets the working requirement of the internal circuit according to the reference voltage output by the reference voltage unit 800, and if not, turn off the output of the power processing unit 200 through the under-voltage protection unit to protect the internal working circuit.
Further, the clock unit 700 includes: a standard clock output unit 710 for providing a standard clock signal, a first storage unit 720 for storing a clock characteristic curve of the clock signal corresponding to the debugging parameter; and a clock signal output unit 730 respectively connected to the debugging parameter input terminal 150, the first storage unit 720 and the standard clock output unit 710, and configured to adjust the standard clock signal according to the debugging parameter and the clock characteristic curve and output a corresponding clock signal. Specifically, the clock unit 700 outputs a standard clock signal through the standard clock output unit 730, and outputs a corresponding clock signal according to the stored clock characteristic curve corresponding to the debugging parameter. So as to obtain debugging parameters with time characteristics, and provide real simulation results for the power management chip to test the power chip.
Optionally, the trigger unit 600 includes a comparing unit 620 and a leading edge blanking unit 610, the leading edge blanking unit 610 is respectively connected to the output terminal of the comparing unit 620 and the clock unit 700, the same-direction input terminal of the comparing unit 620 is connected to the sampling signal input terminal 130, and the reverse-direction input terminal of the comparing unit 620 is connected to the feedback signal processing unit 500. Specifically, the trigger unit 600 blanks the output result of the comparison unit 620 through the leading edge blanking unit 610, which takes the clock signal output by the clock unit 700 as a reference, and acquires the signal after blanking as a trigger signal to trigger the PWM control unit 300.
Optionally, the reference voltage unit 800 includes: a standard voltage output unit 810 for providing a standard voltage signal; a second storage unit 820 for storing a voltage characteristic curve of the reference voltage signal corresponding to the debugging parameter; a reference voltage signal output unit 830 respectively connected to the debugging parameter input terminal 150, the second storage unit 820 and the standard voltage output unit 810, and configured to adjust the standard voltage signal according to the debugging parameter and the voltage characteristic curve and output a corresponding reference voltage signal. Specifically, the reference voltage unit 800 outputs a standard voltage signal through the standard voltage output unit 830, and outputs a corresponding reference voltage signal according to a stored voltage characteristic curve corresponding to the debug parameter. So as to obtain debugging parameters with voltage characteristics, and to provide real simulation results for the power management chip so as to test the power chip.
Optionally, the feedback signal includes a voltage feedback signal and/or a current feedback signal; the feedback signal processing unit 500 includes a voltage feedback signal processing unit 510 and/or a current feedback signal processing unit 530. Specifically, the obtaining of the feedback signal of the power chip may be obtaining of a voltage feedback signal, obtaining of a current feedback signal, or obtaining of the voltage feedback signal and the current feedback signal simultaneously, that is, in the analog device of the present invention, the voltage feedback signal processing unit 500 may be provided, or the current feedback signal processing unit 500 may be provided, or the voltage feedback signal processing unit and the current feedback signal processing unit may be provided simultaneously, so as to process the obtained feedback signals respectively, and then the test is completed.
Optionally, in an embodiment, the feedback signal processing unit 500 further includes a first gain control circuit 520 connected to the voltage feedback signal processing unit 510, and the reference voltage unit 800 is connected to the first gain control circuit 520; specifically, the voltage feedback signal may be amplified by the first gain control circuit 520 with reference to the reference voltage signal, and the output voltage value may be set by the corresponding output value setting module 550, so as to obtain a reasonable processing signal.
In another embodiment, the feedback signal processing unit 500 further comprises a second gain control circuit 540 connected to the current feedback signal processing unit 500, and the reference voltage unit 800 is connected to the second gain control circuit 540. Specifically, the current feedback signal may be amplified by the second gain control circuit with reference to the reference voltage signal, and the output current value may be set by the corresponding output value setting module 550, so as to obtain a reasonable processing signal.
As shown in fig. 3, in a specific application circuit of the analog device 100, vin is an input voltage, cin is an input capacitor, tx1 is a power converter transformer, which has 3 primary windings Np, ns, na; a main switch S1, a current sampling resistor Ris; r3, C3 and D2 form a clamping circuit; d1 is an output rectifier diode; and C2 is an output filter capacitor. When the main switch S1 is switched on, the current from the input end Vin stores energy for the transformer Tx1 through a path of the primary side Np, S1 and Ris of the transformer; when the main switch S1 is turned off, the energy stored in Tx1 is delivered to the output terminal to be supplied to the load. Rst provides the starting current for the controller. The working process of the connection of the simulation apparatus 100 and the transformer TX1 is as follows: the output of the auxiliary winding Na power supply is input through a current input end after being rectified, and the power supply is supplied to an internal circuit of the analog device through a linear voltage stabilizer; the voltage or output voltage and output current feedback quantity of the sampling auxiliary winding Na is obtained through sampling circuits R1 and R2 and is input to the analog device through a feedback signal input end; the simulation apparatus 100 sets the outputs of the reference voltage unit 800 and the reference clock unit 700 according to the input parameters of the debugging parameter input terminal (not shown in fig. 3), and the internal circuit performs corresponding operations and outputs a corresponding debugging signal through the driving signal output terminal 140 to control the transformer to perform corresponding operations. During the operation of the analog device 100, it may also obtain the sampling signal of the transformer TX1 through the sampling signal input terminal 130, so as to enable the analog device 100 to perform a corresponding operation.
It is to be understood that the foregoing examples, while indicating the preferred embodiments of the invention, are given by way of illustration and description, and are not to be construed as limiting the scope of the invention; it should be noted that, for a person skilled in the art, the above technical features can be freely combined, and several changes and modifications can be made without departing from the concept of the present invention, which all belong to the protection scope of the present invention; therefore, all equivalent changes and modifications made within the scope of the claims of the present invention should be covered by the claims of the present invention.
Claims (8)
1. An analog device of a power management chip, comprising:
the device comprises a power input end, a feedback signal input end, a driving signal output end and a sampling signal input end, wherein the power input end is used for being externally connected with a power supply input, the feedback signal input end is used for receiving a feedback signal, the driving signal output end is used for outputting a driving signal, and the sampling signal input end is used for acquiring a sampling signal;
the power supply processing unit is connected with the power supply input end and used for providing power supply voltage for the internal working circuit;
the feedback signal processing unit is connected with the feedback signal input end and used for receiving the feedback signal to output a first control signal;
the trigger unit is connected with the feedback signal processing unit and the sampling signal input end and used for receiving the first control signal and the sampling signal to output a trigger signal;
the PWM control unit is connected with the trigger unit and used for receiving the trigger signal to output a second control signal;
the driving unit is connected with the PWM control unit and used for receiving the second control signal to output the driving signal;
the reference voltage unit is respectively connected with the power supply processing unit and the feedback signal processing unit and is used for providing a reference voltage signal;
a debugging parameter input end connected with the reference voltage unit and used for receiving debugging parameters;
the clock unit is respectively connected with the PWM control unit and the trigger unit and used for providing clock signals;
wherein the content of the first and second substances,
the clock unit includes: the standard clock output unit is used for providing a standard clock signal, and the first storage unit is used for storing a clock characteristic curve of the clock signal corresponding to the debugging parameter; the clock signal output unit is respectively connected with the debugging parameter input end, the first storage unit and the standard clock output unit and is used for adjusting the standard clock signal according to the debugging parameter and the clock characteristic curve and outputting the corresponding clock signal;
the reference voltage unit includes: the standard voltage output unit is used for providing a standard voltage signal; a second storage unit for storing a voltage characteristic curve of the reference voltage signal corresponding to the debugging parameter; and the reference voltage signal output unit is respectively connected with the debugging parameter input end, the second storage unit and the standard voltage output unit and is used for adjusting the standard voltage signal according to the debugging parameter and the voltage characteristic curve and outputting the corresponding reference voltage signal.
2. The power management chip simulator of claim 1, wherein the debug parameter input comprises a plurality of debug parameter inputs for simultaneously inputting a plurality of different debug parameters.
3. The simulation apparatus of the power management chip according to claim 2, wherein the debugging parameters comprise a temperature parameter and a manufacturing parameter of the power management chip;
the plurality of debugging parameter inputs comprise a first debugging parameter input used for inputting the temperature parameter and a second debugging parameter input used for inputting the manufacturing parameter.
4. The power management chip simulator of claim 3, wherein the manufacturing parameter comprises a manufacturing number of the power management chip.
5. The analog device of the power management chip of claim 1, further comprising an under-voltage protection unit connected to the power processing unit, wherein the reference voltage unit is connected to the under-voltage protection unit.
6. The analog device of the power management chip of claim 1,
the trigger unit comprises a comparison unit and a leading edge blanking unit, the leading edge blanking unit is respectively connected with the output end of the comparison unit and the clock unit, the homodromous input end of the comparison unit is connected with the sampling signal input end, and the reverse input end of the comparison unit is connected with the feedback signal processing unit.
7. The analog device of the power management chip of claim 1, wherein the feedback signal comprises a voltage feedback signal and/or a current feedback signal;
the feedback signal processing unit comprises a voltage feedback signal processing unit and/or a current feedback signal processing unit.
8. The analog device of the power management chip of claim 7, wherein the feedback signal processing unit further comprises a first gain control circuit connected to the voltage feedback signal processing unit, and the reference voltage unit is connected to the first gain control circuit; and/or
The feedback signal processing unit further comprises a second gain control circuit connected with the current feedback signal processing unit, and the reference voltage unit is connected with the second gain control circuit.
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| JP2011114984A (en) * | 2009-11-27 | 2011-06-09 | Sanyo Electric Co Ltd | Switching control circuit, and power supply apparatus |
| CN102136846B (en) * | 2010-01-21 | 2013-11-06 | 天津里外科技有限公司 | Power management device and method |
| CN102868293A (en) * | 2012-09-10 | 2013-01-09 | 常州大学 | Slope compensating method and device of fixed turn-off time control switch converter |
| CN102931842A (en) * | 2012-10-12 | 2013-02-13 | 华为技术有限公司 | Chip dynamic voltage regulating circuit and terminal equipment |
| CN104656732B (en) * | 2014-12-31 | 2016-05-18 | 格科微电子（上海）有限公司 | Voltage reference circuit |
| CN105006966B (en) * | 2015-05-05 | 2017-08-15 | 深圳市稳先微电子有限公司 | A kind of Switching Power Supply control chip and inverse-excitation type AC DC converters |
| CN107294378A (en) * | 2017-06-27 | 2017-10-24 | 北京嘉楠捷思信息技术有限公司 | Circuit |
| CN211669520U (en) * | 2020-01-22 | 2020-10-13 | Msj系统有限责任公司 | Simulator of power management chip |
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