CN111147183A - Interleaving mapping method and de-interleaving de-mapping method of LDPC code words - Google Patents
Interleaving mapping method and de-interleaving de-mapping method of LDPC code words Download PDFInfo
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Abstract
An interleaving mapping method and a de-interleaving de-mapping method of LDPC code words comprise the steps of carrying out first bit interleaving on a check part in the LDPC code words to obtain check bit streams; splicing an information bit part in the LDPC code word and a check bit stream into the LDPC code word after first bit interleaving; dividing the LDPC code word after the first bit interleaving into a plurality of continuous bit sub-blocks according to a preset length, and transforming the arrangement sequence of the bit sub-blocks according to corresponding bit exchange patterns to form the LDPC code word after the second bit interleaving; writing the LDPC code words subjected to the second bit interleaving into a storage space according to a column sequence and reading the LDPC code words from the storage space according to a row sequence to obtain the LDPC code words subjected to the third bit interleaving; and performing constellation mapping on the LDPC code word after the third time of bit interleaving according to a constellation diagram to obtain a symbol stream. The interleaving mapping and de-interleaving de-mapping methods are selected according to different LDPC code tables, so that the system performance is better improved.
Description
Technical Field
The invention relates to the technical field of digital televisions, in particular to an interleaving mapping method and a de-interleaving de-mapping method of LDPC code words.
Background
In the existing broadcast communication standard, LDPC coding, bit interleaving and constellation mapping are the most common coding modulation methods. In different transmission systems, LDPC coding, bit interleaving and constellation mapping all need to be designed separately and debugged jointly to achieve the best channel performance. Therefore, how to form targeted bit interleaving for a specific LDPC codeword and constellation mapping is a technical problem in the art.
Disclosure of Invention
The problem to be solved by the invention is that in the prior art, targeted bit interleaving cannot be formed aiming at a specific LDPC code word and a constellation mapping mode.
In order to solve the above problem, an embodiment of the present invention provides an interleaving and mapping method for LDPC codewords, including the following steps: carrying out first-time bit interleaving on a check part in the LDPC code word to obtain check bit stream; splicing the information bit part in the LDPC code word and the check bit stream into the LDPC code word after the first bit interleaving; dividing the LDPC code word after the first bit interleaving into a plurality of continuous bit sub-blocks according to a preset length, and transforming the arrangement sequence of the bit sub-blocks according to a corresponding bit exchange pattern to form the LDPC code word after the second bit interleaving; writing the LDPC code words after the second bit interleaving into a storage space according to a column sequence and reading the LDPC code words from the storage space according to a row sequence to obtain LDPC code words after the third bit interleaving; performing constellation mapping on the LDPC code word after the third bit interleaving according to a corresponding constellation diagram to obtain a symbol stream; wherein the bit swap pattern and the constellation map both correspond to LDPC code tables of different code rates.
The embodiment of the invention also provides a de-interleaving and de-mapping method of the LDPC code word, which comprises the following steps: carrying out soft demapping processing on the symbol stream soft value data according to a corresponding constellation diagram to obtain bit soft value data; the symbol stream soft value data is obtained by the receiving end after the symbol stream obtained by the interleaving and mapping method of the LDPC code word is received by the receiving end and is subjected to fast Fourier transform; writing the bit soft value data into a storage space in a row sequence and reading the bit soft value data from the storage space in a column sequence to obtain bit soft value data subjected to bit de-interleaving for the first time; dividing the bit soft value data subjected to the first bit deinterleaving into a plurality of continuous bit soft value data sub-blocks according to a preset length, and transforming the arrangement sequence of the bit soft value data sub-blocks according to a corresponding bit exchange pattern to form bit soft value data subjected to second bit deinterleaving; performing third bit deinterleaving on the bit soft value data corresponding to the check part in the LDPC code word in the bit soft value data subjected to the second bit deinterleaving to obtain third bit deinterleaved bit soft value data; splicing the bit soft value data after the second bit deinterleaving and the bit soft value data after the third bit deinterleaving into a bit soft value data stream; and performing LDPC decoding processing on the bit soft value data stream to obtain decoded bit stream data.
Compared with the prior art, the technical scheme of the invention has the following advantages:
and selecting corresponding interleaving mapping and de-interleaving de-mapping methods aiming at different LDPC code tables so as to better improve the system performance.
Drawings
FIG. 1 is a flowchart illustrating an embodiment of an interleaving and mapping method for LDPC code words according to the present invention;
FIG. 2 is a flowchart illustrating a specific embodiment of a method for de-interleaving and de-mapping LDPC code words according to the present invention;
FIG. 3 is a schematic diagram of a first bit interleaving of a check portion in an LDPC codeword to obtain a check bit stream in the LDPC codeword interleaving and mapping method of the present invention;
fig. 4 is a schematic diagram of transforming the arrangement order of the bit sub-blocks according to the bit exchange pattern in the LDPC codeword interleaving and mapping method of the present invention.
Detailed Description
The inventor finds that in the prior art, targeted bit interleaving cannot be formed according to a specific LDPC code word and a constellation mapping mode.
In view of the above problems, the inventors have studied and provided an interleaving mapping method and a de-interleaving de-mapping method for LDPC codewords, and select corresponding interleaving mapping and de-interleaving de-mapping methods for different LDPC code tables to better improve system performance.
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below.
In the embodiment of the invention, the transmitter end is as follows: firstly, inputting a bit stream after source coding into an LDPC coder to code an LDPC code word with a specific code rate code length, then inputting the bit stream into a bit interleaver to perform interleaving processing according to a certain specific bit interleaving pattern method, then performing 16NUC constellation mapping and constellation mapping on data after bit interleaving processing, then performing modulation and emission to experience a channel. The receiver end is: and demodulating the data after passing through the channel, and inputting the demodulated data into a demapping module to perform QPSK demapping. And then inputting the bit soft value information output by the demapping module into a deinterleaving module for deinterleaving, then outputting the bit soft value information to an LDPC decoder, decoding the bit soft value information based on a specific LDPC code word, and finally decoding and outputting a bit stream.
Fig. 1 is a flowchart illustrating an embodiment of an LDPC codeword interleaving and mapping method according to the present invention. Referring to fig. 1, the interleaving mapping method of the LDPC codeword includes the steps of:
step S11: carrying out first-time bit interleaving on a check part in the LDPC code word to obtain check bit stream;
step S12: splicing the information bit part in the LDPC code word and the check bit stream into the LDPC code word after the first bit interleaving;
step S13: dividing the LDPC code word after the first bit interleaving into a plurality of continuous bit sub-blocks according to a preset length, and transforming the arrangement sequence of the bit sub-blocks according to a corresponding bit exchange pattern to form the LDPC code word after the second bit interleaving;
step S14: writing the LDPC code words after the second bit interleaving into a storage space according to a column sequence and reading the LDPC code words from the storage space according to a row sequence to obtain LDPC code words after the third bit interleaving;
step S15: performing constellation mapping on the LDPC code word after the third bit interleaving according to a corresponding constellation diagram to obtain a symbol stream; wherein the bit swap pattern and the constellation map both correspond to LDPC code tables of different code rates.
In this embodiment, the step S11 specifically includes the following steps: and writing the check parts in the LDPC code words into a storage space in a column sequence and reading out the check parts from the storage space in a row sequence to obtain check bit streams.
Specifically, the check portion that generates the LDPC codeword is bit interleaved: the check portion of the LDPC codeword has M bits, and is written into one memory space by columns, Q bits per column, and Q columns, that is, M is Q, and then read out in row order. The specific implementation process is shown in fig. 3.
In step S13, the LDPC codeword after the first bit interleaving is divided into a plurality of consecutive bit sub-blocks according to a predetermined length, where the predetermined length is 360. Further, the arrangement order of the bit sub-blocks is transformed according to the corresponding bit exchange pattern to form the LDPC code word after the second time of bit interleaving. The detailed process is shown in FIG. 4, (m)0,m1,...,mN/360-1) Is a bit swap pattern for a 360 length bit sub-block.
Specifically, the code length of the LDPC codeword in the LDPC code table is 64800. Different bit swap patterns are provided for LDPC codewords of different code rates.
In this embodiment, for a code table with code rate of 9/15, Nldpc＝64800q×q＝360×360, Q＝72。
The code table is as follows:
the corresponding bit-swapping pattern is:
72 56 93 45 153 107 157 174 24 75 113 11 31 67 70 34 131 160 145 9439 99 115 32 90 126 50 127 13 129 55 1 159 138 41 98 146 135 74 91 53 17 3 1866 175 119 20 27 97 83 61 16 7 103 104 89 73 84 130 57 164 179 88 29 60 161140 167 49 158 71 122 110 36 35 69 111 21 108 133 123 168 92 26 10 148 155 3844 65 77 117 86 106 101 141 15 150 124 47 59 96 143 176 8 125 4 64 46 162 2543 95 112 156 37 6 79 166 22 81 178 139 58 173 121 171 154 0 105 151 14 9 1230 134 137 136 62 76 87 142 114 102 23 42 78 120 19 68 128 169 165 147 172 802 152 40 109 149 163 85 144 100 132 118 82 63 5 51 177 33 170 48 116 28 54 52
it should be noted that, in this embodiment, each numerical value in the bit swap pattern refers to a position of the bit sub-block before bit swap. For example, the first value 7 in the bit swap pattern means that the 8 th bit sub-block that was not bit swapped now becomes the first bit sub-block.
The corresponding constellation table is:
in step S14, for example, for an LDPC codeword having a code length of 64800 bits (an LDPC codeword after second bit interleaving), the LDPC codeword is written into a storage space in a column order and read out from the storage space in a row order, wherein each column is 10800 bits, and there are six columns.
Then, the bit interleaved bit stream data (b)0,b1,...,bN-1) According to a 64NUC constellation diagram, decimal numbers corresponding to every four binary bit sequences are mapped to a certain constellation point to obtain a symbol stream (each complex symbol corresponds to one constellation point). For example, four bits '001100' correspond to a decimal number of 12, and then correspond to a constellation point 1.4632+0.2912i in the table, which is shown on the real number axis and imaginary number axis as real number axis 1.42 and imaginary number axis 0.3408. And then OFDM operation is carried out on the symbol stream in a modulation module, and a carrier is added for transmission.
In this embodiment, the LDPC codeword is obtained by performing a specific LDPC encoding on the source-encoded bit stream, where the specific LDPC encoding can be implemented by using the prior art.
Specifically, the specific LDPC codeword is one of four, which is a subblock size of L × L (L is usually 360), and the code table is as follows:
TABLE 1 Rate 9/15Nldpc＝64800q×q＝360×360,Q＝72
The coding method comprises the following steps:
splitting a source coded bit stream into information blocks, wherein each information block consists of K information bits and is represented as S ═ S (S)0,s1,...,sK-1). According to the specific LDPC encoding of FIG. 1, it is based on S ═ S0,s1,...,sK-1) Generating M parity bits P ═ (P)0,p1,...,pM-1). I.e. to obtain N bits of the code word Λ ═ (λ)0,λ1,...,λN-1) Wherein N ═ K + M. Λ may in turn be denoted as Λ ═ s0,s1,...,sK-1,p0,p1,...,pM-1)。
The encoding steps are as follows:
1) initializing lambdai＝si，i＝0,1,...,K-1。pj＝0，j＝0,1,...,M-1
2) For information bit lambda0For the first in the code tableThe check bits with row number as address are accumulated, taking the code rate 9/15 in table 1 and the code table of code length 64800 as an example:
3) for the next L-1 information bits, (typically L360), λ m1, 2.. said, L-1, each information bit is accumulated with a check bit addressed as y as follows:
y＝{x+(mmod360)×Q}modM
wherein x is and λ0For the relevant check bit addresses, taking table 1 as an example, x is the number in the first row of the code table:
and wherein
M is the number of check bits and also the number of check matrix rows, and L is the size of the sub-block in the check matrix, typically 360.
Taking the code words of table 1 as an example,
4) for the L-th information bit lambdaLThe check bits are accumulated according to the second row digital address in the code table. Same for the L-th information bit lambdaLAnd accumulating the check bits according to the formula in the step 3) continuously for the next L-1 information bits, wherein x of the formulas in the three steps is the number of the second row in the code table.
5) Similarly, for the 2L, 3L, 4L … iL … information bits, the parity bits are accumulated according to the addresses of the 3 rd, 4 th, 5 th, …, (i +1) L …) rows in the code table, respectively, and the L-1 information bits after the information bits are accumulated according to the formula in step 3), note that at this time, x of the formula in the three steps corresponds to the row in the code table corresponding to the current iL information bit, such as the L-1 bits after the iL information bit, and the address of the corresponding x when the formula in step 3) is applied is the (i +1) th row in the code table.
6) After the step 5), the following operations are carried out:
The embodiment of the invention also provides a de-interleaving and de-mapping method of the LDPC code words. Fig. 2 is a flowchart illustrating a specific embodiment of a method for de-interleaving and de-mapping LDPC codewords according to the present invention. Referring to fig. 2, the method for de-interleaving and de-mapping the LDPC codeword includes the steps of:
step S21: carrying out soft demapping processing on the symbol stream soft value data according to a corresponding constellation diagram to obtain bit soft value data; the symbol stream soft value data is obtained by the receiving end after the symbol stream obtained by the interleaving and mapping method of the LDPC code words is subjected to fast Fourier transform;
step S22: writing the bit soft value data into a storage space in a row sequence and reading the bit soft value data from the storage space in a column sequence to obtain bit soft value data subjected to bit de-interleaving for the first time;
step S23: dividing the bit soft value data subjected to the first bit deinterleaving into a plurality of continuous bit soft value data sub-blocks according to a preset length, and transforming the arrangement sequence of the bit soft value data sub-blocks according to a corresponding bit exchange pattern to form bit soft value data subjected to second bit deinterleaving;
step S24: performing third bit deinterleaving on the bit soft value data corresponding to the check part in the LDPC code word in the bit soft value data subjected to the second bit deinterleaving to obtain third bit deinterleaved bit soft value data;
step S25: splicing the bit soft value data after the second bit deinterleaving and the bit soft value data after the third bit deinterleaving into a bit soft value data stream;
step S26: and performing LDPC decoding processing on the bit soft value data stream to obtain decoded bit stream data.
In this embodiment, the step S24 specifically includes: and writing the bit soft value data corresponding to the check part in the LDPC code word in the bit soft value data subjected to the second bit deinterleaving into a storage space in a row sequence and reading the bit soft value data from the storage space in a column sequence to obtain the bit soft value data subjected to the third bit deinterleaving.
Although the present invention has been described with reference to the preferred embodiments, it is not intended to limit the present invention, and those skilled in the art can make variations and modifications of the present invention without departing from the spirit and scope of the present invention by using the methods and technical contents disclosed above.
Claims (6)
1. An interleaving mapping method for LDPC code words is characterized by comprising the following steps:
carrying out first-time bit interleaving on a check part in the LDPC code word to obtain check bit stream;
splicing the information bit part in the LDPC code word and the check bit stream into the LDPC code word after the first bit interleaving;
dividing the LDPC code word after the first bit interleaving into a plurality of continuous bit sub-blocks according to a preset length, and transforming the arrangement sequence of the bit sub-blocks according to a corresponding bit exchange pattern to form the LDPC code word after the second bit interleaving;
writing the LDPC code words after the second bit interleaving into a storage space according to a column sequence and reading the LDPC code words from the storage space according to a row sequence to obtain LDPC code words after the third bit interleaving;
performing constellation mapping on the LDPC code word after the third bit interleaving according to a corresponding constellation diagram to obtain a symbol stream; wherein the bit swap pattern and the constellation map both correspond to LDPC code tables of different code rates.
2. The interleaving mapping method of LDPC codewords according to claim 1, wherein the first bit interleaving of the check portions in the LDPC codeword to obtain the check bit stream comprises:
and writing the check parts in the LDPC code words into a storage space in a column sequence and reading out the check parts from the storage space in a row sequence to obtain check bit streams.
3. The interleaving mapping method of LDPC codewords according to claim 1, wherein the predetermined length is 360 bits.
4. The interleaving mapping method of LDPC codewords according to claim 1, wherein the LDPC codewords in the LDPC code table have a code length of 64800 bits and a code rate of 9/15; the code table is as follows:
the corresponding bit-swapping pattern is: 7256934515310715717424751131131677034131160145943999115329012650127131295511591384198146135749153173186617511920279783611671031048973841305716417988296016114016749158711221103635691112110813312316892261014815538446577117861061011411515012447599614317681254644616225439511215637679166228117813958173121171154010515114912301341371366276871421141022342781201968128169165147172802152401091491638514410013211882635511773317048116285452
The corresponding constellation table is:
5. a method for de-interleaving and de-mapping LDPC code words is characterized by comprising the following steps:
carrying out soft demapping processing on the symbol stream soft value data according to a corresponding constellation diagram to obtain bit soft value data; wherein the symbol stream soft value data is obtained by fast Fourier transform of a symbol stream obtained by a receiving end by receiving the LDPC code word interleaving mapping method according to claim 1;
writing the bit soft value data into a storage space in a row sequence and reading the bit soft value data from the storage space in a column sequence to obtain bit soft value data subjected to bit de-interleaving for the first time;
dividing the bit soft value data subjected to the first bit deinterleaving into a plurality of continuous bit soft value data sub-blocks according to a preset length, and transforming the arrangement sequence of the bit soft value data sub-blocks according to a corresponding bit exchange pattern to form bit soft value data subjected to second bit deinterleaving;
performing third bit deinterleaving on the bit soft value data corresponding to the check part in the LDPC code word in the bit soft value data subjected to the second bit deinterleaving to obtain third bit deinterleaved bit soft value data;
splicing the bit soft value data after the second bit deinterleaving and the bit soft value data after the third bit deinterleaving into a bit soft value data stream;
and performing LDPC decoding processing on the bit soft value data stream to obtain decoded bit stream data.
6. The method for de-interleaving and de-mapping the LDPC codeword according to claim 5, wherein the third bit de-interleaving the bit soft value data corresponding to the parity portion in the LDPC codeword among the second bit de-interleaved bit soft value data to obtain the third bit de-interleaved bit soft value data comprises:
and writing the bit soft value data corresponding to the check part in the LDPC code word in the bit soft value data subjected to the second bit deinterleaving into a storage space in a row sequence and reading the bit soft value data from the storage space in a column sequence to obtain the bit soft value data subjected to the third bit deinterleaving.
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| EUROPEAN TELECOMMUNICATIONS STANDARDS INSTITUTE 2011: "Digital Video Broadcasting(DVB); Frame structure channel coding and modulation", 《EUROPEAN TELECOMMUNICATIONS STANDARDS INSTITUTE 2011》 * |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114499764A (en) * | 2022-03-11 | 2022-05-13 | Oppo广东移动通信有限公司 | Rate matching and de-matching method and device, mobile terminal and storage medium |
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| CN104868971A (en) | 2015-08-26 |
| CN104868971B (en) | 2019-12-13 |
| CN111147183B (en) | 2022-11-08 |
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