CN104901774B

CN104901774B - interleaving mapping method and de-interleaving de-mapping method of LDPC code words

Info

Publication number: CN104901774B
Application number: CN201410081264.4A
Authority: CN
Inventors: 张文军; 史毅俊; 管云峰; 何大治; 徐胤; 郭序峰
Original assignee: Shanghai National Engineering Research Center of Digital Television Co Ltd
Current assignee: Shanghai National Engineering Research Center of Digital Television Co Ltd
Priority date: 2014-03-06
Filing date: 2014-03-06
Publication date: 2019-12-13
Anticipated expiration: 2034-03-06
Also published as: CN111181572A; CN104901774A

Abstract

an interleaving mapping method and a de-interleaving de-mapping method of LDPC code words comprise the steps of carrying out first bit interleaving on a check part in the LDPC code words to obtain check bit streams; splicing an information bit part in the LDPC code word and a check bit stream into the LDPC code word after first bit interleaving; dividing the LDPC code word after the first bit interleaving into a plurality of continuous bit sub-blocks according to a preset length, and transforming the arrangement sequence of the bit sub-blocks according to corresponding bit exchange patterns to form the LDPC code word after the second bit interleaving; dividing the LDPC code word after the second bit interleaving into two parts, writing the two parts in the column sequence and reading out the two parts in the row sequence to obtain the LDPC code word after the third bit interleaving; and performing constellation mapping on the LDPC code word after the third time of bit interleaving according to a constellation diagram to obtain a symbol stream. The interleaving mapping and de-interleaving de-mapping methods are selected according to different LDPC code tables, so that the system performance is better improved.

Description

interleaving mapping method and de-interleaving de-mapping method of LDPC code words

Technical Field

the invention relates to the technical field of digital televisions, in particular to an interleaving mapping method and a de-interleaving de-mapping method of LDPC code words.

background

In the existing broadcast communication standard, LDPC coding, bit interleaving and constellation mapping are the most common coding modulation methods. In different transmission systems, LDPC coding, bit interleaving and constellation mapping all need to be designed separately and debugged jointly to achieve the best channel performance. Therefore, how to form targeted bit interleaving for a specific LDPC codeword and constellation mapping is a technical problem in the art.

Disclosure of Invention

The problem to be solved by the invention is that in the prior art, targeted bit interleaving cannot be formed aiming at a specific LDPC code word and a constellation mapping mode.

in order to solve the above problem, an embodiment of the present invention provides an interleaving and mapping method for LDPC codewords, including the following steps: carrying out first-time bit interleaving on a check part in the LDPC code word to obtain check bit stream; splicing the information bit part in the LDPC code word and the check bit stream into the LDPC code word after the first bit interleaving; dividing the LDPC code word after the first bit interleaving into a plurality of continuous bit sub-blocks according to a preset length, and transforming the arrangement sequence of the bit sub-blocks according to a corresponding bit exchange pattern to form the LDPC code word after the second bit interleaving; dividing the LDPC code word after the second bit interleaving into a first part and a second part, writing the two parts into a storage space in a column sequence, and reading the two parts from the storage space in a row sequence to obtain the LDPC code word after the third bit interleaving; performing constellation mapping on the LDPC code word after the third bit interleaving according to a corresponding constellation diagram to obtain a symbol stream; wherein the bit swap pattern and the constellation map both correspond to LDPC code tables of different code rates.

the embodiment of the invention also provides a de-interleaving and de-mapping method of the LDPC code word, which comprises the following steps: carrying out soft demapping processing on the symbol stream soft value data according to a corresponding constellation diagram to obtain bit soft value data; the symbol stream soft value data is obtained by the receiving end after the symbol stream obtained by the interleaving and mapping method of the LDPC code word is received by the receiving end and is subjected to fast Fourier transform; dividing the bit soft value data into a first part and a second part, writing the two parts into a storage space in a row sequence, and reading the two parts from the storage space in a column sequence to obtain the bit soft value data after the first bit de-interleaving; dividing the bit soft value data subjected to the first bit deinterleaving into a plurality of continuous bit soft value data sub-blocks according to a preset length, and transforming the arrangement sequence of the bit soft value data sub-blocks according to a corresponding bit exchange pattern to form bit soft value data subjected to second bit deinterleaving; performing third bit deinterleaving on the bit soft value data corresponding to the check part in the LDPC code word in the bit soft value data subjected to the second bit deinterleaving to obtain third bit deinterleaved bit soft value data; splicing the bit soft value data after the second bit deinterleaving and the bit soft value data after the third bit deinterleaving into a bit soft value data stream; and performing LDPC decoding processing on the bit soft value data stream to obtain decoded bit stream data.

Compared with the prior art, the technical scheme of the invention has the following advantages:

And selecting corresponding interleaving mapping and de-interleaving de-mapping methods aiming at different LDPC code tables so as to better improve the system performance.

drawings

FIG. 1 is a flowchart illustrating an embodiment of an interleaving and mapping method for LDPC code words according to the present invention;

FIG. 2 is a flowchart illustrating a specific embodiment of a method for de-interleaving and de-mapping LDPC code words according to the present invention;

FIG. 3 is a schematic diagram of a first bit interleaving of a check portion in an LDPC codeword to obtain a check bit stream in the LDPC codeword interleaving and mapping method of the present invention;

Fig. 4 is a schematic diagram of transforming the arrangement order of the bit sub-blocks according to the bit exchange pattern in the LDPC codeword interleaving and mapping method of the present invention.

Detailed Description

the inventor finds that in the prior art, targeted bit interleaving cannot be formed according to a specific LDPC code word and a constellation mapping mode.

in view of the above problems, the inventors have studied and provided an interleaving mapping method and a de-interleaving de-mapping method for LDPC codewords, and select corresponding interleaving mapping and de-interleaving de-mapping methods for different LDPC code tables to better improve system performance.

In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below.

In the embodiment of the invention, the transmitter end is as follows: firstly, inputting a bit stream after source coding into an LDPC coder to code an LDPC code word with a specific code rate code length, then inputting the bit stream into a bit interleaver to perform interleaving processing according to a certain specific bit interleaving pattern method, then performing 16NUC constellation mapping and constellation mapping on data after bit interleaving processing, then performing modulation and emission to experience a channel. The receiver end is: and demodulating the data after passing through the channel, and inputting the demodulated data into a demapping module to perform QPSK demapping. And then inputting the bit soft value information output by the demapping module into a deinterleaving module for deinterleaving, then outputting the bit soft value information to an LDPC decoder, decoding the bit soft value information based on a specific LDPC code word, and finally decoding and outputting a bit stream.

fig. 1 is a flowchart illustrating an embodiment of an LDPC codeword interleaving and mapping method according to the present invention. Referring to fig. 1, the interleaving mapping method of the LDPC codeword includes the steps of:

step S11: carrying out first-time bit interleaving on a check part in the LDPC code word to obtain check bit stream;

step S12: splicing the information bit part in the LDPC code word and the check bit stream into the LDPC code word after the first bit interleaving;

Step S13: dividing the LDPC code word after the first bit interleaving into a plurality of continuous bit sub-blocks according to a preset length, and transforming the arrangement sequence of the bit sub-blocks according to a corresponding bit exchange pattern to form the LDPC code word after the second bit interleaving;

step S14: dividing the LDPC code word after the second bit interleaving into a first part and a second part, writing the two parts into a storage space in a column sequence, and reading the two parts from the storage space in a row sequence to obtain the LDPC code word after the third bit interleaving;

step S15: performing constellation mapping on the LDPC code word after the third bit interleaving according to a corresponding constellation diagram to obtain a symbol stream; wherein the bit swap pattern and the constellation map both correspond to LDPC code tables of different code rates.

In this embodiment, the step S11 specifically includes the following steps: and writing the check parts in the LDPC code words into a storage space in a column sequence and reading out the check parts from the storage space in a row sequence to obtain check bit streams.

specifically, the check portion that generates the LDPC codeword is bit interleaved: the check portion of the LDPC codeword has M bits, and is written into one memory space in columns, Q bits per column, and Q columns, that is, M = Q × Q, and then read out in row order. The specific implementation process is shown in fig. 3.

In step S13, the LDPC codeword after the first bit interleaving is divided into a plurality of consecutive bit sub-blocks according to a predetermined length, where the predetermined length is 360. Further, the arrangement order of the bit sub-blocks is transformed according to the corresponding bit exchange pattern to form the LDPC code word after the second time of bit interleaving. The detailed process is shown in FIG. 4, (m)₀,m₁,...,m_N/360-1) Is a bit swap pattern for a 360 length bit sub-block.

Specifically, the code length of the LDPC codeword in the LDPC code table is 64800. Different bit swap patterns are provided for LDPC codewords of different code rates.

in this embodiment, for a code rate of 9/15 code table, N_ldpc＝64800_q×q＝360×360, Q=72。

the code table is as follows:

The corresponding bit-swapping pattern is:

It should be noted that, in this embodiment, each numerical value in the bit swap pattern refers to a position of the bit sub-block before bit swap. For example, the first value 133 in the bit swap pattern means that the 134 th sub-block of bits, which was not originally bit swapped, is now bit swapped to become the first sub-block of bits.

The corresponding constellation diagram is:

Constellation points	Plural symbols
		0	0.0851+0.2140i
1	0.0851+0.2140i
		2	0.1018+0.4311i

3	0.1069+0.4299i
		4	0.0990+0.2079i
5	0.1061+0.2044i
		6	0.2329+0.3768i
7	0.2284+0.3795i
		8	0.1102+0.7523i
9	0.1864+0.7372i
		10	0.1107+0.6249i
11	0.1421+0.6185i
		12	0.4542+0.6098i
13	0.3896+0.6530i
		14	0.3637+0.5201i
15	0.3371+0.5377i
		16	0.2140+0.0851i
17	0.2140+0.0851i
		18	0.4311+0.1018i
19	0.4299+0.1069i
		20	0.2079+0.0990i
21	0.2044+0.1061i
		22	0.3768+0.2329i
23	0.3795+0.2284i
		24	0.7523+0.1102i

25	0.7372+0.1864i
		26	0.6249+0.1107i
27	0.6185+0.1421i
		28	0.6098+0.4542i
29	0.6530+0.3896i
		30	0.5201+0.3637i
31	0.5377+0.3371i
		32	0.1637+1.6583i
33	0.4838+1.5946i
		34	0.1329+1.3464i
35	0.3928+1.2946i
		36	1.0570+1.2882i
37	0.7857+1.4695i
		38	0.8581+1.0459i
39	0.6379+1.1931i
		40	0.1106+0.9589i
41	0.2653+0.9281i
		42	0.1118+1.1038i
43	0.3195+1.0625i
		44	0.6001+0.7561i
45	0.4690+0.8437i
		46	0.7016+0.8595i

47	0.5255+0.9771i
		48	1.6583+0.1637i
49	1.5946+0.4838i
		50	1.3464+0.1329i
51	1.2946+0.3928i
		52	1.2882+1.0570i
53	1.4695+0.7857i
		54	1.0459+0.8581i
55	1.1931+0.6379i
		56	0.9589+0.1106i
57	0.9281+0.2653i
		58	1.1038+0.1118i
59	1.0625+0.3195i
		60	0.7561+0.6001i
61	0.8437+0.4690i
		62	0.8595+0.7016i
63	0.9771+0.5255i
		64	-0.0851+0.2140i
65	-0.0851+0.2140i
		66	-0.1018+0.4311i
67	-0.1069+0.4299i
		68	-0.0990+0.2079i

69	-0.1061+0.2044i
		70	-0.2329+0.3768i
71	-0.2284+0.3795i
		72	-0.1102+0.7523i
73	-0.1864+0.7372i
		74	-0.1107+0.6249i
75	-0.1421+0.6185i
		76	-0.4542+0.6098i
77	-0.3896+0.6530i
		78	-0.3637+0.5201i
79	-0.3371+0.5377i
		80	-0.2140+0.0851i
81	-0.2140+0.0851i
		82	-0.4311+0.1018i
83	-0.4299+0.1069i
		84	-0.2079+0.0990i
85	-0.2044+0.1061i
		86	-0.3768+0.2329i
87	-0.3795+0.2284i
		88	-0.7523+0.1102i
89	-0.7372+0.1864i
		90	-0.6249+0.1107i

91	-0.6185+0.1421i
		92	-0.6098+0.4542i
93	-0.6530+0.3896i
		94	-0.5201+0.3637i
95	-0.5377+0.3371i
		96	-0.1637+1.6583i
97	-0.4838+1.5946i
		98	-0.1329+1.3464i
99	-0.3928+1.2946i
		100	-1.0570+1.2882i
101	-0.7857+1.4695i
		102	-0.8581+1.0459i
103	-0.6379+1.1931i
		104	-0.1106+0.9589i
105	-0.2653+0.9281i
		106	-0.1118+1.1038i
107	-0.3195+1.0625i
		108	-0.6001+0.7561i
109	-0.4690+0.8437i
		110	-0.7016+0.8595i
111	-0.5255+0.9771i
		112	-1.6583+0.1637i

113	-1.5946+0.4838i
		114	-1.3464+0.1329i
115	-1.2946+0.3928i
		116	-1.2882+1.0570i
117	-1.4695+0.7857i
		118	-1.0459+0.8581i
119	-1.1931+0.6379i
		120	-0.9589+0.1106i
121	-0.9281+0.2653i
		122	-1.1038+0.1118i
123	-1.0625+0.3195i
		124	-0.7561+0.6001i
125	-0.8437+0.4690i
		126	-0.8595+0.7016i
127	-0.9771+0.5255i
		128	0.0851-0.2140i
129	0.0851-0.2140i
		130	0.1018-0.4311i
131	0.1069-0.4299i
		132	0.0990-0.2079i
133	0.1061-0.2044i
		134	0.2329-0.3768i

135	0.2284-0.3795i
		136	0.1102-0.7523i
137	0.1864-0.7372i
		138	0.1107-0.6249i
139	0.1421-0.6185i
		140	0.4542-0.6098i
141	0.3896-0.6530i
		142	0.3637-0.5201i
143	0.3371-0.5377i
		144	0.2140-0.0851i
145	0.2140-0.0851i
		146	0.4311-0.1018i
147	0.4299-0.1069i
		148	0.2079-0.0990i
149	0.2044-0.1061i
		150	0.3768-0.2329i
151	0.3795-0.2284i
		152	0.7523-0.1102i
153	0.7372-0.1864i
		154	0.6249-0.1107i
155	0.6185-0.1421i
		156	0.6098-0.4542i

157	0.6530-0.3896i
		158	0.5201-0.3637i
159	0.5377-0.3371i
		160	0.1637-1.6583i
161	0.4838-1.5946i
		162	0.1329-1.3464i
163	0.3928-1.2946i
		164	1.0570-1.2882i
165	0.7857-1.4695i
		166	0.8581-1.0459i
167	0.6379-1.1931i
		168	0.1106-0.9589i
169	0.2653-0.9281i
		170	0.1118-1.1038i
171	0.3195-1.0625i
		172	0.6001-0.7561i
173	0.4690-0.8437i
		174	0.7016-0.8595i
175	0.5255-0.9771i
		176	1.6583-0.1637i
177	1.5946-0.4838i
		178	1.3464-0.1329i

179	1.2946-0.3928i
		180	1.2882-1.0570i
181	1.4695-0.7857i
		182	1.0459-0.8581i
183	1.1931-0.6379i
		184	0.9589-0.1106i
185	0.9281-0.2653i
		186	1.1038-0.1118i
187	1.0625-0.3195i
		188	0.7561-0.6001i
189	0.8437-0.4690i
		190	0.8595-0.7016i
191	0.9771-0.5255i
		192	-0.0851-0.2140i
193	-0.0851-0.2140i
		194	-0.1018-0.4311i
195	-0.1069-0.4299i
		196	-0.0990-0.2079i
197	-0.1061-0.2044i
		198	-0.2329-0.3768i
199	-0.2284-0.3795i
		200	-0.1102-0.7523i

201	-0.1864-0.7372i
		202	-0.1107-0.6249i
203	-0.1421-0.6185i
		204	-0.4542-0.6098i
205	-0.3896-0.6530i
		206	-0.3637-0.5201i
207	-0.3371-0.5377i
		208	-0.2140-0.0851i
209	-0.2140-0.0851i
		210	-0.4311-0.1018i
211	-0.4299-0.1069i
		212	-0.2079-0.0990i
213	-0.2044-0.1061i
		214	-0.3768-0.2329i
215	-0.3795-0.2284i
		216	-0.7523-0.1102i
217	-0.7372-0.1864i
		218	-0.6249-0.1107i
219	-0.6185-0.1421i
		220	-0.6098-0.4542i
221	-0.6530-0.3896i
		222	-0.5201-0.3637i

223	-0.5377-0.3371i
		224	-0.1637-1.6583i
225	-0.4838-1.5946i
		226	-0.1329-1.3464i
227	-0.3928-1.2946i
		228	-1.0570-1.2882i
229	-0.7857-1.4695i
		230	-0.8581-1.0459i
231	-0.6379-1.1931i
		232	-0.1106-0.9589i
233	-0.2653-0.9281i
		234	-0.1118-1.1038i
235	-0.3195-1.0625i
		236	-0.6001-0.7561i
237	-0.4690-0.8437i
		238	-0.7016-0.8595i
239	-0.5255-0.9771i
		240	-1.6583-0.1637i
241	-1.5946-0.4838i
		242	-1.3464-0.1329i
243	-1.2946-0.3928i
		244	-1.2882-1.0570i

245	-1.4695-0.7857i
		246	-1.0459-0.8581i
247	-1.1931-0.6379i
		248	-0.9589-0.1106i
249	-0.9281-0.2653i
		250	-1.1038-0.1118i
251	-1.0625-0.3195i
		252	-0.7561-0.6001i
253	-0.8437-0.4690i
		254	-0.8595-0.7016i
255	-0.9771-0.5255i

in step S14, for example, for an LDPC codeword with a code length of 64800 bits (an LDPC codeword after second bit interleaving), the LDPC codeword is divided into a first part and a second part, wherein the first part has a length of 63360 bits, and the second part has a length of 1440 bits, and both the first part and the second part are written into a storage space in a column order and read out from the storage space in a row order, wherein each column has 8100 bits, and eight columns in total.

Then, the bit interleaved bit stream data (b)₀,b₁,...,b_N-1) According to the 256NUC constellation diagram, the decimal number corresponding to each eight binary bit sequences is mapped to a certain constellation point to obtain a symbol stream (each complex symbol corresponds to a constellation point). For example, eight bits of '00001100' correspond to a decimal number of 12, and then to a constellation point of 0.4542+0.6098i in the table, which is shown on the real and imaginary axes as, realNumber axis 0.4542, imaginary axis 0.6098. And then OFDM operation is carried out on the symbol stream in a modulation module, and a carrier is added for transmission.

in this embodiment, the LDPC codeword is obtained by performing a specific LDPC encoding on the source-encoded bit stream, where the specific LDPC encoding can be implemented by using the prior art.

Specifically, the specific LDPC codeword is one of four, which is a subblock size of L × L (L is usually 360), and the code table is as follows:

TABLE 1 code rate 9/15N_ldpc＝64800_{q×q＝360×360},Q=72

the coding method comprises the following steps:

Splitting a source coded bit stream into information blocks, wherein each information block consists of K information bits and is represented as S ═ S (S)₀,s₁,...,s_K-1)。according to the specific LDPC encoding of FIG. 1, it is based on S ═ S₀,s₁,...,s_K-1) Generating M parity bits P ═ (P)₀,p₁,...,p_M-1). I.e. to obtain N bits of the code word Λ ═ (λ)₀,λ₁,...,λ_N-1) Wherein N ═ K + M. Λ may in turn be denoted as Λ ═ s₀,s₁,...,s_K-1,p₀,p₁,...,p_M-1)。

The encoding steps are as follows:

1) Initializing lambda_i＝s_i，i＝0,1,...,K-1。p_j＝0，j＝0,1,...,M-1

2) For information bit lambda₀Accumulating the check bits using the first row number in the code table as the address, taking the code table with code rate 9/15 and code length 64800 as an example in table 1:

p₂₁₈＝p₂₁₈⊕λ₀，p₅₉₂＝p₅₉₂⊕λ₀，p₁₁₁₆＝p₁₁₁₆⊕λ₀，p₂₂₂₉＝p₂₂₂₉⊕λ₀， p₂₉₈₉＝p₂₉₈₉⊕λ₀，p₃₂₁₇＝p₃₂₁₇⊕λ₀，p₃₉₂₂＝p₃₉₂₂⊕λ₀，p₄₃₃₈＝p₄₃₃₈⊕λ₀……， p₂₄₈₈₈＝p₂₄₈₈₈⊕λ₀，p₂₅₇₅₅＝p₂₅₇₅₅⊕λ₀

3) For the next L-1 information bits, (typically L360), λ_mM =1, 2.. 1, L-1, each information bit is respectively aligned with an address according to y

and accumulating the parity bits:

y＝{x+(mmod360)×Q}modM

Wherein x is and λ₀For the relevant check bit addresses, taking table 1 as an example, x is the number in the first row of the code table:

and whereinM is the number of check bits and also the number of check matrix rows, and L is the size of the sub-block in the check matrix, typically 360.

Taking the code words of table 1 as an example,

p₂₉₀＝p₂₉₀⊕λ₀，p₆₆₄＝p₆₆₄⊕λ₀，p₁₁₈₈＝p₁₁₈₈⊕λ₀，p₂₃₀₁＝p₂₃₀₁⊕λ₀， p₃₀₆₁＝p₃₀₆₁⊕λ₀，p₃₂₈₉＝p₃₂₈₉⊕λ₀，p₃₉₉₄＝p₃₉₉₄⊕λ₀，p₄₄₁₀＝p₄₄₁₀⊕λ₀，……， p₂₄₉₆₀＝p₂₄₉₆₀⊕λ₀，p₂₅₈₂₂＝p₂₅₈₂₂⊕λ₀

4) for the L-th information bit lambda_Lthe check bits are accumulated according to the second row digital address in the code table. Same for the L-th information bit lambda_LAnd accumulating the check bits according to the formula in the step 3) continuously for the next L-1 information bits, wherein x of the formulas in the three steps is the number of the second row in the code table.

5) Similarly, for the 2L, 3L, and 4L … iL … information bits, the check bits are accumulated according to the addresses of the 3 rd, 4 th, 5 th, …, (i +1) L.. linear in the code table, respectively, and the L-1 information bits after the information bits are accumulated according to the formula in step 3), respectively, note that at this time, x of the three formulas corresponds to a line in the code table corresponding to the current iL information bit, for example, L-1 bits after the iL information bit, and when the formula in step 3) is applied, the corresponding address of x is the (i +1) th line in the code table.

6) After the step 5), the following operations are carried out:

p_i＝p_i⊕p_i-1Wherein i =1,2₁-1

The embodiment of the invention also provides a de-interleaving and de-mapping method of the LDPC code words. Fig. 2 is a flowchart illustrating a specific embodiment of a method for de-interleaving and de-mapping LDPC codewords according to the present invention. Referring to fig. 2, the method for de-interleaving and de-mapping the LDPC codeword includes the steps of:

step S21: carrying out soft demapping processing on the symbol stream soft value data according to a corresponding constellation diagram to obtain bit soft value data; the symbol stream soft value data is obtained by the receiving end after the symbol stream obtained by the interleaving and mapping method of the LDPC code words is subjected to fast Fourier transform;

Step S22: dividing the bit soft value data into a first part and a second part, writing the two parts into a storage space in a row sequence, and reading the two parts from the storage space in a column sequence to obtain the bit soft value data after the first bit de-interleaving;

Step S23: dividing the bit soft value data subjected to the first bit deinterleaving into a plurality of continuous bit soft value data sub-blocks according to a preset length, and transforming the arrangement sequence of the bit soft value data sub-blocks according to a corresponding bit exchange pattern to form bit soft value data subjected to second bit deinterleaving;

Step S24: performing third bit deinterleaving on the bit soft value data corresponding to the check part in the LDPC code word in the bit soft value data subjected to the second bit deinterleaving to obtain third bit deinterleaved bit soft value data;

Step S25: splicing the bit soft value data after the second bit deinterleaving and the bit soft value data after the third bit deinterleaving into a bit soft value data stream;

step S26: and performing LDPC decoding processing on the bit soft value data stream to obtain decoded bit stream data.

in this embodiment, the step S24 specifically includes: and writing the bit soft value data corresponding to the check part in the LDPC code word in the bit soft value data subjected to the second bit deinterleaving into a storage space in a row sequence and reading the bit soft value data from the storage space in a column sequence to obtain the bit soft value data subjected to the third bit deinterleaving.

Although the present invention has been described with reference to the preferred embodiments, it is not intended to limit the present invention, and those skilled in the art can make variations and modifications of the present invention without departing from the spirit and scope of the present invention by using the methods and technical contents disclosed above.

Claims

1. an interleaving mapping method for LDPC code words is characterized by comprising the following steps:

carrying out first-time bit interleaving on a check part in the LDPC code word to obtain check bit stream;

splicing the information bit part in the LDPC code word and the check bit stream into the LDPC code word after the first bit interleaving;

Dividing the LDPC code word after the first bit interleaving into a plurality of continuous bit sub-blocks according to a preset length, and transforming the arrangement sequence of the bit sub-blocks according to a corresponding bit exchange pattern to form the LDPC code word after the second bit interleaving;

Dividing the LDPC code word after the second bit interleaving into a first part and a second part, writing the two parts into a storage space according to the sequence of columns and reading the two parts from the storage space according to the sequence of rows to obtain the LDPC code word after the third bit interleaving;

performing constellation mapping on the LDPC code word after the third bit interleaving according to a corresponding constellation diagram to obtain a symbol stream; wherein the bit swap pattern and the constellation map both correspond to LDPC code tables of different code rates;

Wherein, the code length of the LDPC code word in the LDPC code table is 64800 bits, and the code rate is 9/15;

the code table is as follows:

The corresponding bit-swapping pattern is:

Each numerical value in the bit exchange pattern refers to the position of the bit sub-block before bit exchange;

The corresponding constellation diagram is:

。

2. The interleaving mapping method of LDPC codewords according to claim 1, wherein the first bit interleaving of the check portions in the LDPC codeword to obtain the check bit stream comprises:

And writing the check parts in the LDPC code words into a storage space in a column sequence and reading out the check parts from the storage space in a row sequence to obtain check bit streams.

3. the interleaving mapping method of LDPC codewords according to claim 1, wherein the predetermined length is 360 bits.

4. The interleaving mapping method of LDPC codeword according to claim 1, wherein the length of the LDPC codeword after the second bit interleaving is 64800 bits, the first part is 63360 bits, and the second part is 1440 bits.

5. The interleaving mapping method of LDPC codewords according to claim 1, wherein the number of columns in the column order is 8.

6. a method for de-interleaving and de-mapping LDPC code words is characterized by comprising the following steps:

carrying out soft demapping processing on the symbol stream soft value data according to a corresponding constellation diagram to obtain bit soft value data; wherein the symbol stream soft value data is obtained by fast Fourier transform of a symbol stream obtained by a receiving end by receiving the LDPC code word interleaving mapping method according to claim 1;

Dividing the bit soft value data into a first part and a second part, writing the two parts into a storage space in a row sequence, and reading the two parts from the storage space in a column sequence to obtain the bit soft value data after the first bit de-interleaving;

Dividing the bit soft value data subjected to the first bit deinterleaving into a plurality of continuous bit soft value data sub-blocks according to a preset length, and transforming the arrangement sequence of the bit soft value data sub-blocks according to a corresponding bit exchange pattern to form bit soft value data subjected to second bit deinterleaving;

performing third bit deinterleaving on the bit soft value data corresponding to the check part in the LDPC code word in the bit soft value data subjected to the second bit deinterleaving to obtain third bit deinterleaved bit soft value data;

Splicing the bit soft value data corresponding to the information bit part in the LDPC code word in the bit soft value data after the second bit deinterleaving and the bit soft value data after the third bit deinterleaving into a bit soft value data stream;

And performing LDPC decoding processing on the bit soft value data stream to obtain decoded bit stream data.

7. The method for de-interleaving and de-mapping the LDPC codeword according to claim 6, wherein the third bit de-interleaving the bit soft value data corresponding to the parity portion in the LDPC codeword in the second bit de-interleaved bit soft value data to obtain the third bit de-interleaved bit soft value data comprises:

and writing the bit soft value data corresponding to the check part in the LDPC code word in the bit soft value data subjected to the second bit deinterleaving into a storage space in a row sequence and reading the bit soft value data from the storage space in a column sequence to obtain the bit soft value data subjected to the third bit deinterleaving.