CN111147052B - Generating circuit for generating analog waveforms with same rising and falling slopes - Google Patents
Generating circuit for generating analog waveforms with same rising and falling slopes Download PDFInfo
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- CN111147052B CN111147052B CN201911372509.8A CN201911372509A CN111147052B CN 111147052 B CN111147052 B CN 111147052B CN 201911372509 A CN201911372509 A CN 201911372509A CN 111147052 B CN111147052 B CN 111147052B
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K4/00—Generating pulses having essentially a finite slope or stepped portions
- H03K4/06—Generating pulses having essentially a finite slope or stepped portions having triangular shape
Abstract
The invention discloses a generating circuit for generating analog waveforms with the same rising and falling slopes, which comprises an operational amplifier N1B, a compensation resistor R2, a compensation capacitor C2, an integration capacitor C1, a charge control bipolar transistor V1, a discharge control bipolar transistor V2, a voltage stabilizing diode V3, a loop control diode I V5, a loop control diode II V6, a switch control bipolar transistor V4, an electromagnetic relay J1A and a sampling resistor R1; the invention uses a small quantity of analog devices to minimize the use quantity of the operational amplifier by adopting a charge-discharge circuit separation design method; the generation of the analog waveforms with the same rising and falling slopes is realized, and the cost and the complexity of the waveform generator are reduced.
Description
Technical Field
The invention belongs to the technical field of waveform generation circuits, and particularly relates to a generation circuit for generating analog waveforms with the same rising and falling slopes.
Background
Because the multipath power supply products often need a certain turn-on and turn-off sequence, the electric equipment needs to be turned on and turned off after being turned on, and the turn-on interval time is the same as the turn-off interval time. The prior art may be controlled by means of analog or digital circuits.
The analog circuit control method can adopt a method for respectively adjusting the starting time of each path in the multipath power supply to indirectly adjust the sequence and the interval, but the method has the problem that the starting sequence can only be controlled and the shutdown sequence is difficult to control. A special time sequence control chip, such as LM3881, may be used to control, but the method only can give time sequence signals with fixed interval time, and cannot adjust the time sequence signals according to different conditions of power response time, so that the total on/off interval time (time sequence signal interval time output by the control chip + power response time) is still difficult to be completely consistent. The method can only be applied to the situation that the control paths are fewer (generally not more than 3 paths of output) and the time sequence is simpler.
The digital circuit control method can adopt a method of combining a digital timer and a counter to realize time sequence control. In particular by means of a general-purpose microcontroller or a general-purpose chip. Compared with an analog circuit control method, the method has higher control precision and flexibility and is easier to be fused with a digital control system. However, this method has the disadvantage of complex circuitry and is difficult to apply in simpler power supplies.
Disclosure of Invention
In view of this, the present invention provides a generating circuit for generating analog waveforms with the same rising and falling slopes, which can achieve consistency of interval time in the process of turning on and off multiple power supplies with a simple circuit structure.
The technical scheme for realizing the invention is as follows:
the generating circuit for generating the same rising and falling slope analog waveforms comprises an operational amplifier N1B, a compensation resistor R2, a compensation capacitor C2, an integration capacitor C1, a charge control bipolar transistor V1, a discharge control bipolar transistor V2, a voltage stabilizing diode V3, a loop control diode I V, a loop control diode II V6, a switch control bipolar transistor V4, an electromagnetic relay J1A and a sampling resistor R1;
the positive input end of the operational amplifier N1B inputs external reference voltage, the negative input end is respectively connected with the compensation resistor R2 and the first end of the compensation capacitor C2, and the output end is respectively connected with the second end of the compensation capacitor C2, the first end of the switch of the electromagnetic relay J1A, the emitter of the switch control bipolar transistor V4 and the cathode of the zener diode V3; the base electrode of the charge control bipolar transistor V1 is respectively connected with the collector electrode of the switch control bipolar transistor V4 and the second end of the switch of the electromagnetic relay J1A, the collector electrode of the V1 is connected with a power supply, and the emitter electrode of the V1 is respectively connected with the first end of the integrating capacitor C1 and the collector electrode of the discharge control bipolar transistor V2; the base electrode of V2 is connected with the anode of the voltage stabilizing diode V3, and the emitter of V2 is respectively connected with the second end of the compensation resistor R2, the first end of the sampling resistor R1 and the cathode of the loop control diode I V; the anode of the loop control diode I V is connected with the second end of the integrating capacitor C1 and the cathode of the loop control diode II V6 respectively; the second end of the sampling resistor R1 and the anode of the loop control diode II V6 are grounded; the base electrode of the switch control bipolar transistor V4 is connected with the triode control input; the positive end and the negative end of the coil of the electromagnetic relay J1A are respectively connected with a high potential end and a low potential end of the relay control input; the emitter junction of the charge-control bipolar transistor V1 is the output of the entire circuit.
The beneficial effects are that:
the invention realizes the generation of the same rising and falling slope analog waveforms by a small number of analog devices, and creatively adopts a method of separating and designing charge and discharge circuits to minimize the use quantity of operational amplifiers, thereby reducing the cost and complexity of the waveform generator.
The circuit has the characteristics of simple structure, less number of devices, low cost, active control mode, high waveform linearity and insensitive temperature.
Drawings
Fig. 1 is a schematic diagram of a circuit according to the present invention.
Detailed Description
The invention will now be described in detail by way of example with reference to the accompanying drawings.
The invention provides a generating circuit for generating analog waveforms with the same rising and falling slopes, which is shown in fig. 1, and comprises an operational amplifier N1B, a compensation resistor R2, a compensation capacitor C2, an integration capacitor C1, a charge control bipolar transistor V1, a discharge control bipolar transistor V2, a voltage stabilizing diode V3, a loop control diode I V5, a loop control diode II V6, a switch control bipolar transistor V4, an electromagnetic relay J1A and a sampling resistor R1;
the positive input end of the operational amplifier N1B inputs external reference voltage, the negative input end is respectively connected with the compensation resistor R2 and the first end of the compensation capacitor C2, and the output end is respectively connected with the second end of the compensation capacitor C2, the first end of the switch of the electromagnetic relay J1A, the emitter of the switch control bipolar transistor V4 and the cathode of the zener diode V3; the base electrode of the charge control bipolar transistor V1 is respectively connected with the collector electrode of the switch control bipolar transistor V4 and the second end of the switch of the electromagnetic relay J1A, the collector electrode of the V1 is connected with a power supply, and the emitter electrode of the V1 is respectively connected with the first end of the integrating capacitor C1 and the collector electrode of the discharge control bipolar transistor V2; the base electrode of V2 is connected with the anode of the voltage stabilizing diode V3, and the emitter of V2 is respectively connected with the second end of the compensation resistor R2, the first end of the sampling resistor R1 and the cathode of the loop control diode I V; the anode of the loop control diode I V is connected with the second end of the integrating capacitor C1 and the cathode of the loop control diode II V6 respectively; the second end of the sampling resistor R1 and the anode of the loop control diode II V6 are grounded; the base electrode of the switch control bipolar transistor V4 is connected with the triode control input; the positive end and the negative end of the coil of the electromagnetic relay J1A are respectively connected with a high potential end and a low potential end of the relay control input; the emitter junction of the charge-control bipolar transistor V1 is the output of the entire circuit.
The principle of the scheme of the invention is as follows:
an operational amplifier (N1B) is used to compare and stabilize the current flowing through the sampling resistor (R1). The switching control device (J1A, V4) achieves the purpose of selecting the opening of V1 or V2 by controlling the current flowing into the charge-discharge control element (V1, V2). V1 and V2 control the current direction of C1 and further control the voltage of C1 to rise or fall. The circuit has the characteristics of simple structure, less device number, low cost, active control mode, high waveform linearity and insensitive temperature.
The working process of the circuit comprises the following steps:
process one: when a current flows through the sampling resistor (R1), the voltage on the sampling resistor (R1) is transmitted to the pin 6 of the operational amplifier (N1B) through the R2, and when the input signal 'reference voltage input' is added with a fixed voltage, the pin 7 of the operational amplifier (N1B) outputs a certain level so that the voltage on the sampling resistor (R1) is equal to the signal voltage value of the 'reference voltage input'. The current flowing through the sampling resistor (R1) is constant at this time. This process is a constant current process.
And a second process: as shown in the drawing, when the switching control device, the coil control switch in J1A or the externally input "triode control input" control V1 is turned on, VCC terminal current flows through C1, V5, R1 to the ground through V1. During which the current through C1 is constant due to the action of process one. The C1 voltage rises with a constant slope. This process is a voltage rising process.
And a third process: after the second process, as the voltage of the C1 rises, the voltage of the pin 7 of the N1B rises, and when the breakdown voltage of V3 is reached, V2 and V1 are simultaneously turned on. At this time, the VCC terminal current flows through V1, V2, R1 to ground. Due to the action of the first process, the current flowing through V1 and V2 is constant, and the voltage of C1 is constant. This process is a voltage constant process.
And a process IV: after the second or third process, when the switching control device, the coil control switch in J1A or the externally input "triode control input" controls V1 to turn off, C1 outflow current flows through the R1, V6 to C1 cathodes through V2. During which the current flowing out due to the action C1 of the first process is constant. The C1 voltage drops with a constant slope. This process is a voltage drop process.
Compared with the prior art, the invention minimizes the use quantity of the operational amplifier by adopting a charge-discharge circuit separation design method with a small quantity of analog devices. The generation of the analog waveforms with the same rising and falling slopes is realized, and the cost and the complexity of the waveform generator are reduced.
In summary, the above embodiments are only preferred embodiments of the present invention, and are not intended to limit the scope of the present invention. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (1)
1. The generating circuit is characterized by comprising an operational amplifier N1B, a compensation resistor R2, a compensation capacitor C2, an integration capacitor C1, a charge control bipolar transistor V1, a discharge control bipolar transistor V2, a voltage stabilizing diode V3, a loop control diode I V5, a loop control diode IIV6, a switch control bipolar transistor V4, an electromagnetic relay J1A and a sampling resistor R1;
the positive input end of the operational amplifier N1B inputs external reference voltage, the negative input end is respectively connected with the compensation resistor R2 and the first end of the compensation capacitor C2, and the output end is respectively connected with the second end of the compensation capacitor C2, the first end of the switch of the electromagnetic relay J1A, the emitter of the switch control bipolar transistor V4 and the cathode of the zener diode V3; the base electrode of the charge control bipolar transistor V1 is respectively connected with the collector electrode of the switch control bipolar transistor V4 and the second end of the switch of the electromagnetic relay J1A, the collector electrode of the V1 is connected with a power supply, and the emitter electrode of the V1 is respectively connected with the first end of the integrating capacitor C1 and the collector electrode of the discharge control bipolar transistor V2; the base electrode of V2 is connected with the anode of the voltage stabilizing diode V3, and the emitter of V2 is respectively connected with the second end of the compensation resistor R2, the first end of the sampling resistor R1 and the cathode of the loop control diode IV 5; the anode of the loop control diode IV5 is respectively connected with the second end of the integrating capacitor C1 and the cathode of the loop control diode IIV 6; the second end of the sampling resistor R1 and the anode of the loop control diode IIV6 are grounded; the base electrode of the switch control bipolar transistor V4 is connected with the triode control input; the positive end and the negative end of the coil of the electromagnetic relay J1A are respectively connected with a high potential end and a low potential end of the relay control input; the emitter junction of the charge-control bipolar transistor V1 is the output of the entire circuit.
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CN1145472A (en) * | 1995-09-14 | 1997-03-19 | 株式会社椭圆 | Mass flowmeter converter |
CN1650390A (en) * | 2002-04-19 | 2005-08-03 | 汤姆森许可公司 | Waveform generator for controlling an electron beam in a cathode ray tube |
JP2008235563A (en) * | 2007-03-20 | 2008-10-02 | Hitachi Ltd | Ramp waveform generating circuit and circuit pattern detector using the same |
CN101629981A (en) * | 2009-05-19 | 2010-01-20 | 武汉大学 | Modularized multiple wave forms impact generator test device |
CN106560986A (en) * | 2015-09-30 | 2017-04-12 | 中兴通讯股份有限公司 | Slope compensating circuit and method |
CN107104595A (en) * | 2017-05-16 | 2017-08-29 | 电子科技大学 | The self-adaptable slop compensation circuit of buck converter is controlled suitable for Peak Current Mode |
CN109765956A (en) * | 2018-12-07 | 2019-05-17 | 兰州空间技术物理研究所 | A kind of space field ionization source suitable for Sipm photo-multiplier |
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JP5366032B2 (en) * | 2011-10-20 | 2013-12-11 | Tdk株式会社 | Ramp signal generation circuit and ramp signal adjustment circuit |
CN106775143B (en) * | 2015-12-31 | 2020-01-03 | 深圳市汇顶科技股份有限公司 | Integrating circuit and capacitance sensing circuit |
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2019
- 2019-12-27 CN CN201911372509.8A patent/CN111147052B/en active Active
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CN1145472A (en) * | 1995-09-14 | 1997-03-19 | 株式会社椭圆 | Mass flowmeter converter |
CN1650390A (en) * | 2002-04-19 | 2005-08-03 | 汤姆森许可公司 | Waveform generator for controlling an electron beam in a cathode ray tube |
JP2008235563A (en) * | 2007-03-20 | 2008-10-02 | Hitachi Ltd | Ramp waveform generating circuit and circuit pattern detector using the same |
CN101629981A (en) * | 2009-05-19 | 2010-01-20 | 武汉大学 | Modularized multiple wave forms impact generator test device |
CN106560986A (en) * | 2015-09-30 | 2017-04-12 | 中兴通讯股份有限公司 | Slope compensating circuit and method |
CN107104595A (en) * | 2017-05-16 | 2017-08-29 | 电子科技大学 | The self-adaptable slop compensation circuit of buck converter is controlled suitable for Peak Current Mode |
CN109765956A (en) * | 2018-12-07 | 2019-05-17 | 兰州空间技术物理研究所 | A kind of space field ionization source suitable for Sipm photo-multiplier |
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