CN111133741B - Video signal synchronization method, device and system for splicing wall - Google Patents
Video signal synchronization method, device and system for splicing wall Download PDFInfo
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- H—ELECTRICITY
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- H04N5/00—Details of television systems
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Abstract
The application discloses a video signal synchronization method, a device and a system for a splicing wall, which select image data in an image data signal as a mark bit of a synchronization signal, replace the image data to be embedded into the image data signal and send the image data to a receiving end, the receiving end recovers the output synchronization signal after receiving the image signal embedded with the synchronization mark bit, then replaces the synchronization mark bit with a neighboring pixel at the high level position of a data effective signal by a neighboring pixel replacement method, and synchronously outputs the image signal, thereby realizing the synchronous display of the splicing wall signal, solving the technical problems that the prior splicing wall system needs to use a synchronization line to transmit the synchronization signal in each display unit of the splicing wall to realize the signal synchronization, the circuits on the splicing wall are more, the display units on the splicing wall are asynchronous when the synchronization line is abnormal, and the stability of the splicing wall system is influenced, meanwhile, the cost caused by using the synchronous line is reduced, and the cost problem of the spliced wall system is solved.
Description
Technical Field
The application relates to the technical field of signal processing, in particular to a video signal synchronization method, device and system for a splicing wall.
Background
The spliced wall is formed by splicing a plurality of display units, and the image splicing display mode is that image signals are transmitted to each display unit in a cascading mode and are displayed after being processed by the display units. In the splicing wall system, in order to ensure that the image frames output and displayed by each display unit are synchronous and realize the synchronization of the image frames displayed by each unit and the played images, all the display units are connected through a synchronization line, the synchronization line transmits synchronization signals, and each display unit outputs and displays according to the synchronization signals, thereby realizing the synchronization.
The currently used synchronization line is a BNC line, and the synchronization signal transmitted through the BNC line is a periodic pulse signal, the period of which is the frame rate of display, for example, the frame rate of display of a tiled wall is 60Hz, and the synchronization signal is a 60Hz pulse signal. As shown in fig. 1, in a conventional way of synchronizing a tiled wall signal by BNC, in addition to a BNC line, each unit is connected to a tiled wall, and a signal line for cascading an input image signal is also connected to each display unit, when no external synchronization signal is input, a synchronization signal is generated by a first display unit of the tiled wall and transmitted to all the display units by the BNC line, when an external synchronization signal is input, for example, a video camera takes a video image and transmits the video image to the tiled wall, the synchronization signal output by the video camera is the external synchronization signal, the externally input synchronization signal is input to the first display unit, and the first display unit transmits the externally input synchronization signal to all the display units by the BNC line. However, the number of lines on the spliced wall is large, and asynchronous display of each display unit on the spliced wall can be caused when the synchronous line connection is abnormal, so that the stability of the spliced wall system is influenced.
Disclosure of Invention
The application provides a method, a device and a system for synchronously displaying video signals of a splicing wall, which are used for solving the technical problems that the existing splicing wall system needs to use a synchronous line to transmit synchronous signals in each display unit of the splicing wall to realize signal synchronization, more lines are arranged on the splicing wall, the asynchronous display of each display unit on the splicing wall is caused when the synchronous line connection is abnormal, and the stability of the splicing wall system is influenced.
In view of the above, a first aspect of the present application provides a method for synchronously displaying a signal on a splicing wall, including:
selecting target image data of an image data signal as a synchronization flag bit in an input image signal, wherein the image signal comprises a field synchronization signal, a line synchronization signal, a data valid signal and an image data signal;
replacing image data in the image data signal which is the same as the synchronous flag bit data with adjacent image data of the image data respectively;
inserting the synchronous flag bit into the image data signal position corresponding to the rising edge time of the obtained output synchronous signal;
after receiving the image signal inserted into the synchronous marker bit at a receiving end, pulling up an output synchronous signal at the position of the synchronous marker bit, if the output synchronous signal is at the high level position of the data effective signal, replacing the synchronous marker bit with an adjacent pixel by adopting an adjacent pixel replacement method, otherwise, not acting;
and inputting the field synchronizing signal, the line synchronizing signal, the data effective signal and the image data signal obtained by replacing the synchronous mark bit with the adjacent pixel by adopting an adjacent pixel replacement method into an image splicing processing channel for synchronous output.
Optionally, the selecting, in the triggered by the synchronization signal, target image data of the image data signal as a synchronization flag bit in the input image signal includes:
one image data of the image data signal is randomly selected as a synchronization flag bit in the input image signal.
Optionally, before inserting the synchronization flag into the image data signal position corresponding to the rising edge time of the acquired output synchronization signal, the method further includes:
and detecting whether an external synchronous signal is input, if so, taking the external synchronous signal as the output synchronous signal, otherwise, triggering a first display unit of the spliced wall to generate a synchronous signal, and taking the synchronous signal generated by the first display unit as the output synchronous signal.
Optionally, the inputting the field synchronization signal, the line synchronization signal, the data valid signal, and the image data signal obtained by replacing the synchronization flag with the adjacent pixel by using the adjacent pixel replacement method into an image stitching processing channel for synchronous output includes:
and inputting the field synchronizing signal, the line synchronizing signal, the data effective signal and the image data signal obtained by replacing the synchronizing mark bit with the adjacent pixel by adopting an adjacent pixel replacement method into an image splicing processing channel for shearing, scaling and frame rate conversion processing, so that the image frames of the image signals are synchronously output.
Optionally, the image data signal is transmitted in RGB 4:4:4 data form.
This application second aspect provides a concatenation wall video signal synchronizer, includes:
a flag unit for selecting target image data of an image data signal as a synchronization flag bit in an input image signal, the image signal including a field sync signal, a line sync signal, a data valid signal, and an image data signal;
a first replacement unit configured to replace image data in the image data signal that is the same as the synchronization flag bit data with adjacent image data to the image data, respectively;
the inserting unit is used for inserting the synchronous marker bit into the position of the image data signal corresponding to the rising edge time of the acquired output synchronous signal;
a second replacement unit, configured to pull up an output synchronization signal at a position of the synchronization flag after a receiving end receives the image signal into which the synchronization flag is inserted, replace the synchronization flag with an adjacent pixel by using an adjacent pixel replacement method if the output synchronization signal is at a high level position of the data valid signal, and otherwise, do not act;
and the output unit is used for inputting the field synchronizing signal, the line synchronizing signal, the data effective signal and the image data signal obtained by replacing the synchronizing mark bit with the adjacent pixel by adopting an adjacent pixel replacement method into an image splicing processing channel for synchronous output.
Optionally, the flag unit is specifically configured to:
randomly selecting one image data of the image data signal from the input image signals as a synchronous marker bit;
the output unit is specifically configured to:
and inputting the field synchronizing signal, the line synchronizing signal, the data effective signal and the image data signal obtained by replacing the synchronizing mark bit with the adjacent pixel by adopting an adjacent pixel replacement method into an image splicing processing channel for shearing, scaling and frame rate conversion processing, so that the image frames of the image signals are synchronously output.
Optionally, the method further comprises: a detection unit;
the detection unit is used for detecting whether an external synchronous signal is input or not, if so, the external synchronous signal is used as the output synchronous signal, otherwise, a first display unit of the splicing wall is triggered to generate a synchronous signal, and the synchronous signal generated by the first display unit is used as the output synchronous signal.
A third aspect of the present application provides a system for synchronizing video signals of a splicing wall, including: a sending end and a receiving end;
the sending end comprises a mark unit, a first replacement unit and an insertion unit of any splicing wall video signal synchronization device in the second aspect;
the receiving end comprises a second replacing unit and an output unit of any splicing wall video signal synchronizing device in the second aspect.
Optionally, the sending end further includes a detection unit of the video signal synchronization apparatus for a splicing wall according to the second aspect.
According to the technical scheme, the embodiment of the application has the following advantages:
the application provides a video signal synchronization method for a splicing wall, which comprises the following steps: selecting target image data of an image data signal from input image signals as a synchronous flag bit, wherein the image signals comprise a field synchronous signal, a line synchronous signal, a data effective signal and an image data signal; replacing image data identical to the synchronization flag bit data in the image data signal with adjacent image data to the image data, respectively; inserting a synchronous flag bit into the position of the image data signal corresponding to the rising edge time of the obtained output synchronous signal; after receiving the image signal inserted with the synchronous marker bit at the receiving end, pulling up the output synchronous signal at the position of the synchronous marker bit, if the output synchronous signal is at the high level position of the effective data signal, replacing the synchronous marker bit with an adjacent pixel by adopting an adjacent pixel replacement method, otherwise, not acting; and inputting the field synchronizing signal, the line synchronizing signal, the data effective signal and the image data signal obtained by replacing the synchronizing mark bit with the adjacent pixel by adopting an adjacent pixel replacement method into an image splicing processing channel for synchronous output.
The video signal synchronization method for the spliced wall provided by the application selects image data in an image data signal as a mark bit of a synchronization signal, replaces the image data to be embedded into the image data signal and sends the image data to a receiving end, the receiving end carries out output synchronization signal recovery after receiving the image signal embedded into the synchronization mark bit, then replaces the synchronization mark bit with an adjacent pixel at the high level position of a data effective signal by adopting an adjacent pixel replacement method, and inputs a field synchronization signal, a line synchronization signal, a data effective signal and an image data signal obtained by replacing the synchronization mark bit with the adjacent pixel by adopting the adjacent pixel replacement method into an image splicing processing channel for synchronous output, thereby realizing synchronous display of the spliced wall signal, and the synchronous display mode does not need to use a synchronization line, does not need to use a synchronization line on the spliced wall, and avoids the stability problem caused by abnormal connection of the spliced wall synchronization line, the technical problems that the signal synchronization is realized by the fact that the synchronous signals are transmitted in all display units of a spliced wall through synchronous lines in the existing spliced wall system, the number of lines on the spliced wall is large, the synchronous lines are connected abnormally, the display units on the spliced wall are asynchronous in display, and the stability of the spliced wall system is affected are solved, the cost caused by the synchronous lines is reduced, and the cost problem of the spliced wall system is solved.
Drawings
FIG. 1 illustrates a prior art output synchronization signal and image signal cascade method;
fig. 2 is a schematic flowchart of a video signal synchronization method for a splicing wall according to an embodiment of the present application;
fig. 3 is a schematic diagram illustrating synchronization embedded in image data in a video signal synchronization method for a splicing wall provided in an embodiment of the present application;
fig. 4 is a schematic diagram illustrating effective image data recovery in a video signal synchronization method for a splicing wall according to an embodiment of the present application;
fig. 5 is a schematic structural diagram of a video signal synchronization apparatus for a video wall tile in an embodiment of the present application;
fig. 6 is a schematic structural diagram of a transmitting end of a video signal synchronization system of a splicing wall provided in an embodiment of the present application;
fig. 7 is a schematic structural diagram of a receiving end in a video signal synchronization system of a splicing wall according to an embodiment of the present application.
Detailed Description
In order to make the technical solutions of the present application better understood, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
For easy understanding, referring to fig. 1 to 3, an embodiment of a method for synchronizing video signals of a splicing wall provided by the present application includes:
It should be noted that, as shown in fig. 3, the video image signals include a field sync signal VS, a line sync signal HS, a Data valid signal DE, and an image Data signal Data, and the splicing wall synchronization method based on video signal cascade connection in the embodiment of the present application embeds the output sync signal into the video signals cascade-connected, thereby reducing the use of cables on the splicing wall and increasing the stability of the splicing wall. After the image signal is input into the splicing wall, target image data is selected from the image data signal as a synchronous marker bit.
It should be noted that, for the selection of the synchronization flag, a random selection method may be adopted to arbitrarily select one image data from the image data signal as the synchronization flag, or the image data at a preset position may be selected from the image data signal as the synchronization flag according to actual needs according to actual applications.
In step 102, the image data in the image data signal which is the same as the synchronous flag bit data is replaced by the adjacent image data of the image data.
It should be noted that there are various transmission forms of image data, such as RGB (4:4:4), YCbCr (4:4:4), and YCbCr (4:2:2), and the method in the embodiment of the present application can be used to achieve synchronization regardless of the transmission form. In the embodiment of the present application, RGB (4:4:4), 24-bit image data will be described. Image data 0x000001 is selected as a synchronization flag bit in the image data. In order not to misinterpret the self-appearing 0x000001 data in the image data signal as the sync mark, the 0x000001 data in the image data needs to be replaced first because 0x000001 is black almost close to 0x000000 at the time of display and cannot be distinguished by naked eyes. The red component of 0x000001 has only 1, and the color closest can be replaced with the red component bit 0(0x000000) or bit 2(0x000002), with minimal impact on the transmitted image.
It should be noted that, in the embodiment of the present application, it is necessary to detect a rising edge of the synchronization signal of the splicing wall, and as shown in fig. 3, a synchronization flag is inserted into a position of the image data signal corresponding to a clock of the rising edge of the synchronization signal of the splicing wall.
Because the splicing wall synchronization signal can be an external synchronization signal, and can also be a synchronization signal generated by a first display unit of the splicing wall, in the embodiment of the application, the method for acquiring the splicing wall synchronization signal is determined according to the following principle: and detecting whether an external synchronous signal is input, if so, taking the external synchronous signal as an output synchronous signal, otherwise, triggering a first display unit of the splicing wall to generate a synchronous signal, and taking the synchronous signal generated by the first display unit as the output synchronous signal.
The steps 101 to 103 are steps of an execution process of the unit of the splicing wall serving as the sending end after receiving the image signal, after the step 103 is executed, the sending end unit sends the image signal inserted with the synchronization flag bit flag to the receiving end, and after the receiving end receives the image signal, the steps 104 and 105 are executed.
And 104, after receiving the image signal inserted with the synchronous marker bit at the receiving end, pulling up the output synchronous signal at the position of the synchronous marker bit, if the output synchronous signal is at the high level position of the effective data signal, replacing the synchronous marker bit with an adjacent pixel by adopting an adjacent pixel replacement method, and otherwise, not acting.
It should be noted that after receiving the synchronization flag, that is, 0x000001, the output synchronization signal is pulled high, and the output synchronization at other times is kept at a low level, so as to recover the output synchronization signal. As shown in fig. 4, if the sync mark signal appears when the data valid signal DE is invalid, i.e. at a low level position of DE, no processing is needed, and when the sync mark signal appears when the data valid signal DE is valid, i.e. at a high level position of DE, the sync mark is replaced by the image data of the previous pixel or the next pixel.
And 105, inputting the field synchronizing signal, the line synchronizing signal, the data effective signal and the image data signal obtained by replacing the synchronizing mark bit with the adjacent pixel by adopting an adjacent pixel replacement method into an image splicing processing channel for synchronous output.
It should be noted that, in this embodiment of the present application, finally, a field sync signal, a line sync signal, a data valid signal, and an image data signal obtained by replacing a pixel adjacent to a synchronization flag bit with an adjacent pixel replacement method are input to an image stitching processing channel, where the image stitching processing channel may perform image cutting, scaling, and frame rate switching processing, and the recovered output sync signal is used to control output of frame rate conversion in the image stitching processing channel, so that a displayed image frame is output in synchronization. For the whole spliced wall, because each display unit on the spliced wall is independent when processing image signals, the image signals of one window are displayed at any position on the wall in any size, each display unit needs to cut corresponding image blocks from input signals, and performs scaling according to the size of the window, and also needs to perform frame rate conversion according to the refresh rate of the display unit and then output and display. Because each display unit independently processes signals, asynchronous display among the display units and torn pictures can be caused during display, a synchronous signal is required to be connected with all the display units in series, and all the display units synchronously display images according to the rhythm of the synchronous signal. The image processing performed by the image stitching processing channel belongs to the existing means, and is not an improvement point of the embodiment of the present application, and is not repeated herein.
The video signal synchronization method for the splicing wall provided by the embodiment of the application selects image data in an image data signal as a mark bit of a synchronization signal, replaces the image data to be embedded into the image data signal and sends the image data to a receiving end, the receiving end carries out output synchronization signal recovery after receiving the image signal embedded with the synchronization mark bit, then replaces the synchronization mark bit with an adjacent pixel at the high level position of a data effective signal by adopting an adjacent pixel replacement method, and inputs a field synchronization signal, a line synchronization signal, a data effective signal and an image data signal obtained by replacing the synchronization mark bit with the adjacent pixel by adopting the adjacent pixel replacement method into an image splicing processing channel for synchronous output, thereby realizing synchronous display of the signals of the splicing wall, and the synchronous display mode does not need to use a synchronization line and use the synchronization line on the splicing wall, thereby avoiding the stability problem caused by abnormal connection of the synchronization line of the splicing wall, the technical problems that the signal synchronization is realized by the fact that the synchronous signals are transmitted in all display units of a spliced wall through synchronous lines in the existing spliced wall system, the number of lines on the spliced wall is large, the synchronous lines are connected abnormally, the display units on the spliced wall are asynchronous in display, and the stability of the spliced wall system is affected are solved, the cost caused by the synchronous lines is reduced, and the cost problem of the spliced wall system is solved.
For easy understanding, please refer to fig. 5, an embodiment of a video signal synchronization apparatus for a splicing wall is provided in the present application, including:
and a flag unit for selecting target image data of the image data signal as a synchronization flag bit in the input image signal, the image signal including a field synchronization signal, a line synchronization signal, a data valid signal, and an image data signal.
A first replacement unit for replacing image data identical to the synchronization flag bit data in the image data signal with adjacent image data to the image data, respectively.
And the inserting unit is used for inserting the synchronous flag bit into the image data signal position corresponding to the rising edge time of the acquired output synchronous signal.
And the second replacement unit is used for pulling up the output synchronous signal at the position of the synchronous marker bit after the receiving end receives the image signal inserted with the synchronous marker bit, and replacing the synchronous marker bit with adjacent pixels by adopting an adjacent pixel replacement method if the output synchronous signal is at the high level position of the effective data signal, otherwise, not acting.
And the output unit is used for inputting the field synchronizing signal, the line synchronizing signal, the data effective signal and the image data signal obtained by replacing the synchronizing mark bit with the adjacent pixel by adopting an adjacent pixel replacement method into the image splicing processing channel for synchronous output.
Further, the flag cell is specifically configured to:
one image data of the image data signal is randomly selected as a synchronization flag bit in the input image signal.
The output unit is specifically configured to:
inputting the field synchronizing signal, the line synchronizing signal, the effective data signal and the image data signal obtained by replacing the synchronizing mark bit with the adjacent pixel by adopting an adjacent pixel replacement method into an image splicing processing channel for shearing, scaling and frame rate conversion processing, so that the image frames of the image signal are synchronously output.
Further, still include: a detection unit;
and the detection unit is used for detecting whether an external synchronous signal is input or not, if so, the external synchronous signal is used as an output synchronous signal, otherwise, a first display unit of the spliced wall is triggered to generate a synchronous signal, and the synchronous signal generated by the first display unit is used as the output synchronous signal.
For ease of understanding, referring to fig. 6 and 7, the present application provides an embodiment of a system for synchronizing video signals of a splicing wall, comprising: a sending end and a receiving end;
the sending end comprises a mark unit, a first replacement unit and an insertion unit of the splicing wall video signal synchronization device in the splicing wall video signal synchronization device embodiment;
the receiving end comprises a second replacing unit and an output unit of the video signal synchronizing device of the splicing wall in the embodiment of the video signal synchronizing device of the splicing wall.
Further, the sending end further includes a detection unit of the video signal synchronization device of the splicing wall in the embodiment of the video signal synchronization device of the splicing wall.
It should be noted that fig. 6 is a schematic diagram of an architecture of a sending end in the embodiment of the present application, and fig. 7 is a schematic diagram of an architecture of a receiving end in the embodiment of the present application, and a working principle of the video signal synchronization system of the splicing wall provided in the embodiment of the present application can be briefly described as follows: and the detection unit of the sending end is used for detecting whether an external synchronous signal is input, if so, the external synchronous signal is used as an output synchronous signal, otherwise, the first display unit of the splicing wall is triggered to generate a synchronous signal, and the synchronous signal generated by the first display unit is used as the output synchronous signal. After an image signal is input into a sending end, target image data of the image data signal is selected from the input image signal to serve as a synchronous marker bit, image data which are the same as the synchronous marker bit data in the image data signal are respectively replaced by adjacent image data of the image data, the synchronous marker bit is inserted into the position of the image data signal corresponding to the rising edge time of the output synchronous signal, and then the image signal is output to a receiving end; after receiving the image signal inserted with the synchronous marker bit at the receiving end, pulling up the output synchronous signal at the position of the synchronous marker bit, keeping the output synchronization at a low level at other times, realizing the recovery of the output synchronous signal, if the output synchronous signal is at the high level position of the effective data signal, replacing the synchronous marker bit with an adjacent pixel by adopting an adjacent pixel replacement method, otherwise, not acting, and finally inputting the field synchronous signal, the line synchronous signal, the effective data signal and the image data signal obtained by replacing the synchronous marker bit with the adjacent pixel by adopting the adjacent pixel replacement method into an image splicing processing channel for synchronous output.
In the several embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one logical division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application may be substantially implemented or contributed to by the prior art, or all or part of the technical solution may be embodied in a software product, which is stored in a storage medium and includes instructions for causing a computer system (which may be a personal computer, a server, or a network system) to execute all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: a U disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
The above embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions in the embodiments of the present application.
Claims (10)
1. A method for synchronizing video signals of a splicing wall, comprising:
after image signals are input into a splicing wall, target image data of the image data signals are selected from the image signals to serve as synchronous marker bits, and the image signals comprise field synchronous signals, line synchronous signals, data effective signals and image data signals;
replacing image data in the image data signal which is the same as the synchronous flag bit data with adjacent image data of the image data respectively;
inserting the synchronous flag bit into the image data signal position corresponding to the rising edge time of the obtained output synchronous signal;
after receiving the image signal inserted into the synchronous marker bit at a receiving end, pulling up an output synchronous signal at the position of the synchronous marker bit, if the output synchronous signal is at the high level position of the data effective signal, replacing the synchronous marker bit with an adjacent pixel by adopting an adjacent pixel replacement method, otherwise, not acting;
and inputting the field synchronizing signal, the line synchronizing signal, the data effective signal and the image data signal obtained by replacing the synchronous mark bit with the adjacent pixel by adopting an adjacent pixel replacement method into an image splicing processing channel for synchronous output.
2. The video signal synchronization method for splicing walls according to claim 1, wherein the selecting target image data of the image data signal as the synchronization flag bit in the input image signal comprises:
one image data of the image data signal is randomly selected as a synchronization flag bit in the input image signal.
3. The method for synchronizing video signals of a splicing wall according to claim 1, wherein the inserting the synchronization flag bit into the image data signal position corresponding to the rising edge time of the obtained output synchronization signal further comprises:
and detecting whether an external synchronous signal is input, if so, taking the external synchronous signal as the output synchronous signal, otherwise, triggering a first display unit of the spliced wall to generate a synchronous signal, and taking the synchronous signal generated by the first display unit as the output synchronous signal.
4. The method for synchronizing video signals of a splicing wall according to claim 1, wherein the inputting the field sync signal, the line sync signal, the data valid signal and the image data signal obtained by replacing the sync flag with adjacent pixels by using an adjacent pixel replacement method into an image splicing processing channel for synchronous output comprises:
and inputting the field synchronizing signal, the line synchronizing signal, the data effective signal and the image data signal obtained by replacing the synchronizing mark bit with the adjacent pixel by adopting an adjacent pixel replacement method into an image splicing processing channel for shearing, scaling and frame rate conversion processing, so that the image frames of the image signals are synchronously output.
5. The video signal synchronization method for splicing walls according to claim 1, wherein the image data signal is transmitted in a data form of RGB 4:4: 4.
6. A video signal synchronizing device for a splicing wall, comprising:
the device comprises a marking unit, a signal processing unit and a signal processing unit, wherein the marking unit is used for selecting target image data of an image data signal from the image signal as a synchronous marker bit after the image signal is input into a splicing wall, and the image signal comprises a field synchronous signal, a line synchronous signal, a data effective signal and an image data signal;
a first replacement unit configured to replace image data in the image data signal that is the same as the synchronization flag bit data with adjacent image data to the image data, respectively;
the inserting unit is used for inserting the synchronous marker bit into the position of the image data signal corresponding to the rising edge time of the acquired output synchronous signal;
a second replacement unit, configured to pull up an output synchronization signal at a position of the synchronization flag after a receiving end receives the image signal into which the synchronization flag is inserted, replace the synchronization flag with an adjacent pixel by using an adjacent pixel replacement method if the output synchronization signal is at a high level position of the data valid signal, and otherwise, do not act;
and the output unit is used for inputting the field synchronizing signal, the line synchronizing signal, the data effective signal and the image data signal obtained by replacing the synchronizing mark bit with the adjacent pixel by adopting an adjacent pixel replacement method into an image splicing processing channel for synchronous output.
7. The video signal synchronization apparatus for a splicing wall according to claim 6, wherein the flag unit is specifically configured to:
randomly selecting one image data of the image data signal from the input image signals as a synchronous marker bit;
the output unit is specifically configured to:
and inputting the field synchronizing signal, the line synchronizing signal, the data effective signal and the image data signal obtained by replacing the synchronizing mark bit with the adjacent pixel by adopting an adjacent pixel replacement method into an image splicing processing channel for shearing, scaling and frame rate conversion processing, so that the image frames of the image signals are synchronously output.
8. The video signal synchronizing device for a splicing wall according to claim 6, further comprising: a detection unit;
the detection unit is used for detecting whether an external synchronous signal is input or not, if so, the external synchronous signal is used as the output synchronous signal, otherwise, a first display unit of the splicing wall is triggered to generate a synchronous signal, and the synchronous signal generated by the first display unit is used as the output synchronous signal.
9. A system for synchronizing video signals of a tiled wall, comprising: a sending end and a receiving end;
the transmitting end comprises a mark unit, a first replacement unit and an insertion unit of the video signal synchronization device of the splicing wall of any one of claims 6 to 7;
the receiving end includes the second replacement unit and the output unit of the video signal synchronization apparatus of the splicing wall according to any one of claims 6 to 7.
10. The system for synchronizing video signals of a splicing wall according to claim 9, wherein the transmitting end further comprises a detecting unit of the apparatus for synchronizing video signals of a splicing wall according to claim 8.
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