CN111128773A - Method for mounting chip - Google Patents
Method for mounting chip Download PDFInfo
- Publication number
- CN111128773A CN111128773A CN201911322021.4A CN201911322021A CN111128773A CN 111128773 A CN111128773 A CN 111128773A CN 201911322021 A CN201911322021 A CN 201911322021A CN 111128773 A CN111128773 A CN 111128773A
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- China
- Prior art keywords
- chip
- substrate
- welding head
- glue
- temperature
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/81009—Pre-treatment of the bump connector or the bonding area
- H01L2224/81026—Applying a precursor material to the bonding area
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/81053—Bonding environment
- H01L2224/81095—Temperature settings
- H01L2224/81096—Transient conditions
- H01L2224/81097—Heating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81191—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/812—Applying energy for connecting
- H01L2224/81201—Compression bonding
- H01L2224/81203—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/8185—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
- H01L2224/81855—Hardening the adhesive by curing, i.e. thermosetting
- H01L2224/81862—Heat curing
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
The invention relates to a chip mounting method, which comprises the following steps: firstly, taking a substrate, and conveying the substrate to a glue drawing area; step two, painting glue on the area of the upper surface of the substrate needing to be mounted, and adding soldering flux into the glue; thirdly, taking a welding head for mounting the chip, wherein the welding head comprises an upper part and a lower part, the upper part is a heating device, the lower part is a suction nozzle, the lower part of the suction nozzle sucks the chip, the welding head transmits the chip to a chip mounting area, then the welding head drives the chip to press downwards, and the chip and the substrate are welded together along with the change of the temperature of the welding head; and step four, baking the product, namely putting the substrate with the mounted chip into an oven for baking until the glue is completely cured. The invention can solve the problem of insufficient cold joint caused by the warping of the plate in the reflow soldering process of the existing flip-chip process and the problem of cavities caused by insufficient bottom filling.
Description
Technical Field
The invention relates to a method for mounting a chip, belonging to the technical field of semiconductor packaging.
Background
The traditional flip-chip process flow is as follows:
the bottom of the chip is provided with a solder ball, the solder ball is dipped with soldering flux, the solder ball is inversely arranged on the plate, the solder ball is melted through reflow soldering to carry out solder joint connection, and then the bottom of the chip is filled.
When the whole board is subjected to reflow soldering by the process, the board is warped to cause the problem of insufficient soldering, and when the height of the ultrathin packaging bump is smaller than 30um, the gap between the chip and the substrate is too small, so that the problem of cavities can be caused due to insufficient bottom filling, and the reliability of the product is influenced.
Disclosure of Invention
The invention aims to solve the technical problem of providing a method for mounting a chip in the prior art, which can solve the problem of insufficient solder joint caused by plate warping in the reflow soldering process of the existing flip-chip process and the problem of cavities caused by insufficient bottom filling.
The technical scheme adopted by the invention for solving the problems is as follows: a method of mounting a die, the method comprising the steps of:
firstly, taking a substrate, and conveying the substrate to a glue drawing area;
step two, painting glue on the area of the upper surface of the substrate needing to be mounted, and adding soldering flux into the glue;
step three, mounting the chip
Taking a welding head, wherein the welding head comprises an upper part and a lower part, the upper part is a heating device, the lower part is a suction nozzle, the upper part heating device sets a welding temperature curve according to the product requirement, the lower part suction nozzle sucks a chip, the welding head conveys the chip to a chip mounting area, then the welding head drives the chip to press downwards until a salient point at the bottom of the chip contacts a substrate, the chip and the substrate are welded together along with the change of the temperature of the welding head, then the welding head is lifted to suck the next chip, and the actions are repeated until the mounting of all chips on the substrate is completed;
step four, baking the product
And baking the substrate with the mounted chip in an oven until the glue is completely cured.
Preferably, the substrate glue drawing pattern in the second step adopts a dot, X type or Chinese character 'mi' type.
Preferably, the viscosity of the glue in the second step is the lowest at the initial set temperature of the welding head.
Preferably, in the third step, the initial temperature is set by the welding head, the chip is driven by the welding head suction nozzle to be pressed downwards, the glue is squeezed open by the salient point at the bottom of the chip, the salient point is in direct contact with the upper surface of the substrate, the glue is filled between the chip and the substrate, the temperature of the welding head is raised to the highest temperature at the moment, the salient point is in a molten state and is welded with the substrate, the glue is semi-cured, and then the welding head is cooled to the initial.
Preferably, the welding head temperature in the third step includes a temperature rising stage, a constant temperature stage and a temperature reducing stage.
Compared with the prior art, the invention has the advantages that:
1. the chip is heated by the welding head to prevent the problem of insufficient soldering caused by substrate warping, product welding is completed in the mounting process, and the existing reflow soldering and bottom filling processes are omitted;
2. the method is different from the conventional process that the bottom filling and baking are required to be completed in a short time after the flip chip, the welding head temperature can enable the glue to be in a semi-solidified state, the welding pad can be protected from being oxidized, and the welding pad can be placed and stored for a long time;
3. the invention uses the glue containing the soldering flux to finish the bottom filling before the chip soldering process, replaces the prior manufacturing procedure of using the soldering flux before reflow soldering and cleaning the soldering flux after reflow soldering, and the glue is diffused under certain pressure to finish the bottom filling, thereby realizing the small gap filling and solving the problem of insufficient bottom filling of the ultrathin package.
Drawings
Fig. 1 is a schematic diagram of a method for mounting a chip according to the present invention.
Wherein:
Figure 2
A suction nozzle 42.
Detailed Description
The invention is described in further detail below with reference to the accompanying examples.
In this embodiment, a method for mounting a chip includes:
step one, taking a substrate, carrying the substrate by a conveying track in a vacuum adsorption manner, and conveying the substrate to a painting area;
secondly, drawing glue on the surface area of the substrate, and drawing the glue into different patterns according to the size of the chip;
the glue drawing graph can adopt a dot type, an X type, a y type or a rice type, the glue comprises fillers such as epoxy resin, silicon dioxide and the like, soldering flux is added, and the viscosity of the glue is the lowest at the temperature of 130 ℃;
step three, mounting the chip
As shown in fig. 1, a bonding head is taken, the bonding head comprises an upper portion and a lower portion, the upper portion is a heating device, the lower portion is a suction nozzle, the suction nozzle adopts a ceramic suction nozzle, the upper portion heating device can set a suitable welding temperature curve (including temperature rise, constant temperature and time of temperature reduction) according to product requirements, the lower portion suction nozzle sucks a chip, the bonding head conveys the chip to a chip mounting area of a substrate, then the bonding head drives the chip to press downwards, the temperature of the bonding head is initially set to 130-160 ℃, a salient point at the bottom of the chip is tin which is in a solid state, the viscosity of glue is lowest, the glue is squeezed open by the salient point at the bottom of the chip, the salient point is in direct contact with the upper surface of the substrate, the glue is filled between the chip and the substrate, the bonding head is heated to the highest temperature, the welding head is lifted, the next chip is sucked, and the actions are repeated until the mounting of all the chips on the substrate is completed;
setting the pressure of a welding head to be 10-14N, initially setting the temperature of the welding head to be 130-160 ℃, heating the welding head for 2.5S to the highest temperature, keeping the temperature for 2S at the constant temperature, setting the highest temperature to be 60 ℃ higher than the melting point of tin, setting the highest temperature to be 290 ℃, and cooling for 6S to ensure that the temperature of the welding head returns to the initially set temperature;
step four, baking the product
Placing the substrate with the mounted chip into an oven for baking until the glue is completely cured;
the baking temperature is constant 165 ℃, and the baking time is 1 hour.
In addition to the above embodiments, the present invention also includes other embodiments, and any technical solutions formed by equivalent transformation or equivalent replacement should fall within the scope of the claims of the present invention.
Claims (5)
1. A method of attaching a die, the method comprising the steps of:
firstly, taking a substrate, and conveying the substrate to a glue drawing area;
secondly, painting glue on the upper surface area of the substrate, and adding soldering flux into the glue;
step three, mounting the chip
Taking a welding head, wherein the welding head comprises an upper part and a lower part, the upper part is a heating device, the lower part is a suction nozzle, the upper part heating device sets a welding temperature curve according to the product requirement, the lower part suction nozzle sucks a chip, the welding head conveys the chip to a chip mounting area, then the welding head suction nozzle drives the chip to press down until a salient point at the bottom of the chip contacts a substrate, the chip and the substrate are welded together along with the change of the temperature of the welding head, then the welding head is lifted to suck the next chip, and the actions are repeated until the mounting of all chips on the substrate is completed;
step four, baking the product
And baking the product with the mounted chip in an oven until the glue between the chip and the substrate is completely cured.
2. The method of die attachment according to claim 1, wherein: and step two, the substrate glue drawing graph adopts a dot, X type, Y type or Chinese character 'mi' shape.
3. The method of die attachment according to claim 1, wherein: and in the second step, the viscosity of the glue is the lowest at the initial set temperature of the welding head.
4. The method of die attachment according to claim 1, wherein: specifically, the initial temperature is set by the welding head heating device, the welding head suction nozzle drives the chip to press downwards, the convex point at the bottom of the chip extrudes the glue on the substrate, the convex point is in direct contact with the upper surface of the substrate, the glue is filled between the chip and the substrate, the welding head is heated to the highest temperature at the moment, the convex point is in a molten state and is welded with the substrate, the glue is semi-solidified, and then the welding head is cooled to the initial set temperature.
5. The method of claim 4, further comprising: the welding head temperature in the third step comprises a heating stage, a constant temperature stage and a cooling stage.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201911322021.4A CN111128773A (en) | 2019-12-20 | 2019-12-20 | Method for mounting chip |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201911322021.4A CN111128773A (en) | 2019-12-20 | 2019-12-20 | Method for mounting chip |
Publications (1)
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CN111128773A true CN111128773A (en) | 2020-05-08 |
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CN201911322021.4A Pending CN111128773A (en) | 2019-12-20 | 2019-12-20 | Method for mounting chip |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113257684A (en) * | 2021-04-25 | 2021-08-13 | 深圳市时代速信科技有限公司 | Chip packaging method and device |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1938839A (en) * | 2004-03-29 | 2007-03-28 | 日本电气株式会社 | Semiconductor device and process for manufacturing the same |
CN101436560A (en) * | 2007-11-16 | 2009-05-20 | 株式会社瑞萨科技 | Apparatus and method for manufacturing semiconductor device |
CN102473655A (en) * | 2009-07-17 | 2012-05-23 | 住友电木株式会社 | Method for manufacturing electronic component and electronic component |
-
2019
- 2019-12-20 CN CN201911322021.4A patent/CN111128773A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1938839A (en) * | 2004-03-29 | 2007-03-28 | 日本电气株式会社 | Semiconductor device and process for manufacturing the same |
CN101436560A (en) * | 2007-11-16 | 2009-05-20 | 株式会社瑞萨科技 | Apparatus and method for manufacturing semiconductor device |
CN102473655A (en) * | 2009-07-17 | 2012-05-23 | 住友电木株式会社 | Method for manufacturing electronic component and electronic component |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113257684A (en) * | 2021-04-25 | 2021-08-13 | 深圳市时代速信科技有限公司 | Chip packaging method and device |
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Application publication date: 20200508 |
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