CN111128706B - Manufacturing method of field oxide with gradually-changed thickness in groove and manufacturing method of SGT (super-stable Gate Bipolar transistor) device - Google Patents

Manufacturing method of field oxide with gradually-changed thickness in groove and manufacturing method of SGT (super-stable Gate Bipolar transistor) device Download PDF

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CN111128706B
CN111128706B CN201911375600.5A CN201911375600A CN111128706B CN 111128706 B CN111128706 B CN 111128706B CN 201911375600 A CN201911375600 A CN 201911375600A CN 111128706 B CN111128706 B CN 111128706B
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陈正嵘
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Hua Hong Semiconductor Wuxi Co Ltd
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Abstract

The invention discloses a method for manufacturing field oxygen with gradually changed thickness in a groove, which comprises the following steps: forming a groove in a semiconductor substrate; step two, forming field oxygen by adopting a thermal oxidation process; depositing to form a second oxide layer; filling the groove completely by adopting a third material layer; fifthly, removing the third material layer on the surface of the second oxide layer outside the groove; step six, performing wet etching on the oxide layer by taking the third material layer as a self-aligned mask, wherein by utilizing the characteristic that the wet etching rate of the second oxide layer is greater than that of the field oxygen, the field oxygen along one side of the second oxide layer can accelerate etching in the wet etching, and the field oxygen can form a structure with gradually increased thickness from top to bottom after the wet etching is completed; and step seven, removing the third material layer. The invention also discloses a manufacturing method of the SGT device.

Description

Manufacturing method of field oxide with gradually-changed thickness in groove and manufacturing method of SGT (super-stable Gate Bipolar transistor) device
Technical Field
The invention relates to a semiconductor integrated circuit manufacturing method, in particular to a manufacturing method of field oxygen with gradually changed thickness in a groove; the invention also relates to a manufacturing method of the Trench Gate (SGT) device with the shielding Gate.
Background
An SGT device, such as an SGT MOS device, is an advanced device structure of a common Trench gate (Trench) MOS device, and is a structural schematic diagram of an existing SGT MOS device, as shown in fig. 1; taking an N-type device as an example, a conventional SGT MOS device includes:
an N-type epitaxial layer (EPI)102 is formed on a surface of an N + semiconductor substrate such as a silicon substrate 101.
A trench 103 is formed in the N-type epitaxial layer 102.
A gate structure is formed in the trench 103, including: a bottom dielectric layer 104, a source poly 105, a poly gate 106, an interpoly dielectric layer 107, and a gate dielectric layer 108.
The bottom dielectric layer 104 is a shielding dielectric layer, and is generally formed by field oxide (field oxide) formed by thermal oxidation; source polysilicon 105 serves as shield polysilicon.
The interpoly dielectric layer 107 is typically an oxide layer.
The gate dielectric layer 108 is typically an oxide layer formed by a thermal oxidation process.
A P-doped body region 109 is formed in the surface region of the N-epitaxial layer 102, with the N-epitaxial layer 102 at the bottom of the body region 109 acting as a drift region.
An N + doped source region 110 is formed at the surface of the body region 109.
The surface of body region 109 flanked by polysilicon gates 106 is used to form a channel.
The interlayer film 111 covers the device formation region on the surface of the semiconductor substrate 101.
A contact hole 112 is formed in the interlayer film 111 through the interlayer film 111. The polysilicon gate 106 is connected to a gate composed of a front metal layer 113 through a contact hole 112 at the top; the source region 110 is connected to a source electrode composed of a front metal layer 113 through a top contact hole 112, and the contact hole 112 at the top of the source region 110 is also in contact with the body region 109.
Typically, the source polysilicon 105 is also connected to the source through the top contact hole 112.
Compared with the conventional ordinary trench gate MOS device, in the SGT MOS device shown in fig. 1, the source polysilicon 105 is added to the bottom of the trench 103, and the source polysilicon 105 can mainly play two roles:
firstly, the parasitic capacitance Cgd can be reduced, and the switching loss is reduced.
Secondly, the source polysilicon 105 at the bottom of two adjacent trenches 103 can play a role of lateral depletion, the peak value of the electric field in the bottom region of the trench 103 is raised by a charge-coupling effect, the projection area of the electric field along the depth is remarkably increased, and the denser N-type epitaxial layer 102 can be used under the condition of achieving the same Breakdown Voltage (BV) so as to reduce the on-resistance (Rdson).
However, in practical situations, because there is a voltage drop across the source polysilicon 105, the potential decreases from deep to shallow in sequence, and although the electric field strength at the bottom of the Trench can be pulled up, the entire electric field distribution cannot be pulled up, and the BV improvement effect cannot be maximized. As shown in fig. 2, it is a simulation diagram of the device shown in fig. 1 and a corresponding simulation curve of electric field intensity distribution; the curve 201 is the electric field intensity distribution curve along the dashed line AA, and the curve 202 is the electric field intensity distribution curve along the dashed line BB, it can be seen that the electric field intensity at the dashed line AA is larger, and a peak value of the electric field intensity as shown by the dashed line 203 appears at the bottom of the trench 103, but the electric field intensity in the area shown by the dashed line 204 cannot be raised, so the effect of increasing BV cannot be maximized.
To compensate for longitudinal depletion reduction, two types of approaches are currently common in the industry.
One is to compensate using graded EPI in the lateral depletion region of the source polysilicon 105.
Another is to compensate for the field oxide thickness on both sides of the source polysilicon 105 in a gradual manner.
Disclosure of Invention
The present invention provides a method for manufacturing field oxide with gradually changing thickness in a trench, which can form field oxide with gradually changing thickness from top to bottom on the side surface of the trench without adding a mask, and has the advantages of simple process, low cost and smooth thickness change of the formed field oxide. Therefore, the invention also provides a manufacturing method of the SGT device.
In order to solve the above technical problem, the method for manufacturing field oxide with gradually changed thickness in the trench provided by the invention comprises the following steps:
step one, providing a semiconductor substrate, and forming a groove in the semiconductor substrate.
And secondly, forming field oxygen on the inner side surface of the groove by adopting a thermal oxidation process, wherein the field oxygen also extends to the surface outside the groove.
Forming a second oxide layer by adopting a deposition process, wherein the second oxide layer is formed on the surface of the field oxide; the second oxide layer and the field oxygen are oxide layers made of the same material, the compactness of the deposited second oxide layer is lower than that of the field oxygen formed by thermal oxygen, and the difference of the compactness enables the wet etching rate of the second oxide layer to be higher than that of the field oxygen.
Filling a third material layer into the groove completely, wherein the third material layer and the field oxide are made of different materials; the third material layer extends to the surface of the second oxide layer outside the groove at the same time.
Fifthly, removing the third material layer on the surface of the second oxide layer outside the groove; the top surface of the third material layer inside the trench is equal to or lower than the second oxide layer surface outside the trench.
And sixthly, performing wet etching on the oxide layer by taking the third material layer as a self-aligned mask, wherein the wet etching rate of the second oxide layer is greater than that of the field oxygen, and the field oxygen along one side of the second oxide layer can accelerate etching in the wet etching.
And after the wet etching is finished, the field oxygen can form a structure with gradually increased thickness from top to bottom.
And seventhly, removing the third material layer.
In a further improvement, the semiconductor substrate is a silicon substrate.
In a further refinement, the field oxide and the second oxide layer are both silicon dioxide.
In a further improvement, in the third step, the second oxide layer is formed by a Chemical Vapor Deposition (CVD) deposition process.
In a further improvement, the third material layer in step four is a Barc layer.
In a further improvement, in the fourth step, a coating process is used to fill the third material layer into the trench.
In a further improvement, in the fifth step, a dry etching process is adopted to remove the third material layer on the surface of the second oxide layer outside the trench. The thickness of the second oxide layer is
Figure BDA0002340873490000031
The second oxide layer is removed in the wet etching of step six.
In order to solve the above technical problem, the method for manufacturing the SGT device provided by the present invention includes the following steps:
providing a semiconductor substrate, and forming a groove in the semiconductor substrate; the grooves comprise a plurality of gate grooves of the SGT device.
And secondly, forming field oxygen on the inner side surface of the groove by adopting a thermal oxidation process, wherein the field oxygen also extends to the surface outside the groove.
Forming a second oxide layer by adopting a deposition process, wherein the second oxide layer is formed on the surface of the field oxide; the second oxide layer and the field oxygen are oxide layers made of the same material, the compactness of the deposited second oxide layer is lower than that of the field oxygen formed by thermal oxygen, and the difference of the compactness enables the wet etching rate of the second oxide layer to be higher than that of the field oxygen.
Filling a third material layer into the groove completely, wherein the third material layer and the field oxide are made of different materials; the third material layer extends to the surface of the second oxide layer outside the groove at the same time.
Fifthly, removing the third material layer on the surface of the second oxide layer outside the groove; the top surface of the third material layer inside the trench is equal to or lower than the second oxide layer surface outside the trench.
And sixthly, performing wet etching on the oxide layer by taking the third material layer as a self-aligned mask, wherein the wet etching rate of the second oxide layer is greater than that of the field oxygen, and the field oxygen along one side of the second oxide layer can accelerate etching in the wet etching.
And after the wet etching is finished, the field oxygen can form a structure with gradually increased thickness from top to bottom.
And seventhly, removing the third material layer.
The further improvement is that the method also comprises the following steps:
and step eight, etching the field oxygen to enable the whole area surrounded by the field oxygen to be pulled down and expose the side face of the top of the groove under the condition that the side face of the field oxygen is kept in a gradual change structure.
And ninthly, forming source polysilicon at the bottom of the trench, wherein the surface of the source polysilicon is level with the top surface of the field oxide.
Step ten, forming a dielectric layer between the polycrystalline silicon on the surface of the source polycrystalline silicon.
Step eleven, forming a gate dielectric layer and a polysilicon gate in the groove at the top of the inter-polysilicon dielectric layer.
In a further improvement, the semiconductor substrate is a silicon substrate.
In a further refinement, the field oxide and the second oxide layer are both silicon dioxide.
In a further improvement, in the third step, the second oxide layer is formed by a CVD deposition process.
In a further improvement, the third material layer in step four is a Barc layer.
In a further improvement, in the fourth step, a coating process is used to fill the third material layer into the trench.
In a further improvement, in the fifth step, a dry etching process is adopted to remove the third material layer on the surface of the second oxide layer outside the trench. The thickness of the second oxide layer is
Figure BDA0002340873490000041
The second oxide layer is removed in the wet etching of step six.
After the field oxide formed by the thermal oxidation process is formed on the inner side surface of the trench, the second oxide layer formed by the deposition process is added, wherein the characteristic that the compactness of the second oxide layer formed by deposition is lower than the compactness of the field oxide formed by thermal oxidation so that the wet etching rate of the second oxide layer is higher than that of the field oxide is ingeniously utilized, in the wet etching process of the self-aligned mask which is used as the third material layer for filling the trench, from top to bottom, the second oxide layer is etched first, the field oxide covered on the side surface of the second oxide layer is exposed after the second oxide layer is etched, and thus the lateral etching of the field oxide is increased in an exposed area, so that the longer the field oxide close to the top of the trench is, the larger the lateral etching amount is, finally, the field oxide structure with gradually increased thickness from bottom is formed, and as can be known from the above, the invention only utilizes the difference of wet etching rates caused by different forming processes of the oxide layer to realize the adjustment of the thickness change of the field oxygen, and does not need to adopt an additional photomask process, so the invention can form the field oxygen with the gradually thickened thickness from top to bottom on the side surface of the groove under the condition of not increasing the photomask, has simple process and low cost, and ensures that the thickness change of the formed field oxygen is smooth.
In addition, the manufacturing method of the field oxide with the gradually changed thickness in the groove can be applied to the manufacturing process of the SGT device and used for forming the field oxide which is positioned at the bottom of the groove in the grid structure of the SGT device and is used as the field oxide of the shielding dielectric layer, the field oxide structure with the gradually changed thickness can adjust the electric field intensity distribution in the drift region of the side face of the shielding polycrystalline silicon, namely the source polycrystalline silicon, so that the electric field intensity in the drift region of the side face of the source polycrystalline silicon is uniformly distributed in the longitudinal direction, the breakdown voltage of the device can be improved, or the doping concentration of the drift region is increased under the condition of keeping the breakdown voltage of the device unchanged, so that the specific on-resistance of the device can be reduced.
Drawings
The invention is described in further detail below with reference to the following figures and detailed description:
FIG. 1 is a schematic diagram of a prior art SGT MOS device;
FIG. 2 is a simulation plot of the device of FIG. 1 and a corresponding simulation curve of the electric field strength distribution;
FIG. 3 is a flow chart of a method for manufacturing field oxide with a graded thickness in a trench according to an embodiment of the present invention;
FIGS. 4A-4G are schematic device structures at various steps of a method for manufacturing field oxide with gradually changed thickness in a trench according to an embodiment of the present invention;
fig. 5A to 5E are schematic device structures in steps of a method for manufacturing an SGT device according to an embodiment of the present invention.
Detailed Description
The manufacturing method of the field oxygen with gradually changed thickness in the groove of the embodiment of the invention comprises the following steps:
FIG. 3 is a flow chart of a method for manufacturing field oxide with gradually changing thickness in a trench according to an embodiment of the present invention; fig. 4A to 4G are schematic views of device structures in steps of a method for manufacturing field oxide with gradually changed thickness in a trench according to an embodiment of the present invention; the manufacturing method of the field oxygen with gradually changed thickness in the groove comprises the following steps:
step one, as shown in fig. 4A, a semiconductor substrate 1 is provided, and a trench 2 is formed in the semiconductor substrate 1.
The semiconductor substrate 1 is a silicon substrate.
Typically, the grooves 2 have a side slope angle of 87.5 ° to 89 °.
Step two, as shown in fig. 4B, a thermal oxidation process is adopted to form field oxide 3 on the inner side surface of the trench 2, and the field oxide 3 also extends to the surface outside the trench 2.
The thickness of the field oxygen 3 is
Figure BDA0002340873490000051
Step three, as shown in fig. 4C, forming a second oxide layer 301 by using a deposition process, wherein the second oxide layer 301 is formed on the surface of the field oxide 3; the second oxide layer 301 and the field oxide 3 are both oxide layers of the same material, the density of the deposited second oxide layer 301 is lower than that of the field oxide 3 formed by thermal oxygen, and the difference in density makes the wet etching rate of the second oxide layer 301 greater than that of the field oxide 3.
Both the field oxide 3 and the second oxide layer 301 are silicon dioxide.
Preferably, the second oxide layer 301 is formed by a CVD deposition process. The CVD deposition process can be a sub-atmospheric pressure chemical vapor deposition (SACVD) deposition process.
The thickness of the second oxide layer 301 is
Figure BDA0002340873490000061
Step four, as shown in fig. 4D, filling the trench 2 with a third material layer 302, where the third material layer 302 and the field oxide 3 are made of different materials; the third material layer 302 simultaneously extends to the surface of the second oxide layer 301 outside the trench 2.
The third material layer 302 is a Barc layer.
The third material layer 302 is filled into the trench 2 by a coating process.
Step five, as shown in fig. 4E, the third material layer 302 on the surface of the second oxide layer 301 outside the trench 2 is removed; the top surface of the third material layer 302 within the trench 2 is equal to or lower than the surface of the second oxide layer 301 outside the trench 2.
And removing the third material layer 302 on the surface of the second oxide layer 301 outside the trench 2 by using a dry etching process.
And sixthly, as shown in fig. 4F, performing wet etching on the oxide layer by using the third material layer 302 as a self-aligned mask, wherein the wet etching rate of the second oxide layer 301 is greater than that of the field oxide 3, and the field oxide 3 along one side of the second oxide layer 301 accelerates etching in the wet etching.
After the wet etching is finished, the field oxide 3 forms a structure with gradually increased thickness from top to bottom.
The second oxide layer 301 is removed in the wet etching of step six.
Step seven, as shown in fig. 4G, the third material layer 302 is removed.
In the embodiment of the invention, after the field oxide 3 formed by a thermal oxidation process is formed on the inner side surface of the trench 2, the second oxide layer 301 formed by a deposition process is added, wherein the characteristic that the compactness of the second oxide layer 301 formed by deposition is poorer than the compactness of the field oxide 3 formed by thermal oxidation so as to enable the wet etching rate of the second oxide layer 301 to be greater than that of the field oxide 3 is ingeniously utilized, in the wet etching process in which the third material layer 302 filling the trench 2 is a self-aligned mask, from top to bottom, the second oxide layer 301 is etched first, the field oxide 3 covered on the side surface of the second oxide layer 301 is exposed after the second oxide layer 301 is etched, so that the lateral etching of the field oxide 3 is increased in an exposed area, so that the longer the field oxide 3 is close to the top of the trench 2, the larger the lateral etching amount is, and finally, a field oxide 3 structure with gradually increased thickness from top to bottom is formed, as can be seen from the above, in the embodiment of the present invention, the adjustment of the thickness variation of the field oxide 3 is realized only by using the wet etching rate difference caused by the difference of the oxide layer forming processes, and no additional mask process is required, so that the field oxide 3 whose thickness gradually becomes thicker from top to bottom is formed on the side surface of the trench 2 without increasing a mask, and the method of the present invention has the advantages of simple process, low cost, and smooth thickness variation of the formed field oxide 3.
The manufacturing method of the SGT device in the embodiment of the invention comprises the following steps:
fig. 5A to 5E are schematic diagrams of device structures in steps of a method for manufacturing an SGT device according to an embodiment of the present invention; please refer to fig. 4A to 4G for the step of forming field oxide with gradually changing thickness in the trench; the manufacturing method of the SGT device comprises the following steps:
step one, as shown in fig. 4A, a semiconductor substrate 1 is provided, and a trench 2 is formed in the semiconductor substrate 1.
The semiconductor substrate 1 is a silicon substrate.
The trenches 2 include a plurality of gate trenches 2, which are SGT devices.
Typically, the grooves 2 have a side slope angle of 87.5 ° to 89 °.
Step two, as shown in fig. 4B, a thermal oxidation process is adopted to form field oxide 3 on the inner side surface of the trench 2, and the field oxide 3 also extends to the surface outside the trench 2.
The thickness of the field oxygen 3 is
Figure BDA0002340873490000071
Step three, as shown in fig. 4C, forming a second oxide layer 301 by using a deposition process, wherein the second oxide layer 301 is formed on the surface of the field oxide 3; the second oxide layer 301 and the field oxide 3 are both oxide layers of the same material, the density of the deposited second oxide layer 301 is lower than that of the field oxide 3 formed by thermal oxygen, and the difference in density makes the wet etching rate of the second oxide layer 301 greater than that of the field oxide 3.
Both the field oxide 3 and the second oxide layer 301 are silicon dioxide.
Preferably, the second oxide layer 301 is formed by a CVD deposition process.
The second oxide layer301 has a thickness of
Figure BDA0002340873490000072
Step four, as shown in fig. 4D, filling the trench 2 with a third material layer 302, where the third material layer 302 and the field oxide 3 are made of different materials; the third material layer 302 simultaneously extends to the surface of the second oxide layer 301 outside the trench 2.
The third material layer 302 is a Barc layer.
The third material layer 302 is filled into the trench 2 by a coating process.
Step five, as shown in fig. 4E, the third material layer 302 on the surface of the second oxide layer 301 outside the trench 2 is removed; the top surface of the third material layer 302 within the trench 2 is equal to or lower than the surface of the second oxide layer 301 outside the trench 2.
And removing the third material layer 302 on the surface of the second oxide layer 301 outside the trench 2 by using a dry etching process.
And sixthly, as shown in fig. 4F, performing wet etching on the oxide layer by using the third material layer 302 as a self-aligned mask, wherein the wet etching rate of the second oxide layer 301 is greater than that of the field oxide 3, and the field oxide 3 along one side of the second oxide layer 301 accelerates etching in the wet etching.
After the wet etching is finished, the field oxide 3 forms a structure with gradually increased thickness from top to bottom.
The second oxide layer 301 is removed in the wet etching of step six.
Step seven, as shown in fig. 4G, the third material layer 302 is removed.
Step eight, as shown in fig. 5A, etching the field oxide 3, that is, performing pull-down (pull back) of the field oxide 3, so that the region surrounded by the field oxide 3 is pulled down as a whole and the side of the top of the trench 2 is exposed under the condition that the side of the field oxide 3 is kept in the gradual change structure.
Step nine, as shown in fig. 5C, source polysilicon 4 is formed at the bottom of the trench 2, and the surface of the source polysilicon 4 is flush with the top surface of the field oxide 3. In the method of the embodiment of the invention, the forming of the source polysilicon 4 comprises the following sub-steps:
as shown in fig. 5B, before forming the subsequent source polysilicon 4, a step of performing thermal oxidation to form an oxide layer 303 is further included.
As shown in fig. 5C, the source polysilicon 4 is deposited to completely fill the trench 2, and the source polysilicon 4 also extends to the surface of the oxide layer 303 outside the trench 2.
As shown in fig. 5C, the source polysilicon 4 is then etched completely, and the source polysilicon 4 outside the trench 2 is removed after etching. And the source polysilicon 4 inside the trench 2 is etched to a desired depth.
Step ten, as shown in fig. 5D, forming an inter-polysilicon dielectric layer 5 on the surface of the source polysilicon 4.
In the method of the embodiment of the invention, the inter-polysilicon dielectric layer 5 is an oxide layer, the inter-polysilicon dielectric layer 5 is formed by adopting a High Density Plasma (HDP) chemical vapor deposition process, and then the inter-polysilicon dielectric layer 5 is etched back to obtain the inter-polysilicon dielectric layer 5 with the required thickness.
The oxide layer 303 is removed during the etching back process of the interpoly dielectric layer 5.
Step eleven, as shown in fig. 5E, a gate dielectric layer 6 and a polysilicon gate 7 are formed in the trench 2 at the top of the inter-polysilicon dielectric layer 5.
The gate dielectric layer 6 is a thermal oxide layer.
The SGT device formed by the method provided by the embodiment of the invention is provided with the field oxide 3 with the gradually-changed thickness, and the thickness-changed structure of the field oxide 3 can adjust and shield electric field intensity distribution in a drift region on the side surface of polycrystalline silicon, namely source polycrystalline silicon 4, so that the electric field intensity in the drift region on the side surface of the source polycrystalline silicon 4 is uniformly distributed longitudinally, and the breakdown voltage of the device can be improved, or the doping concentration of the drift region is increased under the condition of keeping the breakdown voltage of the device unchanged, so that the specific on-resistance of the device can be reduced.
Compared with the field oxygen morphology with the step-shaped thickness surface of the SGT product formed by the existing method in the industry, the thickness change of the field oxygen 3 formed by the method provided by the embodiment of the invention is smooth, and the effect of compensating the lateral depletion is higher.
The present invention has been described in detail with reference to the specific embodiments, but these should not be construed as limitations of the present invention. Many variations and modifications may be made by one of ordinary skill in the art without departing from the principles of the present invention, which should also be considered as within the scope of the present invention.

Claims (15)

1. A method for manufacturing field oxygen with gradually changed thickness in a trench is characterized by comprising the following steps:
providing a semiconductor substrate, and forming a groove in the semiconductor substrate;
secondly, forming field oxygen on the inner side surface of the groove by adopting a thermal oxidation process, wherein the field oxygen also extends to the surface outside the groove;
forming a second oxide layer by adopting a deposition process, wherein the second oxide layer is formed on the surface of the field oxide; the second oxide layer and the field oxygen are oxide layers made of the same material, the compactness of the deposited second oxide layer is lower than that of the field oxygen formed by thermal oxygen, and the compactness difference enables the wet etching rate of the second oxide layer to be higher than that of the field oxygen;
filling a third material layer into the groove completely, wherein the third material layer and the field oxide are made of different materials; the third material layer simultaneously extends to the surface of the second oxide layer outside the groove;
fifthly, removing the third material layer on the surface of the second oxide layer outside the groove; a top surface of the third material layer within the trench is equal to or lower than the second oxide layer surface outside the trench;
step six, performing wet etching on the oxide layer by taking the third material layer as a self-aligned mask, wherein the wet etching rate of the second oxide layer is greater than that of the field oxygen, so that the field oxygen on one side of the second oxide layer can accelerate etching in the wet etching;
after the wet etching is finished, the field oxygen forms a structure with gradually increased thickness from top to bottom;
and seventhly, removing the third material layer.
2. The method of claim 1 wherein said step of forming a graded thickness field oxide in said trench comprises: the semiconductor substrate is a silicon substrate.
3. The method of claim 2 wherein said step of forming a graded thickness field oxide in said trench comprises: the field oxide and the second oxide layer are both silicon dioxide.
4. The method of claim 3 wherein said step of forming a graded thickness field oxide in said trench further comprises: in the third step, the second oxide layer is formed by a CVD deposition process.
5. The method of claim 3 wherein said step of forming a graded thickness field oxide in said trench further comprises: in the fourth step, the third material layer is a Barc layer.
6. The method of claim 5 wherein said step of forming a graded thickness field oxide in said trench further comprises: and step four, filling the third material layer into the groove by adopting a coating process.
7. The method of claim 5 wherein said step of forming a graded thickness field oxide in said trench further comprises: removing the third material layer on the surface of the second oxide layer outside the groove by adopting a dry etching process;
the thickness of the second oxide layer is
Figure FDA0002340873480000021
The second oxide layer is removed in the wet etching of step sixAnd (4) removing.
8. A method of fabricating an SGT device, comprising the steps of:
providing a semiconductor substrate, and forming a groove in the semiconductor substrate; the grooves comprise a plurality of gate grooves of the SGT device;
secondly, forming field oxygen on the inner side surface of the groove by adopting a thermal oxidation process, wherein the field oxygen also extends to the surface outside the groove;
forming a second oxide layer by adopting a deposition process, wherein the second oxide layer is formed on the surface of the field oxide; the second oxide layer and the field oxygen are oxide layers made of the same material, the compactness of the deposited second oxide layer is lower than that of the field oxygen formed by thermal oxygen, and the compactness difference enables the wet etching rate of the second oxide layer to be higher than that of the field oxygen;
filling a third material layer into the groove completely, wherein the third material layer and the field oxide are made of different materials; the third material layer simultaneously extends to the surface of the second oxide layer outside the groove;
fifthly, removing the third material layer on the surface of the second oxide layer outside the groove; a top surface of the third material layer within the trench is equal to or lower than the second oxide layer surface outside the trench;
step six, performing wet etching on the oxide layer by taking the third material layer as a self-aligned mask, wherein the wet etching rate of the second oxide layer is greater than that of the field oxygen, so that the field oxygen on one side of the second oxide layer can accelerate etching in the wet etching;
after the wet etching is finished, the field oxygen forms a structure with gradually increased thickness from top to bottom;
and seventhly, removing the third material layer.
9. A method of manufacturing an SGT device according to claim 8, wherein: further comprising the steps of:
step eight, etching the field oxygen to enable the whole area surrounded by the field oxygen to be pulled down and expose the side face of the top of the groove under the condition that the side face of the field oxygen is kept to be of a gradual change structure;
ninth, source polycrystalline silicon is formed at the bottom of the groove, and the surface of the source polycrystalline silicon is flush with the top surface of the field oxide;
step ten, forming a inter-polysilicon dielectric layer on the surface of the source polysilicon;
step eleven, forming a gate dielectric layer and a polysilicon gate in the groove at the top of the inter-polysilicon dielectric layer.
10. A method of manufacturing an SGT device according to claim 8, wherein: the semiconductor substrate is a silicon substrate.
11. A method of fabricating an SGT device as claimed in claim 10, wherein: the field oxide and the second oxide layer are both silicon dioxide.
12. A method of manufacturing an SGT device according to claim 11, wherein: in the third step, the second oxide layer is formed by a CVD deposition process.
13. A method of fabricating an SGT device as claimed in claim 10, wherein: in the fourth step, the third material layer is a Barc layer.
14. A method of manufacturing an SGT device according to claim 13, wherein: and step four, filling the third material layer into the groove by adopting a coating process.
15. A method of manufacturing an SGT device according to claim 13, wherein: removing the third material layer on the surface of the second oxide layer outside the groove by adopting a dry etching process;
the second oxide layerHas a thickness of
Figure FDA0002340873480000031
The second oxide layer is removed in the wet etching of step six.
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