CN111118461A - Magnetron sputtering method of LGA packaged electronic product - Google Patents
Magnetron sputtering method of LGA packaged electronic product Download PDFInfo
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- CN111118461A CN111118461A CN201911196295.3A CN201911196295A CN111118461A CN 111118461 A CN111118461 A CN 111118461A CN 201911196295 A CN201911196295 A CN 201911196295A CN 111118461 A CN111118461 A CN 111118461A
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- 238000000034 method Methods 0.000 title claims abstract description 22
- 238000001755 magnetron sputter deposition Methods 0.000 title claims abstract description 17
- 238000004544 sputter deposition Methods 0.000 claims abstract description 29
- 238000005520 cutting process Methods 0.000 claims abstract description 17
- 239000002184 metal Substances 0.000 claims abstract description 6
- 239000000463 material Substances 0.000 claims abstract description 5
- 239000003973 paint Substances 0.000 claims description 10
- 239000010410 layer Substances 0.000 claims description 6
- 239000012790 adhesive layer Substances 0.000 claims description 5
- 238000000926 separation method Methods 0.000 abstract description 2
- 239000000758 substrate Substances 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000003825 pressing Methods 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 230000003749 cleanliness Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Images
Classifications
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
- C23C14/34—Sputtering
- C23C14/35—Sputtering by application of a magnetic field, e.g. magnetron sputtering
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/04—Coating on selected surface areas, e.g. using masks
- C23C14/042—Coating on selected surface areas, e.g. using masks using masks
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/561—Batch processing
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
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- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Organic Chemistry (AREA)
- Metallurgy (AREA)
- Mechanical Engineering (AREA)
- Materials Engineering (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Physical Vapour Deposition (AREA)
Abstract
The invention relates to a magnetron sputtering method of an LGA packaged electronic product, which comprises the following steps: step one, taking an LGA product, and designing a groove between the bottoms of two adjacent unit products; step two, taking a pre-film; step three, pasting a pre-pasting film on the bottom surface of the LGA product; continuously sticking a PI film on the pre-sticking film at the bottom of the LGA product, and cutting the integral LGA product into unit products along the cutting path; sputtering the LGA product, and sputtering metal layers on the upper surface and four side surfaces of the LGA product by a sputtering machine; sixthly, carrying out film uncovering operation on the sputtered product; and step seven, putting the stripped unit products into a carrying tray, and putting the unit products to be delivered in sequence. The invention can solve the problem that a large amount of sputtering burrs are adhered to the edge of a material after an LGA product is stripped from a PI film, and the sputtering burrs have the risks of movement and separation and can cause short circuit.
Description
Technical Field
The invention relates to a magnetron sputtering method of an LGA packaged electronic product, belonging to the technical field of semiconductor packaging.
Background
The basic manufacturing process method for sputtering the traditional packaged electronic product comprises the following steps:
1. the surface of the traditional LGA (land grid array) product is covered with green paint except for pins and exposed welding pads;
2. firstly, taking a PI film (polyimide film), peeling off a release film of the PI film by using a rubberizing machine, and flatly attaching the PI film to a wafer ring, wherein the PI film is required to be accurately attached to the wafer ring;
3. placing the LGA product in an effective area of a wafer ring with a PI film by using a placement machine, and pressing the product by using a pressing machine to make the product tightly attached to the PI film in order to ensure that the LGA is tightly contacted with the PI film and prevent the sputtered coating from being overflowed to a metal surface to cause short circuit;
4. and then, placing the wafer ring with the LGA product attached on a machine table for high-temperature sputtering, separating the product from the PI film by using a blanking machine after sputtering, and placing the product in a material receiving tray.
The use of conventional sputtering processes for LGA products has the following problems:
a. when the LGA product is stripped from the PI film, a large amount of sputtering burrs are adhered to the edge of the bottom of the product, and the sputtering burrs have the risks of movement and separation, which may cause short circuit;
b. the traditional sputtering product has relatively high temperature, and the back of the product is easy to discolor when being heated;
c. the product directly contacts the PI film, the PI film cannot ensure the cleanliness, and the product can cause adverse effects on the product in the sputtering process.
Disclosure of Invention
The invention aims to solve the technical problem of providing a magnetron sputtering method of an LGA packaged electronic product in the prior art, which uses a pre-pasting film with high temperature resistance and high flexibility to be pasted at the bottom of the product before cutting, and changes the design of a substrate to ensure that a single product pin forms a green paint-free covering area to the edge of the product, and burrs caused by redundant sputtering after the single product is stripped from the pre-pasting film are left on a waste PI film together with the pre-pasting film, so as to reduce the sputtering burrs at the four sides of the bottom of the product.
The technical scheme adopted by the invention for solving the problems is as follows: a magnetron sputtering method of an LGA packaged electronic product, the method comprising the steps of:
step one, taking an LGA product, wherein the LGA product comprises a plurality of unit products, a groove is arranged between the bottoms of two adjacent unit products, and the groove is a green paint-free coverage area;
step two, taking a pre-sticking film, wherein the pre-sticking film comprises a release film, an adhesive layer and a base material film which are sequentially arranged from top to bottom;
thirdly, sticking a pre-sticking film on the bottom surface of the LGA product, and covering the groove with the pre-sticking film;
continuously sticking a PI film on the pre-sticking film at the bottom of the LGA product, cutting the whole LGA product into unit products along a cutting channel until partial PI films are cut, and still covering the pre-sticking film on the bottom edge of each unit product after cutting;
sputtering the LGA product, and sputtering metal layers on the upper surface and four side surfaces of the LGA product by a sputtering machine;
sixthly, carrying out film uncovering operation on the sputtered product;
and step seven, putting the stripped unit products into a carrying tray, and putting the unit products to be delivered in sequence.
Preferably, the green paint coverage area at the bottom of the LGA product in step one extends to the outer edge of the pins at the bottom of the single unit product, namely 25 um.
Preferably, in the first step, the area outside the green paint covered area is a green paint free covered area to form the groove.
Preferably, the outer edge of the bottom pin of the single unit product in the first step is at least 150um away from the outer edge of the LGA product.
Preferably, the thickness of the bonding layer in the second step is 12um, and the thickness of the substrate film is 12 um.
Preferably, the width of the effective area covered by the pre-coated film at the groove in the fourth step must be larger than the width of the cutting track.
Compared with the prior art, the invention has the advantages that:
1. the invention can solve the problem of product sputtering burr after traditional sputtering through the combination of groove design and pre-pasting film, thereby avoiding the problem of product short circuit caused by sputtering burr and greatly improving the yield;
2. the invention uses the pre-film to carry out the sputtering process, can ensure that the product has relatively low temperature, and prevents the product from discoloring at the bottom pin when the product is heated.
Drawings
FIG. 1 is a schematic diagram of a structure of a first step of a magnetron sputtering method for an LGA packaged electronic product according to the present invention.
FIG. 2 is a bottom view of the LGA packaged electronic product according to the second step of the magnetron sputtering method of the present invention.
FIG. 3 is a schematic structural diagram of a pre-film in a second step of the magnetron sputtering method for LGA packaged electronic products according to the present invention.
Fig. 4-7 are schematic diagrams illustrating a third step to a sixth step of a magnetron sputtering method for an LGA packaged electronic product according to the present invention.
Wherein:
Green paint coverage area 2
Pre-film 3
Release film 4
PI film 7
A metal layer 8.
Detailed Description
The invention is described in further detail below with reference to the accompanying examples.
The invention relates to a magnetron sputtering method of an LGA packaged electronic product, which comprises the following steps:
step one, taking an LGA product, wherein the LGA product comprises a plurality of unit products, and a groove 1 is designed between the bottoms of two adjacent unit products, as shown in figures 1 and 2;
the green paint coverage area 2 at the bottom of the LGA product extends to the position of about 25um outside the bottom pin of a single unit product, the area outside the green paint coverage area 2 is a green paint-free coverage area to form a groove 1, and the distance from the outer edge of the bottom pin of the single unit product to the outer edge of the LGA product is at least more than 150 um;
step two, taking a pre-film 3, wherein the structure of the pre-film is shown in figure 3, and the pre-film comprises a release film 4, an adhesive layer 5 and a substrate film 6 which are sequentially arranged from top to bottom, wherein the thickness of the adhesive layer 5 is 12um, and the thickness of the substrate film 6 is 12 um;
step three, pasting a pre-pasting film 3 on the bottom surface of the LGA product, as shown in FIG. 4, covering the groove 1 with a pre-pasting film, wherein the width of the effective area covered by the pre-pasting film at the groove 1 must be larger than the width of the cutting path;
step four, continuously pasting a PI film 7 on the pre-pasting film 3 at the bottom of the LGA product, completing product positioning point identification and correction on a cutting machine, cutting the whole LGA product into unit products along a cutting path, as shown in figure 5, cutting to a part of PI film, and still covering the pre-pasting film on the bottom edge of each unit product after cutting;
step five, sputtering the LGA product, as shown in figure 6, sputtering a metal layer 8 on the upper surface and 4 sides of the LGA product by a sputtering machine to achieve the effect of electromagnetic shielding;
sixthly, carrying out film uncovering operation on the sputtered product;
after the fifth step is finished, separating the LGA product from the pre-sticking film, and simultaneously keeping the redundant sputtering burrs and the pre-sticking film on the PI film;
and step seven, placing the stripped unit products into a carrying disc to finish placement of the LGA packaged electronic products to be delivered.
In addition, the present invention also includes other embodiments, and any technical solutions formed by equivalent transformation or equivalent replacement should fall within the protection scope of the claims of the present invention.
Claims (6)
1. A magnetron sputtering method of an LGA packaged electronic product is characterized by comprising the following steps:
step one, taking an LGA product, wherein the LGA product comprises a plurality of unit products, a groove is arranged between the bottoms of two adjacent unit products, and the groove is a green paint-free coverage area;
step two, taking a pre-sticking film, wherein the pre-sticking film comprises a release film, an adhesive layer and a base material film which are sequentially arranged from top to bottom;
thirdly, sticking a pre-sticking film on the bottom surface of the LGA product, and covering the groove with the pre-sticking film;
continuously sticking a PI film on the pre-sticking film at the bottom of the LGA product, cutting the whole LGA product into unit products along a cutting channel until partial PI films are cut, and still covering the pre-sticking film on the bottom edge of each unit product after cutting;
sputtering the LGA product, and sputtering metal layers on the upper surface and four side surfaces of the LGA product by a sputtering machine;
sixthly, carrying out film uncovering operation on the sputtered product;
and step seven, putting the stripped unit products into a carrying tray, and putting the unit products to be delivered in sequence.
2. The magnetron sputtering method of an LGA packaged electronic product according to claim 1, wherein: in the first step, the green paint coverage area at the bottom of the LGA product extends to the outer edge of 25um of the bottom pin of a single unit product.
3. The magnetron sputtering method of an LGA packaged electronic product according to claim 1, wherein: in the first step, areas outside the green paint covered area are covered by green-free paint to form grooves.
4. The magnetron sputtering method of an LGA packaged electronic product according to claim 1, wherein: in the first step, the outer edge of the bottom pin of the single unit product is at least over 150um away from the outer edge of the LGA product.
5. The magnetron sputtering method of an LGA packaged electronic product according to claim 1, wherein: in the second step, the thickness of the bonding layer is 12um, and the thickness of the base film is 12 um.
6. The magnetron sputtering method of an LGA packaged electronic product according to claim 1, wherein: in the fourth step, the width of the effective area covered by the pre-pasting film at the groove is larger than the width of the cutting path.
Priority Applications (1)
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CN201911196295.3A CN111118461A (en) | 2019-11-29 | 2019-11-29 | Magnetron sputtering method of LGA packaged electronic product |
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CN201911196295.3A CN111118461A (en) | 2019-11-29 | 2019-11-29 | Magnetron sputtering method of LGA packaged electronic product |
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Citations (9)
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US6556030B1 (en) * | 1999-09-01 | 2003-04-29 | Micron Technology, Inc. | Method of forming an electrical contact |
US20050106902A1 (en) * | 2003-11-17 | 2005-05-19 | International Business Machines Corporation | Interposer with electrical contact button and method |
JP2007311771A (en) * | 2006-04-21 | 2007-11-29 | Sanyo Electric Co Ltd | Semiconductor device and method of manufacturing the same |
CN101764118A (en) * | 2008-12-23 | 2010-06-30 | 日月光封装测试(上海)有限公司 | Base plate for packaging and semiconductor packaging structure |
CN106324720A (en) * | 2016-10-24 | 2017-01-11 | 昆山工研院新型平板显示技术中心有限公司 | Thin film packaging structure |
CN108417555A (en) * | 2018-04-28 | 2018-08-17 | 上海飞骧电子科技有限公司 | A kind of the radio-frequency module structure and implementation method of anti-electromagnetic interference |
CN109423219A (en) * | 2017-08-22 | 2019-03-05 | 利诺士尖端材料有限公司 | Organic electronic device adhesive film used for packing material and organic electronic device encapsulating material including it |
CN109979830A (en) * | 2017-12-28 | 2019-07-05 | 巴伦电子有限公司 | The manufacturing method of semiconductor package part |
CN209607730U (en) * | 2019-01-30 | 2019-11-08 | 江苏长电科技股份有限公司 | It is a kind of to prevent the LGA board structure plated that overflows |
-
2019
- 2019-11-29 CN CN201911196295.3A patent/CN111118461A/en active Pending
Patent Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6556030B1 (en) * | 1999-09-01 | 2003-04-29 | Micron Technology, Inc. | Method of forming an electrical contact |
US20050106902A1 (en) * | 2003-11-17 | 2005-05-19 | International Business Machines Corporation | Interposer with electrical contact button and method |
JP2007311771A (en) * | 2006-04-21 | 2007-11-29 | Sanyo Electric Co Ltd | Semiconductor device and method of manufacturing the same |
CN101764118A (en) * | 2008-12-23 | 2010-06-30 | 日月光封装测试(上海)有限公司 | Base plate for packaging and semiconductor packaging structure |
CN106324720A (en) * | 2016-10-24 | 2017-01-11 | 昆山工研院新型平板显示技术中心有限公司 | Thin film packaging structure |
CN109423219A (en) * | 2017-08-22 | 2019-03-05 | 利诺士尖端材料有限公司 | Organic electronic device adhesive film used for packing material and organic electronic device encapsulating material including it |
CN109979830A (en) * | 2017-12-28 | 2019-07-05 | 巴伦电子有限公司 | The manufacturing method of semiconductor package part |
CN108417555A (en) * | 2018-04-28 | 2018-08-17 | 上海飞骧电子科技有限公司 | A kind of the radio-frequency module structure and implementation method of anti-electromagnetic interference |
CN209607730U (en) * | 2019-01-30 | 2019-11-08 | 江苏长电科技股份有限公司 | It is a kind of to prevent the LGA board structure plated that overflows |
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