CN111106062A - Degassing process and method for manufacturing metal hard mask layer - Google Patents

Degassing process and method for manufacturing metal hard mask layer Download PDF

Info

Publication number
CN111106062A
CN111106062A CN201911407812.7A CN201911407812A CN111106062A CN 111106062 A CN111106062 A CN 111106062A CN 201911407812 A CN201911407812 A CN 201911407812A CN 111106062 A CN111106062 A CN 111106062A
Authority
CN
China
Prior art keywords
wafer
degassing
bearing table
cavity
preheating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201911407812.7A
Other languages
Chinese (zh)
Inventor
范思苓
倪立华
许隽
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai Huahong Grace Semiconductor Manufacturing Corp
Hua Hong Semiconductor Wuxi Co Ltd
Original Assignee
Shanghai Huahong Grace Semiconductor Manufacturing Corp
Hua Hong Semiconductor Wuxi Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shanghai Huahong Grace Semiconductor Manufacturing Corp, Hua Hong Semiconductor Wuxi Co Ltd filed Critical Shanghai Huahong Grace Semiconductor Manufacturing Corp
Priority to CN201911407812.7A priority Critical patent/CN111106062A/en
Publication of CN111106062A publication Critical patent/CN111106062A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76822Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76822Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
    • H01L21/76828Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. thermal treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors

Abstract

The invention discloses a degassing process method, which comprises the following steps: providing a wafer with a front dielectric film layer needing degassing formed on the surface; step two, heating the wafer bearing table in the degassing cavity to a set temperature; placing the wafer on the ejector pin positioned at the upper position in the degassing cavity; step four, preheating the wafer at the upper position; and step five, moving the thimble to the lower position, placing the preheated wafer on a wafer bearing table, and degassing the wafer. The invention also discloses a manufacturing method of the metal hard mask layer. The invention can avoid the stripping defect of the front dielectric film layer generated when the wafer is rapidly heated to the set temperature in the degassing process, thereby improving the yield of products.

Description

Degassing process and method for manufacturing metal hard mask layer
Technical Field
The present invention relates to a method for manufacturing a semiconductor integrated circuit, and more particularly, to a degassing (Degas) process. The invention also relates to a manufacturing method of the Metal Hard Mask layer (Metal Hard Mask).
Background
In the actual process of Metal Hard Mask, a wafer (wafer) passes through a Degas chamber (chamber) with a set temperature of 300 ℃ usually, the front surface of the wafer is heated by a bulb (lamp), the back surface of the wafer is heated by a heater (heater), impurities and moisture on the surface of the wafer are removed efficiently, and then a Metal Hard Mask layer is directly deposited in the process chamber, wherein the Metal Hard Mask layer usually adopts TiN Metal.
After the Wafer enters the Degas chamber, the surface is rapidly heated to a set temperature, the stress of a front dielectric film layer of the metal hard mask layer, such as a Low dielectric constant (Low-k) dielectric layer or a TEOS layer, is increased, and because the adhesion between the Low-k dielectric layer or the TEOS layer on the lower surface or the side position of the Wafer edge bevel (below) is poor, Peeling (Peeling) defects (defects) can be generated after the Wafer passes through the high-temperature Degas chamber, thereby affecting the yield of products.
Disclosure of Invention
The invention aims to provide a degassing process method which can avoid the stripping defect of a front dielectric film layer generated when a wafer is rapidly heated to a set temperature in the degassing process, thereby improving the yield of products. Therefore, the invention also provides a manufacturing method of the metal hard mask layer.
In order to solve the technical problems, the degassing process method provided by the invention comprises the following steps:
step one, providing a wafer consisting of a semiconductor substrate, and forming a front dielectric film layer needing degassing on the surface of the wafer.
And step two, a wafer bearing table is arranged in the degassing cavity, a lift Pin can penetrate through the wafer bearing table, the lift Pin is provided with an upper position (Pin up) and a lower position (Pin down), the upper position is positioned above the top surface of the wafer bearing table, and the lower position is positioned below the top surface of the wafer bearing table.
The degassing cavity is provided with a heating device for heating the wafer bearing table to a set temperature.
And step three, placing the wafer on the ejector pin positioned at the upper position in the degassing cavity.
And fourthly, keeping the upper position of the thimble, and preheating the wafer by utilizing the characteristic that the temperature of the upper position is lower than the surface temperature of the wafer bearing table, wherein the preheating increases the temperature of the wafer and ensures that the front dielectric film layer positioned on the edge bevel angle of the wafer cannot be peeled off in the heating process of subsequent degassing treatment.
And fifthly, the wafer after the preheating is placed on the wafer bearing table by moving the thimble to the lower position, the temperature of the wafer is raised to the set temperature, and the wafer is subjected to degassing treatment under the set temperature condition.
In a further improvement, the semiconductor substrate is a silicon substrate.
In a further improvement, the front dielectric film comprises a low dielectric constant dielectric layer or a TEOS layer.
In a further improvement, the preheating process in the fourth step further comprises a step of vacuumizing.
In a further improvement, in the second step, the heating device includes a resistance heater located on the wafer bearing table and a heating bulb located on a cavity wall or a cavity cover of the degassing cavity above the wafer bearing table.
In a further improvement, in the second step, the set temperature of the wafer stage includes 300 ℃.
A further improvement is that the temperature of the wafer after the preheating in the fourth step is more than 150 ℃.
In a further refinement, the evacuation during the preheating reduces the pressure of the degassing chamber to 7 Torr.
In order to solve the above technical problem, the method for manufacturing a metal hard mask layer provided by the present invention comprises the following steps:
step one, providing a wafer consisting of a semiconductor substrate, and forming a front dielectric film layer of a metal hard mask layer on the surface of the wafer.
And step two, a wafer bearing table is arranged in the degassing cavity, a thimble can penetrate through the wafer bearing table, the thimble is provided with an upper position and a lower position, the upper position is positioned above the top surface of the wafer bearing table, and the lower position is positioned below the top surface of the wafer bearing table.
The degassing cavity is provided with a heating device for heating the wafer bearing table to a set temperature.
And step three, placing the wafer on the ejector pin positioned at the upper position in the degassing cavity.
And fourthly, keeping the upper position of the thimble, and preheating the wafer by utilizing the characteristic that the temperature of the upper position is lower than the surface temperature of the wafer bearing table, wherein the preheating increases the temperature of the wafer and ensures that the front dielectric film layer positioned on the edge bevel angle of the wafer cannot be peeled off in the heating process of subsequent degassing treatment.
And fifthly, the wafer after the preheating is placed on the wafer bearing table by moving the thimble to the lower position, the temperature of the wafer is raised to the set temperature, and the wafer is subjected to degassing treatment under the set temperature condition.
And sixthly, placing the wafer subjected to degassing treatment into a metal hard mask layer growth process cavity, and growing the metal hard mask layer on the surface of the front dielectric film layer in the metal hard mask layer growth process cavity.
In a further improvement, the semiconductor substrate is a silicon substrate.
In a further improvement, the front dielectric film comprises a low dielectric constant dielectric layer or a TEOS layer.
The metal hard mask layer comprises TiN.
In a further improvement, the preheating process in the fourth step further comprises a step of vacuumizing.
In a further improvement, in the second step, the heating device includes a resistance heater located on the wafer bearing table and a heating bulb located on a cavity wall or a cavity cover of the degassing cavity above the wafer bearing table.
In a further improvement, in the second step, the set temperature of the wafer stage includes 300 ℃.
And step four, the temperature of the wafer after the preheating is finished is more than 150 ℃.
The evacuation during the preheating reduces the pressure of the degassing chamber to 7 Torr.
The further improvement is that after the step six is completed, the method also comprises the following steps: and step seven, moving the wafer into a cooling cavity for cooling.
According to the invention, after the wafer is placed on the ejector pin of the degassing cavity, the ejector pin is not immediately lowered to the lower position, but is kept at the upper position, and the wafer is preheated at the upper position; the upper position of the thimble is far away from the top surface of the wafer bearing table, so that the temperature of the upper position is lower than that of the wafer bearing table, and the front dielectric film layer on the wafer cannot be peeled off in the preheating process of the upper position; when the wafer is placed on the wafer bearing table with higher temperature after preheating, the wafer is preheated to a certain temperature, so the temperature rise gradient of the wafer is reduced, and the peeling generated in the temperature rise process of degassing treatment can be prevented.
In addition, the degassing process can be realized by controlling the position of the wafer only through the ejector pin, and the preheating is directly realized in the degassing cavity without adding an additional preheating cavity, so the process is simple and the cost is low.
In addition, the invention can be well suitable for the degassing treatment of a front dielectric film layer before the metal hard mask layer, such as a low dielectric constant dielectric layer or a TEOS (tetraethyl orthosilicate) layer, and finally can improve the formation quality of the metal hard mask layer. The metal hard mask layer is generally used in a damascene process and serves as an etching mask for a metal through hole.
Drawings
The invention is described in further detail below with reference to the following figures and detailed description:
FIG. 1 is a flow diagram of a degassing process according to an embodiment of the present invention;
FIG. 2A is a schematic structural diagram of a degassing chamber with a needle in an up position according to a degassing method of an embodiment of the present invention;
FIG. 2B is a schematic structural diagram of a degassing cavity with a thimble in a lower position according to a degassing method of an embodiment of the present invention;
FIG. 3 is a graph of wafer temperature over time in a degas chamber of a degas process method according to an embodiment of the present invention;
FIG. 4 is a flow chart of a method of fabricating a metal hard mask layer in accordance with an embodiment of the present invention;
FIG. 5A is a defect test chart of a wafer surface after a conventional method for manufacturing a metal hard mask layer is completed;
FIG. 5B is a defect testing chart of the wafer surface after the manufacturing method of the metal hard mask layer according to the embodiment of the invention is completed.
Detailed Description
FIG. 1 is a flow chart of a degassing process according to an embodiment of the present invention; fig. 2A is a schematic structural diagram of a degassing cavity with a thimble 2 at an upper position in a degassing process method according to an embodiment of the present invention; fig. 2B is a schematic structural diagram of the degassing cavity when the thimble 2 is at the lower position in the degassing process method according to the embodiment of the present invention; the degassing process method provided by the embodiment of the invention comprises the following steps:
step one, providing a wafer 3 composed of a semiconductor substrate, and forming a front dielectric film layer needing degassing on the surface of the wafer 3.
The semiconductor substrate is a silicon substrate.
The front dielectric film comprises a low dielectric constant dielectric layer or a TEOS layer.
And step two, a wafer bearing table 1 is arranged in the degassing cavity, a thimble 2 can penetrate through the wafer bearing table 1, the thimble 2 is provided with an upper position and a lower position, the upper position is positioned above the top surface of the wafer bearing table 1, and the lower position is positioned below the top surface of the wafer bearing table 1.
The degassing cavity is provided with a heating device for heating the wafer bearing table 1 to a set temperature.
As shown in fig. 2A, the bottom of the wafer stage 1 is a supporting device 5.
The thimble 2 sets up on elevating gear 4, elevating gear 4 realizes going up and down through the cylinder or elevating gear 4 realizes going up and down through step motor.
The position sensor 6 is used for detecting the position of the thimble 2.
And the top limiting device 7 is used for limiting the highest position of the thimble 2.
The heating device comprises a resistance heater positioned on the wafer bearing table 1 and a heating bulb positioned on the cavity wall or the cavity cover of the degassing cavity above the wafer bearing table 1.
Step three, as shown in fig. 2A, the wafer 3 is placed on the thimble 2 located at the upper position in the degassing cavity.
Step four, as shown in fig. 2A, the upper position of the thimble 2 is maintained, and the wafer 3 is preheated by utilizing the characteristic that the temperature of the upper position is lower than the surface temperature of the wafer bearing table 1, so that the temperature of the wafer 3 is increased by preheating, and the front dielectric film layer on the edge bevel angle of the wafer 3 is ensured not to be peeled off in the heating process of the subsequent degassing treatment.
The preheating process also comprises the step of vacuumizing.
Step five, as shown in fig. 2B, the wafer 3 after the preheating is placed on the wafer bearing table 1 by moving the ejector pin 2 to the lower position, the wafer 3 is heated to the set temperature, and the wafer 3 is subjected to the degassing treatment under the set temperature condition.
The degassing process method of the embodiment of the invention is described by specific parameters:
in the second step, the set temperature of the wafer bearing table 1 is about 300 ℃.
FIG. 3 is a graph showing the temperature of the wafer 3 in the degassing chamber according to the degassing method of the embodiment of the present invention;
in fig. 3, the time period corresponding to Pin up represents the preheating stage; the time period corresponding to Pin down represents the degassing treatment stage of step five. The curve 101 represents a time-dependent temperature change curve of the wafer 3, and the ordinate of the curve 101 is the left-hand coordinate. The curve 102 represents a temperature variation range curve, and the ordinate of the curve 102 is the right-side coordinate, and it can be seen from the curve 102 that the temperature variation range is small.
It can be seen that, in the preheating stage, the temperature of the wafer 3 rises slowly, and after the preheating is finished, the temperature of the wafer 3 is 150 ℃.
During the degassing process, the temperature of the wafer 3 is raised from the higher preheating temperature to the set temperature.
The evacuation during the preheating reduces the pressure of the degassing chamber to 7 Torr. In fig. 3, Pumpdown indicates the evacuation, and the pressure of the degassing chamber is reduced to 7Torr after the evacuation is completed.
According to the degassing process method provided by the embodiment of the invention, after the wafer 3 is placed on the ejector pin 2 of the degassing cavity, the ejector pin 2 is not immediately lowered to the lower position, but the ejector pin 2 is kept at the upper position, and the wafer 3 is preheated at the upper position; the upper position of the thimble 2 is far away from the top surface of the wafer bearing platform 1, so the temperature of the upper position is lower than that of the wafer bearing platform 1, and the front dielectric film layer on the wafer 3 can not be peeled off in the preheating process of the upper position; when the wafer 3 is placed on the wafer bearing table 1 with higher temperature after preheating, because the wafer 3 is preheated to a certain temperature, the temperature rise gradient of the wafer 3 is reduced, and peeling in the temperature rise process of degassing treatment can be prevented, so compared with the prior art that the wafer 3 is directly placed on the wafer bearing table 1 and the wafer 3 is heated, the peeling defect of the front dielectric film layer generated when the wafer 3 is rapidly heated to the set temperature in the degassing process can be avoided, particularly the peeling defect of the front dielectric film layer on the edge bevel angle of the wafer 3 can be avoided, and the yield of products can be improved.
In addition, the degassing process of the degassing process method in the embodiment of the invention can be realized by controlling the position of the wafer 3 only through the ejector pin 2, and the preheating is directly realized in the degassing cavity without adding an additional preheating cavity, so that the degassing process method in the embodiment of the invention has simple process and low cost.
FIG. 4 is a flow chart of a method for fabricating a metal hard mask layer according to an embodiment of the present invention; the manufacturing method of the metal hard mask layer comprises the following steps:
step one, providing a wafer 3 consisting of a semiconductor substrate, and forming a front-layer dielectric film layer of a metal hard mask layer on the surface of the wafer 3.
The semiconductor substrate is a silicon substrate.
The front dielectric film comprises a low dielectric constant dielectric layer or a TEOS layer.
The metal hard mask layer comprises TiN.
And step two, a wafer bearing table 1 is arranged in the degassing cavity, a thimble 2 can penetrate through the wafer bearing table 1, the thimble 2 is provided with an upper position and a lower position, the upper position is positioned above the top surface of the wafer bearing table 1, and the lower position is positioned below the top surface of the wafer bearing table 1.
The degassing cavity is provided with a heating device for heating the wafer bearing table 1 to a set temperature.
As shown in fig. 2A, the bottom of the wafer stage 1 is a supporting device 5.
The thimble 2 sets up on elevating gear 4, elevating gear 4 realizes going up and down through the cylinder or elevating gear 4 realizes going up and down through step motor.
The position sensor 6 is used for detecting the position of the thimble 2.
And the top limiting device 7 is used for limiting the highest position of the thimble 2.
The heating device comprises a resistance heater positioned on the wafer bearing table 1 and a heating bulb positioned on the cavity wall or the cavity cover of the degassing cavity above the wafer bearing table 1.
Step three, as shown in fig. 2A, the wafer 3 is placed on the thimble 2 located at the upper position in the degassing cavity.
Step four, as shown in fig. 2A, the upper position of the thimble 2 is maintained, and the wafer 3 is preheated by utilizing the characteristic that the temperature of the upper position is lower than the surface temperature of the wafer bearing table 1, so that the temperature of the wafer 3 is increased by preheating, and the front dielectric film layer on the edge bevel angle of the wafer 3 is ensured not to be peeled off in the heating process of the subsequent degassing treatment.
The preheating process also comprises the step of vacuumizing.
Step five, as shown in fig. 2B, the wafer 3 after the preheating is placed on the wafer bearing table 1 by moving the ejector pin 2 to the lower position, the wafer 3 is heated to the set temperature, and the wafer 3 is subjected to the degassing treatment under the set temperature condition.
Sixthly, the wafer 3 which is subjected to the degassing treatment is placed in a metal hard mask layer growth process cavity, and the metal hard mask layer grows on the surface of the front dielectric film layer in the metal hard mask layer growth process cavity.
And step seven, moving the wafer 3 into a cooling cavity for cooling.
The method for manufacturing a metal hard mask layer according to the embodiment of the invention is described by specific parameters:
in the second step, the set temperature of the wafer bearing table 1 is about 300 ℃.
As shown in fig. 3, it is a curve of the temperature of the wafer 3 in the degassing chamber with time in the method for manufacturing a metal hard mask layer according to the embodiment of the present invention;
in fig. 3, the time period corresponding to Pin up represents the preheating stage; the time period corresponding to Pin down represents the degassing treatment stage of step five. Wherein the curve 101 represents the temperature of the wafer 3 as a function of time.
It can be seen that, in the preheating stage, the temperature of the wafer 3 rises slowly, and after the preheating is finished, the temperature of the wafer 3 is 150 ℃.
During the degassing process, the temperature of the wafer 3 is raised from the higher preheating temperature to the set temperature.
The evacuation during the preheating reduces the pressure of the degassing chamber to 7 Torr. In fig. 3, Pumpdown indicates the evacuation, and the pressure of the degassing chamber is reduced to 7Torr after the evacuation is completed.
Therefore, the method provided by the embodiment of the invention can be well suitable for degassing treatment of a front dielectric film layer before the metal hard mask layer, such as a low dielectric constant dielectric layer or a TEOS (tetraethyl orthosilicate) layer, and finally can improve the formation quality of the metal hard mask layer. The metal hard mask layer is generally used in a damascene process and serves as an etching mask for a metal through hole.
As shown in fig. 5A, which is a defect testing diagram of a wafer surface after a conventional method for manufacturing a metal hard mask layer is completed, in the conventional method for manufacturing a metal hard mask layer, after a wafer 3 is placed in the degassing cavity, the ejector pin 2 is lowered to a lower position and the wafer 3 is placed on the top surface of the wafer bearing table 1, and as can be seen from the defect testing diagram of fig. 5A, fig. 5A includes many defects 201.
As shown in fig. 5B, which is a defect testing chart of the wafer surface after the manufacturing method of the metal hard mask layer according to the embodiment of the invention is completed, the number of defects 201 is greatly reduced compared with fig. 5A.
The present invention has been described in detail with reference to the specific embodiments, but these should not be construed as limitations of the present invention. Many variations and modifications may be made by one of ordinary skill in the art without departing from the principles of the present invention, which should also be considered as within the scope of the present invention.

Claims (15)

1. A degassing process method is characterized by comprising the following steps:
providing a wafer consisting of a semiconductor substrate, and forming a front dielectric film layer needing degassing on the surface of the wafer;
step two, a wafer bearing table is arranged in the degassing cavity, a thimble can penetrate through the wafer bearing table, the thimble is provided with an upper position and a lower position, the upper position is positioned above the top surface of the wafer bearing table, and the lower position is positioned below the top surface of the wafer bearing table;
the degassing cavity is provided with a heating device for heating the wafer bearing table to a set temperature;
thirdly, placing the wafer on the ejector pin positioned at the upper position in the degassing cavity;
fourthly, keeping the upper position of the thimble, and preheating the wafer by utilizing the characteristic that the temperature of the upper position is lower than the surface temperature of the wafer bearing table, wherein the preheating increases the temperature of the wafer and ensures that the front dielectric film layer positioned on the edge bevel angle of the wafer cannot be peeled off in the heating process of subsequent degassing treatment;
and fifthly, the wafer after the preheating is placed on the wafer bearing table by moving the thimble to the lower position, the temperature of the wafer is raised to the set temperature, and the wafer is subjected to degassing treatment under the set temperature condition.
2. The degassing process of claim 1, wherein: the semiconductor substrate is a silicon substrate.
3. The degassing process of claim 2, wherein: the front dielectric film comprises a low dielectric constant dielectric layer or a TEOS layer.
4. The degassing process of claim 3, wherein: and step four, the preheating process also comprises the step of vacuumizing.
5. The degassing process of claim 4, wherein: in the second step, the heating device comprises a resistance heater positioned on the wafer bearing table and a heating bulb positioned on the cavity wall or the cavity cover of the degassing cavity above the wafer bearing table.
6. The degassing process of claim 5, wherein: in the second step, the set temperature of the wafer bearing table comprises 300 ℃.
7. The degassing process of claim 6, wherein: and step four, the temperature of the wafer after the preheating is finished is more than 150 ℃.
8. The degassing process of claim 4, wherein: the evacuation during the preheating reduces the pressure of the degassing chamber to 7 Torr.
9. A method for manufacturing a metal hard mask layer is characterized by comprising the following steps:
providing a wafer consisting of a semiconductor substrate, and forming a front dielectric film layer of a metal hard mask layer on the surface of the wafer;
step two, a wafer bearing table is arranged in the degassing cavity, a thimble can penetrate through the wafer bearing table, the thimble is provided with an upper position and a lower position, the upper position is positioned above the top surface of the wafer bearing table, and the lower position is positioned below the top surface of the wafer bearing table;
the degassing cavity is provided with a heating device for heating the wafer bearing table to a set temperature;
thirdly, placing the wafer on the ejector pin positioned at the upper position in the degassing cavity;
fourthly, keeping the upper position of the thimble, and preheating the wafer by utilizing the characteristic that the temperature of the upper position is lower than the surface temperature of the wafer bearing table, wherein the preheating increases the temperature of the wafer and ensures that the front dielectric film layer positioned on the edge bevel angle of the wafer cannot be peeled off in the heating process of subsequent degassing treatment;
fifthly, the wafer after the preheating is placed on the wafer bearing table by moving the ejector pin to the lower position, the wafer is heated to the set temperature, and the wafer is subjected to degassing treatment under the set temperature condition;
and sixthly, placing the wafer subjected to degassing treatment into a metal hard mask layer growth process cavity, and growing the metal hard mask layer on the surface of the front dielectric film layer in the metal hard mask layer growth process cavity.
10. The degassing process of claim 9, wherein: the semiconductor substrate is a silicon substrate.
11. The degassing process of claim 10 wherein: the front dielectric film comprises a low dielectric constant dielectric layer or a TEOS layer;
the metal hard mask layer comprises TiN.
12. The degassing process of claim 11 wherein: and step four, the preheating process also comprises the step of vacuumizing.
13. The degassing process of claim 12, wherein: in the second step, the heating device comprises a resistance heater positioned on the wafer bearing table and a heating bulb positioned on the cavity wall or the cavity cover of the degassing cavity above the wafer bearing table.
14. The degassing process of claim 13, wherein: in the second step, the set temperature of the wafer bearing table comprises 300 ℃;
in the fourth step, the temperature of the wafer after the preheating is finished is more than 150 ℃;
the evacuation during the preheating reduces the pressure of the degassing chamber to 7 Torr.
15. The degassing process of claim 9, wherein: after the sixth step is finished, the method also comprises the following steps:
and step seven, moving the wafer into a cooling cavity for cooling.
CN201911407812.7A 2019-12-31 2019-12-31 Degassing process and method for manufacturing metal hard mask layer Pending CN111106062A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201911407812.7A CN111106062A (en) 2019-12-31 2019-12-31 Degassing process and method for manufacturing metal hard mask layer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201911407812.7A CN111106062A (en) 2019-12-31 2019-12-31 Degassing process and method for manufacturing metal hard mask layer

Publications (1)

Publication Number Publication Date
CN111106062A true CN111106062A (en) 2020-05-05

Family

ID=70423920

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201911407812.7A Pending CN111106062A (en) 2019-12-31 2019-12-31 Degassing process and method for manufacturing metal hard mask layer

Country Status (1)

Country Link
CN (1) CN111106062A (en)

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060225651A1 (en) * 2005-02-17 2006-10-12 Koji Ueno Method for manufacturing a semiconductor device and apparatus for manufacturing the same
CN104603914A (en) * 2012-09-07 2015-05-06 应用材料公司 Integrated processing of porous dielectric, polymer-coated substrates and epoxy within a multi-chamber vacuum system confirmation
CN104979249A (en) * 2015-07-22 2015-10-14 上海华力微电子有限公司 Gas in and out device, heat treatment machine board, and gas in and out method
CN105655234A (en) * 2014-11-28 2016-06-08 Spts科技有限公司 Method of degassing
CN106711122A (en) * 2015-11-17 2017-05-24 台湾积体电路制造股份有限公司 Semiconductor structure and manufacturing method thereof
CN107078090A (en) * 2014-10-03 2017-08-18 应用材料公司 Spring loaded pin for base assembly and the processing method using the spring loaded pin
CN108475641A (en) * 2016-02-01 2018-08-31 马特森技术有限公司 Pre-heating mean for Millisecond annealing system
CN110473775A (en) * 2019-08-29 2019-11-19 上海华力集成电路制造有限公司 Improve the method for film removing

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060225651A1 (en) * 2005-02-17 2006-10-12 Koji Ueno Method for manufacturing a semiconductor device and apparatus for manufacturing the same
CN104603914A (en) * 2012-09-07 2015-05-06 应用材料公司 Integrated processing of porous dielectric, polymer-coated substrates and epoxy within a multi-chamber vacuum system confirmation
CN107078090A (en) * 2014-10-03 2017-08-18 应用材料公司 Spring loaded pin for base assembly and the processing method using the spring loaded pin
CN105655234A (en) * 2014-11-28 2016-06-08 Spts科技有限公司 Method of degassing
CN104979249A (en) * 2015-07-22 2015-10-14 上海华力微电子有限公司 Gas in and out device, heat treatment machine board, and gas in and out method
CN106711122A (en) * 2015-11-17 2017-05-24 台湾积体电路制造股份有限公司 Semiconductor structure and manufacturing method thereof
CN108475641A (en) * 2016-02-01 2018-08-31 马特森技术有限公司 Pre-heating mean for Millisecond annealing system
CN110473775A (en) * 2019-08-29 2019-11-19 上海华力集成电路制造有限公司 Improve the method for film removing

Similar Documents

Publication Publication Date Title
KR101843616B1 (en) Method for improving chemical resistance of polymerized film, polymerized film forming method, film forming apparatus, and electronic product manufacturing method
CN105712719B (en) A kind of normal pressure-sintered manufacturing method of large scale high density fine grain ITO target
CN101118845A (en) Method for producing bonded wafer
KR100231766B1 (en) Method of fabricating metal layer as interconnector in semiconductor integrated circuit
CN111106062A (en) Degassing process and method for manufacturing metal hard mask layer
TW201446984A (en) Heating cavity and semiconductor processing device
CN111048409A (en) Batch type diffusion deposition method
CN111235547B (en) Chemical vapor deposition method
US20030215962A1 (en) Integration of multiple processes within a single chamber
US10319612B2 (en) Method for the rapid processing of polymer layers in support of imidization processes and fan out wafer level packaging including effiecient drying of precursor layers
KR20190124048A (en) Method for fabricating bush, Assembly for supporting substrate, and Apparatus for processing having the same
TWI681500B (en) Wafer process equipment and method for processing wafer
US6316335B1 (en) Method for fabricating semiconductor device
CN102914950B (en) Dry re-stripping method for metal layer photoetching
KR101935607B1 (en) Semiconductor device manufacturing method
US20210214272A1 (en) Adsorbing apparatus for glass wafer
KR102297311B1 (en) Assembly for supporting substrate and apparatus for processing having the same
JPH09181060A (en) Thin-film formation device
CN208167099U (en) A kind of chemical vapor deposition equipment uses pedestal
KR100752199B1 (en) Manufacturing method of semiconductor device
CN113832450A (en) Method and equipment for automatically lifting and rotating wafer
US20210375673A1 (en) Method for manufacturing wire layer
CN109560020B (en) Structure and method for stripping wafer metal film by using NMP steam
KR102490356B1 (en) Method for Treatment for Element Established in Apparatus for Processing of Substrate
CN114879456A (en) Wafer processing system

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication

Application publication date: 20200505

RJ01 Rejection of invention patent application after publication