CN111082806B - Method and system for eliminating noise - Google Patents
Method and system for eliminating noise Download PDFInfo
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Abstract
The invention discloses a method for eliminating noise, which comprises connecting an original analog signal and a detection circuit; switching connection relation to obtain a comprehensive analog signal; sampling the comprehensive analog signal to obtain a comprehensive digital signal sequence; performing discrete Fourier transform on the comprehensive digital signal sequence to obtain a frequency domain digital signal; solving a frequency domain useful signal in a frequency domain; and carrying out inverse Fourier transform on the frequency domain useful signal to obtain a time domain useful signal. The invention realizes the noise elimination in the full time domain by isolating the noise and the signal in the frequency domain, and avoids the problem that the noise can not be eliminated due to different amplitudes of the noise at different time points in the traditional noise reduction technology.
Description
Technical Field
The present invention relates to the field of signal detection, and in particular, to a method and a system for eliminating noise.
Background
In an electronic system, various circuit noises such as thermal noise, flicker noise (1/f noise), shot noise, etc. directly affect the signal detection capability of a sensor or a signal acquisition system. Particularly in the fields of resource exploration, aerospace and the like with higher requirements on signal detection capability, such as accelerometers, detectors, seismometers, gravity gradiometers and the like, circuit noise seriously restricts the weak signal detection capability of a signal detection system.
The prior art means for eliminating circuit noise mainly utilizes the fact that low-frequency noise generated by the same circuit has correlation in time, and if the same noise is sampled twice in adjacent short time, and then the noise sampled before and after is subtracted by a differential circuit, the purpose of weakening circuit noise such as thermal noise, flicker noise, shot noise and the like in a low-frequency band can be achieved.
However, if a multi-path signal multi-path circuit is involved, the circuit cannot handle, and even if only one path of signal has a high noise frequency, the direct subtraction method adopted in the prior art usually cannot weaken the noise, and sometimes even increases the noise.
Disclosure of Invention
In view of the above, the present disclosure provides a method and a system for eliminating noise.
In a first aspect, the present invention provides a method for eliminating noise, including:
concatenating a first original analog signal x1And a first detection circuit for outputting a first integrated analog signal y11(ii) a Connecting the second original analog signal x2And a second detection circuit for outputting a second integrated analog signal y22Maintaining the connection stateA time Δ t;
the first integrated analog signal y11Is the first useful signal s1With first system noise n1Summing;
the second integrated analog signal y22Is the second useful signal s2And second system noise n2Summing; .
Switching the connection relation to connect the first original analog signal x1And a second detection circuit for outputting a third integrated analog signal y12(ii) a Connecting the second original analog signal x2And a first detection circuit for outputting a fourth integrated analog signal y21Maintaining the connection state for a time Δ t;
said third integrated analog signal y12Is the first useful signal s1And second system noise n2Summing;
said fourth integrated analog signal y21Is the second useful signal s2With first system noise n1Summing;
repeatedly switching the connection relation for 2N times to obtain N groups of comprehensive analog signals y in total, wherein the comprehensive analog signals y comprise first comprehensive analog signals y11A second integrated analog signal y22A third integrated analog signal y12And a fourth integrated analog signal y21；
For the first synthetic analog signal y11Sampling N times to obtain a first comprehensive digital signal sequence D11(ii) a For the second synthetic analog signal y22Sampling for N times to obtain a second comprehensive digital signal sequence D22(ii) a For the third combined analog signal y12Sampling for N times to obtain a third comprehensive digital signal sequence D12(ii) a For the fourth synthetic analog signal y21Sampling for N times to obtain a fourth comprehensive digital signal sequence D21；
For the first integrated digital signal sequence D11Performing discrete Fourier transform to obtain a first frequency domain digital signal F11(ω); for the second integrated digital signal sequence D22Performing discrete Fourier transform to obtain a second frequency domain digital signal F22(ω); for the third heddleComposite digital signal sequence D12Performing discrete Fourier transform to obtain a third frequency domain digital signal F12(ω); for the fourth integrated digital signal sequence D21Performing discrete Fourier transform to obtain a fourth frequency domain digital signal F21(ω)；
The first frequency domain digital signal F11(ω) is the first frequency domain useful signal S1(omega) and a first frequency domain noise signal N1(ω) sum; the second frequency domain digital signal F22(ω) is the second frequency domain useful signal S2(omega) and a second frequency domain noise signal N2(ω) sum; the third frequency domain digital signal F12(ω) is the first frequency domain useful signal S1(omega) and a second frequency domain noise signal N2(ω) sum; the fourth frequency domain digital signal F21(ω) is the second frequency domain useful signal S2(omega) and a first frequency domain noise signal N1(ω) sum;
the useful signal S of the first frequency domain is solved in the frequency domain1(omega) and a second frequency domain useful signal S2(ω)；
For the first frequency domain useful signal S1(omega) and a second frequency domain useful signal S2(omega) performing inverse Fourier transform to obtain a first useful signal s in time domain1And a time domain second useful signal s2。
Wherein the first original analog signal x1And a second original analog signal x2From the signal source output.
Wherein, for the first integrated digital signal sequence D11A second integrated digital signal sequence D22A third integrated digital signal sequence D12And a fourth sequence of integrated digital signals D21And performing real-time storage.
Wherein, for the first integrated digital signal sequence D11A second integrated digital signal sequence D22A third integrated digital signal sequence D12And a fourth sequence of integrated digital signals D21A fast fourier transform is performed instead of a discrete fourier transform.
Wherein the original analog signal is a single channel signal or a differential signal.
In another aspect, the present invention provides a system for eliminating noise, including:
the switching module is used for switching the connection state of the original analog signal and the detection circuit;
the detection circuit is used for processing the original analog signal to obtain a comprehensive analog output signal;
the analog-to-digital conversion module is used for sampling the comprehensive analog output signal y and performing analog-to-digital conversion;
the operation module comprises a Fourier transform module, a calculation module and an inverse Fourier transform module and is used for operating the comprehensive digital signal sequence to obtain a time domain digital signal;
and the control module is used for controlling the switching module and the operation module.
The power supply module is used for providing power for other modules.
Wherein the analog-to-digital conversion module is composed of a sigma-delta type analog-to-digital converter.
A computer-readable storage medium, characterized in that the computer-readable storage medium has stored thereon a noise cancellation program which, when executed by a processor, carries out the steps of the method of cancelling noise according to the preceding claim.
An electronic device, comprising a memory and a processor, the memory having stored therein a noise cancellation program, which program, when executed by the processor, carries out the steps of the method of canceling noise according to the preceding claim.
According to the method and the system for eliminating the noise, the noise and the signal are isolated in the frequency domain, the noise elimination in the full time domain is achieved, and the problem that the noise cannot be eliminated due to the fact that the amplitude of the noise is different at different time points in the traditional noise reduction technology is solved.
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In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic diagram of a method for eliminating noise according to an embodiment of the present invention.
Fig. 2 is a schematic structural diagram of a system for removing noise according to an embodiment of the present invention.
FIG. 3 is a schematic diagram of a first synthesized digital signal D11, a second synthesized digital signal D22, a third synthesized digital signal D12, and a fourth synthesized digital signal D21 according to an embodiment of the present invention
FIG. 4 is a diagram of a first synthesized digital signal D according to an embodiment of the present inventionAAnd a second integrated digital signal DBSchematic representation of (a).
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, it should also be noted that, unless explicitly stated or limited otherwise, the terms "disposed," "coupled," and "connected" are to be construed broadly, and for example, "connected" may be a direct connection, an indirect connection through intermediate media, and a connection between two elements. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
In this document, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The traditional signal detection circuit has different design schemes in different application occasions, but no matter what kind of signal detection circuit is, in order to improve the detection precision, especially increase the detection capability of weak signals, a pre-amplification circuit and a filter circuit are required to be arranged in the circuit, and the two circuit structures can introduce larger circuit noise.
Aiming at the problem that the direct subtraction method adopted by the prior art can not weaken noise generally, the invention analyzes the principle of the prior art, and finds that the reason is that when the noise frequency is higher, the waveform amplitude of the noise in the two sampling time intervals can generate larger change, and the direct subtraction can not eliminate the noise. Especially when the amplitude of the waveform at two sampling times is positive, negative, the direct subtraction results in increased noise.
In view of the foregoing problems, an embodiment of the present invention provides a method for eliminating noise, including:
s1, connecting the first original analog signal x1And a first detection circuit for outputting a first integrated analog signal y11(ii) a Connecting the second original analog signal x2And a second detection circuit for outputting a second integrated analog signal y22The connection state is maintained for a time Δ t.
The first integrated analog signal y11Is the first useful signal s1With first system noise n1The sum of the total weight of the components,i.e. y11＝s1+n1。
The second integrated analog signal y22Is the second useful signal s2And second system noise n2Sum, i.e. y22＝s2+n2。
The first original analog signal x1And a second original analog signal x2The output from the signal source is, for example, the direct output of the signals collected by various sensors.
The comprehensive analog signal y obtained after the original analog signal x is processed by the detection circuit comprises a useful signal s and a noise signal n, wherein the useful signal s is formed after the original analog signal x is subjected to signal detection processing, and the system noise n is generated in the process of signal detection processing. The signal detection processing process comprises operations of amplification, filtering and the like.
S2, switching connection relation and connecting the first original analog signal x1And a second detection circuit for outputting a third integrated analog signal y12(ii) a Connecting the second original analog signal x2And a first detection circuit for outputting a fourth integrated analog signal y21The connection state is maintained for a time Δ t.
Said third integrated analog signal y12Is the first useful signal s1And second system noise n2Sum, i.e. y12＝s1+n2。
Said fourth integrated analog signal y21Is the second useful signal s2With first system noise n1Sum, i.e. y21＝s2+n1。
Outputting a group of comprehensive analog signals y in two adjacent states, repeatedly switching the connection relation for 2N times to obtain N groups of comprehensive analog signals y in total, wherein the comprehensive analog signals y comprise a first comprehensive analog signal y11A second integrated analog signal y22A third integrated analog signal y12And a fourth integrated analog signal y21；
S3, for the first integrated analog signal y11Sampling for N times to obtainFirst integrated digital signal sequence D11(ii) a For the second synthetic analog signal y22Sampling for N times to obtain a second comprehensive digital signal sequence D22(ii) a For the third combined analog signal y12Sampling for N times to obtain a third comprehensive digital signal sequence D12(ii) a For the fourth synthetic analog signal y21Sampling for N times to obtain a fourth comprehensive digital signal sequence D21。
In one embodiment of the invention, the first integrated analog signal y is subjected to11Sampling is carried out once every 2 delta t time, and then y can be realized11Sampling is performed N times. For the same reason, for the second integrated analog signal y22The third combined analog signal y12And a fourth integrated analog signal y21Similarly, N samples are obtained by sampling every 2 Δ t, and since the switching time interval is Δ t and the sampling interval is 2 Δ t, the switching frequency is 2 times the sampling frequency.
In order to be able to completely reconstruct the original signal, in an embodiment of the present invention, the frequency of sampling the integrated analog output signal y is greater than 2 times of the maximum frequency of the signal to be detected, and in order to further reduce the influence of frequency aliasing on signal reconstruction, especially in the case of insufficient sampling time, it is preferable that the sampling frequency is 4 times of the maximum frequency of the signal to be detected. In an embodiment of the invention, the frequency of the useful signal is 200Hz at the maximum, and the sampling frequency of the analog-to-digital converter of an embodiment of the invention can be set to be greater than 800 Hz.
Preferably, the array length N is 2a3b5c7d11e13fWherein a, b, c, d, e, f are natural numbers, and the sum of e and f is 0 or 1. By adopting the array length, a Fast Fourier Transform (FFT) with higher efficiency can be used for replacing DFT when the operation step of S4 is carried out, so that the calculation efficiency is highest, and resources are greatly saved.
Furthermore, the comprehensive digital signal sequence D is sampled and then stored in real time, so that subsequent program extraction processing and sampling detection are facilitated.
S4, for the first comprehensive digitSignal sequence D11Performing discrete Fourier transform to obtain a first frequency domain digital signal F11(ω); for the second integrated digital signal sequence D22Performing discrete Fourier transform to obtain a second frequency domain digital signal F22(ω); for the third integrated digital signal sequence D12Performing discrete Fourier transform to obtain a third frequency domain digital signal F12(ω); for the fourth integrated digital signal sequence D21Performing discrete Fourier transform to obtain a fourth frequency domain digital signal F21(ω)。
In an embodiment with a sample length of N, the conversion equation is as follows:
the first frequency domain digital signal F11(ω) is the first frequency domain useful signal S1(omega) and a first frequency domain noise signal N1Sum of (ω), i.e. F11(ω)＝S1(ω)+N1(ω)；
The second frequency domain digital signal F22(ω) is the second frequency domain useful signal S2(omega) and a second frequency domain noise signal N2Sum of (ω), i.e. F22(ω)＝S2(ω)+N2(ω)；
The third frequency domain digital signal F12(ω) is the first frequency domain useful signal S1(omega) and a second frequency domain noise signal N2Sum of (ω), i.e. F12(ω)＝S1(ω)+N2(ω)；
The fourth frequency domain digital signal F21(ω) is the second frequency domain useful signal S2(omega) and a first frequency domain noise signal N1Sum of (ω), i.e. F21(ω)＝S2(ω)+N1(ω)；
Wherein the frequency domain useful signal S (ω) is a value of the useful signal S in the frequency domain, and the frequency domain noise signal N (ω) is a value of the system noise N in the frequency domain.
In one embodiment of the present invention, when the array length N is 2a3b5c7d11e13fFor said first integrated digital signal sequence DA(tn) and a second integrated digital signal sequence DB(tn) instead of the DFT, a more efficient Fast Fourier Transform (FFT) is performed. As can be seen from the fourier transform, each point in the frequency domain includes the signal characteristics in all time domains at that frequency value.
S5, the first frequency domain useful signal S is solved in the frequency domain1(omega) and a second frequency domain useful signal S2(ω)。
The formula can be used for separating system noise from a useful signal, and the frequency domain contains signal characteristics in all time domains, so that compared with the traditional denoising technology, the method is not influenced by the difference of noise at different time points, and can eliminate the noise in all time periods.
S6, for the first frequency domain useful signal S1(omega) and a second frequency domain useful signal S2(omega) performing inverse Fourier transform to obtain a first useful signal s in time domain1And a time domain second useful signal s2。
In one embodiment of the invention, the time domain digital signal sDI.e. the useful signal after complete removal of the system noise.
In another embodiment of the present invention, when there are m original analog signals, the first original analog signal x is included1And a second original analog signal x2… … and mth original analog signal xmThe method for eliminating the noise comprises the following steps:
s1, connecting the first original analog signal x1And a first detection circuit for outputting the integrated analog signal y11(ii) a Connecting the second original analog signal x2And a second detection circuit for outputting the integrated analog signal y22… …, respectively; concatenating the mth original analog signal xmAnd an m-th detection circuit for maintaining the connectionAnd the state delta t time.
The integrated analog signal y is the sum of the useful signal s and the system noise n, i.e. y ═ s + n.
The raw analog signal x is derived from a signal source output, such as a direct output of signals collected by various sensors.
The comprehensive analog signal y obtained after the original analog signal x is processed by the detection circuit comprises a useful signal s and a noise signal n, wherein the useful signal s is formed after the original analog signal x is subjected to signal detection processing, and the system noise n is generated in the process of signal detection processing. The signal detection processing process comprises operations of amplification, filtering and the like.
S2, switching connection relation and connecting the first original analog signal x1And an m-th detection circuit for outputting the integrated analog signal y1m(ii) a Connecting the second original analog signal x2And a first detection circuit for outputting the integrated analog signal y21… …, respectively; concatenating the mth original analog signal xmAnd (m-1) th detection circuit for outputting the integrated analog signal ym(m-1)The connection state is maintained for a time Δ t.
And repeatedly switching the connection relation for 2N times to obtain N groups of comprehensive analog signals y.
S3, for the integrated analog signal y11Sampling for N times to obtain a comprehensive digital signal D11Simultaneously for the integrated analog signal y22Sampling for N times to obtain a comprehensive digital signal D22… … pairs of synthetic analog signals ymmSampling for N times to obtain a comprehensive digital signal DmmThen, for the integrated analog signal y1mSampling for N times to obtain a comprehensive digital signal sequence D1m(ii) a For the integrated analog signal y21Sampling for N times to obtain a comprehensive digital signal sequence D21… … pairs of integrated analog signals ym(m-1)Sampling for N times to obtain a comprehensive digital signal sequence Dm(m-1)。
In one embodiment of the invention, the integrated analog signal y is summed1mSampling is carried out once every 2 delta t time, and then y can be realized1mIs carried out N timesAnd (6) sampling. For the same reason, for the integrated analog signal y21… … Synthesis of the analog Signal ym(m-1)The N samples are also taken every 2 at times.
S4, respectively aligning the integrated digital signal sequences D11、D22……、Dmm、D1m、D21……、Dm(m-1)Performing Discrete Fourier Transform (DFT) to obtain frequency domain digital signal F11(ω)、F22(ω)……Fmm(ω)、F1m(ω)、F21(ω)……Fm(m-1)(ω)。
The second frequency domain digital signal F (ω) is a sum of the frequency domain useful signal S (ω) and the frequency domain noise signal N (ω), i.e., F (ω) ═ S (ω) + N (ω).
S5, the first frequency domain useful signal S is solved in the frequency domain1(omega) useful signal S in the second frequency domain2(omega) … … and the m-th frequency domain useful signal S2(ω)。
S6, for the first frequency domain useful signal S1(omega) useful signal S in the second frequency domain2(omega) … … and the m-th frequency domain useful signal S2(omega) performing inverse Fourier transform to obtain a first useful signal s in time domain1Time domain second useful signal s2… … and the m-th useful signal s in the time domainm。
In another embodiment, when the number of the original analog signals is only 1, the method for eliminating the system noise comprises the following steps:
s1, converting the original analog signal x into a comprehensive analog signal xsSaid integrated analog signal xsFormed by alternately switching the output of an original analog signal x and an inverted signal-x of equal time length.
The inverse signal-x is formed by inverting the original analog signal x, the amplitude of the inverse signal-x is opposite to that of the original analog signal x, and the frequency and the phase are the same.
In one embodiment of the invention, said integrated analog signal x is composedsThe time for alternately outputting the original analog signal x and the inverted signal-x is equal and is delta t. For example, output Δ t firstThe original analog signal x of the time length is output, and then the inverted signal-x of the time length delta t is output, and the operation is performed alternately. In an embodiment of the present invention, the time Δ t of the alternate switching output is 0.625 milliseconds (output frequency 1600Hz), and when a signal with an interest frequency band within 200Hz is collected, both the degree of recovering the original signal and the hardware power consumption can be considered, and in a general application, the frequency of the alternate switching output data is preferably 8 times of the highest frequency of the interest frequency band, so that frequency aliasing can be reduced, the original signal can be recovered well, and the hardware power consumption is sacrificed.
S2, synthesizing the analog signal xsAn input detection circuit to obtain an analog output signal y, the analog output signal y comprising:
first analog output signal yASaid first analog output signal yAIs the sum of the useful signal s and the system noise n, i.e. yA＝s+n；
Second analog output signal yBSaid second analog output signal yBIs the sum of the inverted useful signal-s and the system noise n, i.e. yB＝-s+n
In one embodiment of the present invention, at time t1, the signal received by the detection circuit is the original analog signal x, and is output as the first analog output signal yAS + n; at time t2 after the time Δ t of the alternate output, the signal received by the detection circuit is an inverted signal-x, and the signal is output as a second analog output signal yB-s + n; at time t3 after the time Δ t of the alternate output, the signal received by the detection circuit is the original analog signal x again, and the signal is output as the first analog output signal yARepeating the above steps to obtain a first analog output signal yAAnd a second analog output signal yBThe resulting analog output signal y.
S3, sampling and performing analog-to-digital conversion on the analog output signal y, including:
for the first analog output signal yASampling N times to obtain a first comprehensive digital signal sequence DA(tn)；
For the second analog output signal yBSampling for N times to obtain a second comprehensive digital signal sequence DB(tn)。
As shown in fig. 4, in an embodiment of the present invention, during sampling, the analog output signal y in each of the time t of the alternate output is sampled once, and the specific sampling process is as follows:
at time t1, for the first analog output signal yA(t1) to obtain a first integrated digital signal D at time t1A(t1)；
At time t2 after time t of said alternating output, for the second analog output signal yB(t2) to obtain a second integrated digital signal D at time t2B(t2)；
Continuing at time t3 after time t of said alternating output for the first analog output signal yA(t3) to obtain a first integrated digital signal D at time t3A(t3)；
Continuing at time t4 after time t of said alternating output for a second analog output signal yB(t4) to obtain a second integrated digital signal D at time t4B(t4)；
The sampling is carried out for 2N times in an alternating and cyclic way to obtain a first comprehensive digital signal sequence D with the array length being NA(tn) and a second integrated digital signal sequence DB(tn)。
S4, respectively aligning the first integrated digital signal sequence DA(tn) and a second integrated digital signal sequence DB(tn) performing Discrete Fourier Transform (DFT) to obtain a first frequency domain digital signal FA(omega) and a second frequency domain digital signal FB(ω)。
Assuming that the sampling length is N, the first frequency domain digital signal
The first frequency domain digital signal FA(ω) is the sum of the frequency domain useful signal S (ω) and the frequency domain noise signal N (ω), i.e. FA(ω)＝S(ω)+N(ω)；
The second frequency domain digital signal FB(ω) is the sum of the inverted frequency domain useful signal S (ω) and the frequency domain noise signal N (ω), i.e. FB(ωω)＝-S(ω)+N(ω)；
Wherein the frequency domain useful signal S (ω) is a value of the useful signal S in the frequency domain, the inverted frequency domain useful signal-S (ω) is a value of the inverted useful signal-S in the frequency domain, and the frequency domain noise signal N (ω) is a value of the system noise N in the frequency domain.
And S5, solving the frequency domain useful signal S (omega) in the frequency domain.
In one embodiment of the present invention, the calculation formula is as follows,
S(ω)＝[FA(ω)-FB(ω)]/2
s6, carrying out inverse Fourier transform on the frequency domain useful signal S (omega) to obtain a time domain digital signal SD。
Need to be lowered
According to another aspect of the embodiments of the present invention, there is also provided a system for eliminating noise, including:
and the switching module 1 is used for switching the connection relation between the original analog signal x and the detection circuit 2.
The working mode of the switching module is alternately switched, after one point is acquired in the state 1 (the solid line connection state), the switching module is immediately switched to the state 2 (the dotted line connection state) to acquire one point, and then the switching module returns to the state 1 to continue acquisition, so that the alternating operation is repeated.
In the embodiment of the present invention with m original analog signals, when the switching frequency is 2, there are 2m equations; furthermore, when the switching frequency is p, pm equations exist, if the original analog signals are the sensor array at the same place, the input signals are correlated, and the average value can be calculated by solving an overdetermined equation set, so that not only can the system error be eliminated, but also the random error of a signal source can be further eliminated, and the noise level is reduced.
In the embodiment of the present invention having only one original analog signal, the switching module 1 includes an inverter and a switch set, wherein the switch set is used for selecting a path, one path is provided with the inverter, the original analog signal x passes through the inverter and then outputs an inverted signal-x, and the other path directly outputs the original analog signal x. Specifically, at time t1, the switch group gates a path without an inverter, and the inverting switching module 1 outputs an original analog signal x; after the time Δ t of the alternate output, the switch group is switched at time t2 to gate the path of the inverter, and the inverting switching module 1 outputs the inverting signal-x of the original analog signal x. In an embodiment of the present invention, the switch set may perform the path switching according to a control signal sent by the control module.
Since the inverter occupies hardware resources, increases system complexity, and brings about a certain circuit noise, in an embodiment of the present invention, in order to eliminate the noise brought by all circuit modules, the switch group must be directly connected to the output of the original analog input, and located in front of all other modules on the circuit structure. In order to reduce noise introduced by the inverter, the inverter is a CMOS inverter, and further, in order to reduce noise caused by signal switching, the switch group is a high-speed switch. In one embodiment of the invention, when the original analog signal s is a differential signal, the switch bank is a two-way switch, preferably a double pole double throw switch with less interference.
In another embodiment, the switching module is formed by a pulse generator, which is capable of generating forward pulses and reverse pulses with equal time intervals and determined amplitude, and multiplying the forward and reverse pulses with the original analog signal x to generate the original analog signal x and the reverse signal-x of the original analog signal x with equal time intervals. The pulse generator described in this embodiment is adopted to generate the inverted signal-x, so that noises such as surge current and spike voltage caused by the switch group can be avoided. Further, power consumption can be effectively reduced as compared with the case where the inverter and the switch group are used to generate the inverted signal-x.
And the detection circuit 2 is used for processing the original analog signal x to obtain a comprehensive analog output signal y.
Further, in the embodiment of the present invention having only one original analog signal, in order to eliminate the noise caused by the conventional signal detection circuit, the inverting switching module must be directly connected to the output of the original analog signal x, and located before the detection circuit 2 in the circuit structure. The detection circuit 2 may have any structure, and specifically, a person skilled in the art may design the detection circuit according to actual requirements. For example, in one embodiment of the invention, the detection circuit includes a basic preamplifier circuit and a filter circuit.
In the embodiment of the present invention where there is only one original analog signal, n represents the system noise introduced by the inverter and the detection circuit, and at time t1, the switch block turns on the non-inverter path, and the original analog signal x passes through the detection circuit and then outputs the first analog output signal yA(t 1); at time t2 after the time t of the alternate output, the switch group is connected with the passage of the inverter, and the inverted signal-x of the original analog signal x passes through the detection circuit and then outputs a second analog output signal yB(t 2); at time t3 after the same time t, the switch block turns on the inverter-less path, and the original analog signal x passes through the detection circuit and outputs the first analog output signal yA(t 3); at time t4 after the same time t, the switch group is connected with the passage of the inverter, and the original analog signal x passes through the detection circuit and then outputs a second analog output signal yB(t 4). Said yA(t1)、yB(t2)、yA(t3) and yB(t4) in turn enters the analog-to-digital conversion module 3. Preferably, the switching process is performed by continuously and alternately repeating the connection state under the control of the control module.
And the analog-to-digital conversion module 3 is used for sampling the comprehensive analog output signal y and performing analog-to-digital conversion.
The analog-to-digital conversion module 3 is realized by an analog-to-digital converter, and because the method of the invention can also eliminate the inherent noise of the analog-to-digital converter, compared with the high requirement of the analog-to-digital converter in the existing signal detection technology, the method of the invention can select the analog-to-digital converter with low power consumption, low cost and relatively poor noise level. On the other hand, the present invention cannot eliminate quantization errors generated during the analog-to-digital conversion process, and therefore, in order to improve the detection accuracy, the analog-to-digital converter is at least a 24-bit analog-to-digital converter, preferably 32 bits. Considering the above factors together, preferably, the analog-to-digital converter of the present invention is a low power consumption and high bit number sigma-delta analog-to-digital converter, and experiments prove that the power consumption can be effectively reduced under the condition of low noise level by using the sigma-delta analog-to-digital converter in the system for eliminating electronic noise of the present invention.
In order to be able to completely reconstruct the original signal, the sampling frequency of the analog-to-digital converter is greater than 2 times, preferably 4 times, the maximum frequency of the signal to be detected.
The operation module 4 comprises a fourier transform module 41, a calculation module 42 and an inverse fourier transform module 43, and is configured to perform operation on the integrated digital signal sequence d (tn) to obtain a time domain digital signal sD。
In an embodiment of the present invention, the operation mode of the operation module 4 is specifically as follows:
first, a Discrete Fourier Transform (DFT) is performed on the integrated digital signal sequence d (tn) by a fourier transform module 41 to obtain a frequency domain digital signal F (ω).
Secondly, the value S (ω) of the useful signal in the frequency domain is solved in the frequency domain by the computation module 42.
Finally, the inverse fourier transform module 43 performs inverse fourier transform on S (ω) to obtain a time domain digital signal SDSaid time domain digital signal sDI.e. the final output signal.
And the control module 5 is used for controlling the switching module 1 and the operation module 4.
Specifically, the control module 4 controls the switching operation of the switching module 1 by outputting a control signal.
Furthermore, the control module 5 can also set the operation parameters of the operation module 4, and those skilled in the art can design the parameters according to actual requirements.
In one embodiment of the present invention, the operation module 4 and the control module 5 are both implemented by a digital signal processing chip DSP.
Further, the method and system for eliminating noise further comprise a power module 6 for supplying power to other modules.
The power module has high precision and high stability, and preferably further comprises a filter circuit to further improve the accuracy of the output voltage.
According to the method and the system for eliminating the noise, the noise and the signal are isolated in the frequency domain, so that the noise elimination in the full time domain is realized, and the problem that the noise cannot be eliminated due to different amplitudes of the noise at different time points in the traditional noise reduction technology is solved.
The invention is suitable for all linear systems with signals and noises independent of each other, and is independent of the noise type of the system.
While preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all such alterations and modifications as fall within the scope of the invention.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.
Claims (10)
1. A method of canceling noise, comprising:
concatenating a first original analog signal x1And a first detection circuit outputting a first synthesisAnalog signal y11(ii) a Connecting the second original analog signal x2And a second detection circuit for outputting a second integrated analog signal y22Maintaining the connection state for a time Δ t;
the first integrated analog signal y11Is the first useful signal s1With first system noise n1Summing;
the second integrated analog signal y22Is the second useful signal s2And second system noise n2Summing;
switching the connection relation to connect the first original analog signal x1And a second detection circuit for outputting a third integrated analog signal y12(ii) a Connecting the second original analog signal x2And a first detection circuit for outputting a fourth integrated analog signal y21Maintaining the connection state for a time Δ t;
said third integrated analog signal y12Is the first useful signal s1And second system noise n2Summing;
said fourth integrated analog signal y21Is the second useful signal s2With first system noise n1Summing;
repeatedly switching the connection relation for 2N times to obtain N groups of comprehensive analog signals y in total, wherein the comprehensive analog signals y comprise first comprehensive analog signals y11A second integrated analog signal y22A third integrated analog signal y12And a fourth integrated analog signal y21；
For the first synthetic analog signal y11Sampling N times to obtain a first comprehensive digital signal sequence D11(ii) a For the second synthetic analog signal y22Sampling for N times to obtain a second comprehensive digital signal sequence D22(ii) a For the third integrated analog signal y12Sampling for N times to obtain a third comprehensive digital signal sequence D12(ii) a For the fourth synthetic analog signal y21Sampling for N times to obtain a fourth comprehensive digital signal sequence D21；
For the first integrated digital signal sequence D11Performing discrete Fourier transform to obtain a first frequency domain digital signal F11(ω); for the second integrated digital signal sequence D22Performing discrete Fourier transform to obtain a second frequency domain digital signal F22(ω); for the third integrated digital signal sequence D12Performing discrete Fourier transform to obtain a third frequency domain digital signal F12(ω); for the fourth integrated digital signal sequence D21Performing discrete Fourier transform to obtain a fourth frequency domain digital signal F21(ω)；
The first frequency domain digital signal F11(ω) is the first frequency domain useful signal S1(omega) and a first frequency domain noise signal N1(ω) sum; the second frequency domain digital signal F22(ω) is the second frequency domain useful signal S2(omega) and a second frequency domain noise signal N2(ω) sum; the third frequency domain digital signal F12(ω) is the first frequency domain useful signal S1(omega) and a second frequency domain noise signal N2(ω) sum; the fourth frequency domain digital signal F21(ω) is the second frequency domain useful signal S2(omega) and a first frequency domain noise signal N1(ω) sum;
the useful signal S of the first frequency domain is solved in the frequency domain1(omega) and a second frequency domain useful signal S2(ω)；
For the first frequency domain useful signal S1(omega) and a second frequency domain useful signal S2(omega) performing inverse Fourier transform to obtain a first useful signal s in time domain1And a time domain second useful signal s2。
2. The method of claim 1, wherein the first original analog signal x1And a second original analog signal x2From the signal source output.
3. The method of claim 1, further comprising summing the first sequence of synthesized digital signals D11A second integrated digital signal sequence D22A third integrated digital signal sequence D12And a fourth sequence of integrated digital signals D21And performing real-time storage.
4. The method of claim 1, further comprising summing the first sequence of synthesized digital signals D11A second integrated digital signal sequence D22A third integrated digital signal sequence D12And a fourth sequence of integrated digital signals D21A fast fourier transform is performed instead of a discrete fourier transform.
5. The method of claim 1, wherein the first original analog signal x1And a second original analog signal x2Are all single channel signals.
6. A system for canceling noise, comprising:
the switching module comprises inverters and a switch group, wherein the switch group is used for selecting paths, one path is provided with the inverter, the original analog signal outputs an inverted signal after passing through the inverter, and the other path directly outputs the original analog signal; the switching module is used for switching the connection state of the original analog signal and the detection circuit; the working mode of the switching module is alternative switching;
the detection circuit is used for processing the original analog signal to obtain a comprehensive analog output signal; the detection circuit is located in front of the switching module on the circuit structure;
the analog-to-digital conversion module is used for sampling the comprehensive analog output signal and performing analog-to-digital conversion to obtain a comprehensive digital signal sequence; the analog-to-digital conversion module is realized by a high-order sigma-delta type analog-to-digital converter; the sampling frequency of the sigma-delta type analog-to-digital converter is more than 2 times of the maximum frequency of the signal to be detected;
the operation module comprises a Fourier transform module, a calculation module and an inverse Fourier transform module and is used for operating the comprehensive digital signal sequence to obtain a time domain digital signal; firstly, performing discrete Fourier transform on the comprehensive digital signal sequence through a Fourier transform module to obtain a frequency domain digital signal; secondly, the value of the useful signal on the frequency domain is solved in the frequency domain through a calculation module; finally, performing inverse Fourier transform on the value through an inverse Fourier transform module to obtain a time domain digital signal, wherein the time domain digital signal is a final output signal;
the control module is used for controlling the switching module and the operation module, controlling the switching action of the switching module by outputting a control signal, and setting the operation parameters of the operation module;
a power module, the power module including a filter circuit.
7. The system of claim 6, further comprising a power module for providing power to other modules.
8. The system of claim 6, wherein the analog-to-digital conversion module is comprised of a sigma-delta type analog-to-digital converter.
9. A computer-readable storage medium, characterized in that the computer-readable storage medium has stored thereon a noise cancellation program which, when executed by a processor, implements the steps of the method of canceling noise of claim 1.
10. An electronic device comprising a memory and a processor, the memory having stored therein a noise cancellation program that when executed by the processor performs the steps of the method of canceling noise of claim 1.
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