CN111082763A - Driving circuit of infrared detector and infrared detector system - Google Patents
Driving circuit of infrared detector and infrared detector system Download PDFInfo
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- CN111082763A CN111082763A CN201911294085.8A CN201911294085A CN111082763A CN 111082763 A CN111082763 A CN 111082763A CN 201911294085 A CN201911294085 A CN 201911294085A CN 111082763 A CN111082763 A CN 111082763A
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- 238000006243 chemical reaction Methods 0.000 claims description 16
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- 238000003331 infrared imaging Methods 0.000 description 2
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
- G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
- G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
- G01J5/10—Radiation pyrometry, e.g. infrared or optical thermometry using electric radiation detectors
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/561—Voltage to current converters
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
- G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
- G01J2005/0077—Imaging
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
- G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
- G01J5/10—Radiation pyrometry, e.g. infrared or optical thermometry using electric radiation detectors
- G01J2005/106—Arrays
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- Photometry And Measurement Of Optical Pulse Characteristics (AREA)
Abstract
The invention discloses a drive circuit of an infrared detector and an infrared detector system, wherein the drive circuit comprises: the power supply circuit is used for supplying power to the chip of the driving circuit and supplying power to the reading circuit of the infrared detector; the bias voltage driving circuit is used for providing a driving bias voltage level for the infrared detector; and the signal conditioning circuit is used for carrying out differential output on the analog signal output by the infrared detector. The driving circuit of the invention completes the driving of the infrared detector and the preliminary conditioning of the analog signal.
Description
Technical Field
The invention relates to the technical field of circuit design, in particular to a driving circuit of an infrared detector and an infrared detector system.
Background
The infrared detector driving circuit is a bridge connecting the detector and the main signal processing board, and is used for providing power supply voltage and various biases for the infrared detector, enabling the detector to work normally, outputting infrared imaging signals, and introducing the infrared imaging signals into the main signal processing circuit to realize photoelectric signal reading and processing. Various bias voltages for normal operation of the infrared detector meet certain tolerance, variable range, bias noise, maximum current and the like. In addition, due to the limitation of the infrared detector and the process level, the infrared detector is very sensitive to various signals input from the outside, and the output signals are weak and easy to interfere.
Disclosure of Invention
The embodiment of the invention provides a driving circuit of an infrared detector and an infrared detector system, which are used for driving the infrared detector and primarily conditioning an analog signal.
In a first aspect, an embodiment of the present invention provides a driving circuit for an infrared detector, including:
the power supply circuit is used for supplying power to the chip of the driving circuit and supplying power to the reading circuit of the infrared detector;
the bias voltage driving circuit is used for providing a driving bias voltage level for the infrared detector;
and the signal conditioning circuit is used for carrying out differential output on the analog signal output by the infrared detector.
Optionally, the power circuit includes multiple low dropout regulators LDO connected in parallel;
the input ends of the multiple LDOs are connected to the VCC, and the output ends of the multiple LDOs are respectively used for supplying power to the chip of the driving circuit and the reading circuit of the infrared detector.
Optionally, the bias voltage driving circuit includes an analog bias circuit and a digital bias circuit;
the digital bias circuit is used for carrying out level conversion on a main signal sent by the FPGA so as to meet the driving level requirement of the infrared detector;
and the analog bias circuit is used for providing adjustable analog bias drive for the infrared detector.
Optionally, the digital bias circuit includes a level shifter circuit and an RC filter circuit, which are connected in sequence in multiple paths;
the level conversion circuit is used for carrying out level conversion on a main signal sent by the FPGA;
the RC filter circuit comprises a first-order RC low-pass filter, and the cut-off frequency of the first-order RC low-pass filter is determined according to the frequency multiplication of the main signal.
Optionally, the analog bias circuit includes: the first-stage operational amplifier circuit and the second-stage operational amplifier circuit;
the first-stage operational amplifier circuit comprises a first amplifier, wherein the non-inverting input end of the first amplifier is connected to a reference voltage, and the inverting input end of the first amplifier is connected to the output end of the first amplifier;
the second-stage operational amplifier circuit comprises a second amplifier and a third amplifier, wherein the output end of the first amplifier is connected to the non-inverting input ends of the second amplifier and the third amplifier through a sliding rheostat respectively, and the inverting input ends of the second amplifier and the third amplifier are connected to the output ends of the second amplifier and the third amplifier respectively;
the output terminals of the second and third amplifiers are used as the first and second output terminals of the analog bias circuit, respectively.
Optionally, the signal conditioning circuit includes: the output end of the reference circuit is respectively connected to the input ends of the multiple output circuits;
the reference circuit comprises a fourth amplifier, wherein the non-inverting input end of the fourth amplifier is connected to a reference voltage, the inverting input end of the fourth amplifier is connected to the output end of the fourth amplifier, and the output end of the fourth amplifier serves as a reference voltage end;
any one of the output circuits includes: a fifth amplifier and a sixth amplifier, wherein the non-inverting input terminal of the fifth amplifier is connected to the reference voltage terminal, the inverting input terminal of the fifth amplifier is connected to the output terminal of the fifth amplifier, and the inverting input terminal of the sixth amplifier is connected to the inverting input terminal of the fifth amplifier and the output terminal of the sixth amplifier;
and the same-direction input end of the sixth amplifier, the output end of the sixth amplifier and the output end of the fifth amplifier are respectively used as a first output end, a second output end and a third output end of the output circuit.
In a second aspect, an embodiment of the present invention provides an infrared detector system, which includes the foregoing driving circuit.
The embodiment of the invention completes the driving of the infrared detector and the preliminary conditioning of the analog signal through the power supply circuit, the bias voltage driving circuit and the signal conditioning circuit, and achieves positive technical effects.
The foregoing description is only an overview of the technical solutions of the present invention, and the embodiments of the present invention are described below in order to make the technical means of the present invention more clearly understood and to make the above and other objects, features, and advantages of the present invention more clearly understandable.
Drawings
Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the invention. Also, like reference numerals are used to refer to like parts throughout the drawings. In the drawings:
FIG. 1 is a schematic block diagram of a driving circuit according to a first embodiment of the present invention;
FIG. 2 is a block diagram of a power supply according to a first embodiment of the present invention;
FIG. 3 is a schematic block diagram of a digital bias voltage according to a first embodiment of the present invention;
FIG. 4 is a schematic block diagram of a first embodiment of the present invention;
fig. 5 is a schematic block diagram of analog signal conditioning according to a first embodiment of the present invention.
Detailed Description
Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
A first embodiment of the present invention provides a driving circuit of an infrared detector, including:
the power supply circuit is used for supplying power to the chip of the driving circuit and supplying power to the reading circuit of the infrared detector;
the bias voltage driving circuit is used for providing a driving bias voltage level for the infrared detector;
and the signal conditioning circuit is used for carrying out differential output on the analog signal output by the infrared detector.
The embodiment of the invention completes the driving of the infrared detector and the primary conditioning of the analog signal by improving the power supply circuit, the bias voltage driving circuit and the signal conditioning circuit.
Optionally, the power circuit includes multiple low dropout regulators LDO connected in parallel;
the input ends of the multiple LDOs are connected to the VCC, and the output ends of the multiple LDOs are respectively used for supplying power to the chip of the driving circuit and the reading circuit of the infrared detector.
Specifically, the present embodiment provides a design scheme of a power supply circuit, including multiple low dropout regulators (LDOs) arranged in parallel, for example, in fig. 2, three power supplies are included, where input ends of the multiple LDOs are all connected to VCC, that is, the whole circuit is uniformly supplied with power by VCC, and a first-stage power supply adjustment is provided by the LDOs, as shown in fig. 2, a specific chip selection scheme may be determined as needed, in this embodiment, a super chip may be selected, for example, LT3055 may be selected for a scheme of supplying power to a chip of a driving circuit, and a maximum output current 500mA satisfies 8-way operational amplifier and other chip supplies power; the scheme for providing power for the reading circuit in the detector can select two LT1761 paths, the maximum output current is 100mA, and the maximum noise in a given bandwidth is only 20 uV.
Optionally, the bias voltage driving circuit includes an analog bias circuit and a digital bias circuit;
the digital bias circuit is used for carrying out level conversion on a main signal sent by the FPGA so as to meet the driving level requirement of the infrared detector;
and the analog bias circuit is used for providing adjustable analog bias drive for the infrared detector.
Specifically, in this embodiment, the driving bias voltage of the infrared detector is divided into an analog bias circuit and a digital bias circuit, wherein:
the digital bias circuit is used for carrying out level conversion on the main signal sent by the FPGA so as to meet the driving level requirement of the infrared detector; the digital bias voltage is sent by the FPGA, and level conversion is carried out on the driving circuit by the voltage conversion chip to meet the driving level requirement of detection. And the analog bias circuit is used for providing adjustable analog bias drive for the infrared detector.
Optionally, the digital bias circuit includes a level shifter circuit and an RC filter circuit, which are connected in sequence in multiple paths;
the level conversion circuit is used for carrying out level conversion on a main signal sent by the FPGA;
the RC filter circuit comprises a first-order RC low-pass filter, and the cut-off frequency of the first-order RC low-pass filter is determined according to the frequency multiplication of the main signal.
Specifically, in this embodiment, as shown in fig. 3, the digital bias voltage is sent by the main signal processing board FPGA, the voltage conversion chip performs level conversion on the driving circuit to meet the driving level requirement of detection, and then RC filtering is performed, the filter circuit uses a first-order RC low-pass filter, the cutoff frequency f is designed to be ahmz, and for example, a may be twice the frequency of the digital signal Dig 1. As shown in fig. 1 and fig. 3, in this embodiment, the digital bias circuit may include multiple level shift circuits and RC filter circuits with the same circuit structure.
Optionally, the analog bias circuit includes: the first-stage operational amplifier circuit and the second-stage operational amplifier circuit;
the first-stage operational amplifier circuit comprises a first amplifier, wherein the non-inverting input end of the first amplifier is connected to a reference voltage, and the inverting input end of the first amplifier is connected to the output end of the first amplifier;
the second-stage operational amplifier circuit comprises a second amplifier and a third amplifier, wherein the output end of the first amplifier is connected to the non-inverting input ends of the second amplifier and the third amplifier through a sliding rheostat respectively, and the inverting input ends of the second amplifier and the third amplifier are connected to the output ends of the second amplifier and the third amplifier respectively;
the output terminals of the second and third amplifiers are used as the first and second output terminals of the analog bias circuit, respectively.
Specifically, as shown in fig. 4, the analog bias circuit satisfies the requirements of adjustable voltage, low noise and small driving current, and in this embodiment, the analog bias circuit includes a first stage operational amplifier circuit and a second stage operational amplifier circuit, and in this embodiment, a voltage reference chip ADR443 of ADI corporation can be used to provide a reference voltage eV, and the voltage stabilizing precision can reach ± 3 mV. The reference voltage is outputted and then voltage following is carried out by a first-stage operational amplifier circuit (U1) to increase the driving capability, wherein, as shown in FIG. 4, the first-stage operational amplifier circuit comprises a first amplifier U1, the non-inverting input end of the first amplifier U1 is connected to the reference voltage, and the inverting input end of the first amplifier U1 is connected to the output end of the first amplifier U1.
And then voltage regulation is carried out by second-stage operational amplifier circuits (U2, U3) respectively, a slide rheostat is arranged in front of input ends of the U2 operational amplifier and the U3 operational amplifier, the slide rheostat is matched with a voltage dividing resistor to regulate input voltage, specifically, the second-stage operational amplifier circuit comprises a second amplifier U2 and a third amplifier U3, an output end of the first amplifier U1 is connected to non-inverting input ends of the second amplifier U2 and the third amplifier U3 through the slide rheostat respectively, and inverting input ends of the second amplifier U2 and the third amplifier U3 are connected to output ends of the second amplifier U2 and the third amplifier U3 respectively.
Optionally, the signal conditioning circuit includes: the output end of the reference circuit is respectively connected to the input ends of the multiple output circuits;
the reference circuit comprises a fourth amplifier, wherein the non-inverting input end of the fourth amplifier is connected to a reference voltage, the inverting input end of the fourth amplifier is connected to the output end of the fourth amplifier, and the output end of the fourth amplifier serves as a reference voltage end;
any one of the output circuits includes: a fifth amplifier and a sixth amplifier, wherein the non-inverting input terminal of the fifth amplifier is connected to the reference voltage terminal, the inverting input terminal of the fifth amplifier is connected to the output terminal of the fifth amplifier, and the inverting input terminal of the sixth amplifier is connected to the inverting input terminal of the fifth amplifier and the output terminal of the sixth amplifier;
and the same-direction input end of the sixth amplifier, the output end of the sixth amplifier and the output end of the fifth amplifier are respectively used as a first output end, a second output end and a third output end of the output circuit.
Specifically, in the present embodiment, as shown in fig. 5, the reference circuit includes a fourth amplifier U4, the non-inverting input terminal of the fourth amplifier U4 is connected to the reference voltage, the inverting input terminal of the fourth amplifier U4 is connected to the output terminal of the fourth amplifier U4, and the output terminal of the fourth amplifier U4 serves as the reference voltage terminal.
The analog signals of the infrared detector have 8 output ends in total, are output at a single end, and have a dynamic range of mV-nV. Therefore, in the embodiment, the output circuit includes 8 paths of differential operational amplifier chips, as shown in fig. 5, the voltage reference chip provides a reference power supply, the 8 paths of single-end analog signals are converted into differential signals through the 8 paths of differential operational amplifier chips, respectively, and the center levels of the eight paths of differential analog signals after adjustment are adapted to the back-end analog-to-digital conversion chip.
As shown in fig. 5, the first output circuit includes: a fifth amplifier U411 and a sixth amplifier U412, the non-inverting input terminal of the fifth amplifier U411 being connected to the reference voltage terminal, the inverting input terminal of the fifth amplifier U411 being connected to the output terminal of the fifth amplifier U411, the non-inverting input terminal of the sixth amplifier U412 being connected to the inverting input terminal of the fifth amplifier U411 and the output terminal of the sixth amplifier U412;
the inverting input terminal of the sixth amplifier U412, the output terminal of the sixth amplifier U412 and the output terminal of the fifth amplifier U411 are respectively used as the first, second and third output terminals of the output circuit, as shown in fig. 5 as OUT1, OUT1+ and OUT1-, and as shown in fig. 5, 8-way connections with 8-way single-end analog signals can be realized by using 8-way circuits with the same output circuit structure.
For example, the analog bias voltages required by an infrared detector in this embodiment are shown in table 1:
TABLE 1 various analog bias voltages for detectors
The digital bias voltages are shown in table 2:
TABLE 2 various types of digital bias for detectors
The infrared detector driving circuit needs to provide power and various bias signals for the detector on one hand, and needs to carry out signal conditioning on analog signals on the other hand, and a circuit scheme and chip type selection need to be designed reasonably. In addition, the circuit design needs to consider high interference resistance, and the interference suffered by the signal in the transmission process is reduced as much as possible.
The technical scheme of the invention ensures the power supply of various chips by adopting a two-stage LDO power supply adjustment mode; a detector bias power supply with good signal-to-noise ratio is provided; the power supply efficiency is improved; the using quantity and the cost of the chips are saved. The conditioning method of the analog signal provided by this embodiment increases the driving capability of the analog signal transmission; the stability and the anti-interference capability of signals are provided; the dynamic output of the analog signal is utilized to the maximum extent, and a convenient condition is provided for the analog-digital conversion at the rear end.
A second embodiment of the present invention provides an infrared detector system, which includes the aforementioned driving circuit.
The driving board of the driving circuit in this embodiment is an analog-to-digital combining circuit, and includes a digital signal driving, an analog signal driving, and an analog signal adjusting section. The infrared detector is applied to a certain type of infrared detector and is connected with the infrared detector and the main signal processing circuit.
The driving circuit is applied to a certain type of infrared focal plane detector to complete the driving of the detector and the primary conditioning of an analog signal.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments.
While the present invention has been described with reference to the embodiments shown in the drawings, the present invention is not limited to the embodiments, which are illustrative and not restrictive, and it will be apparent to those skilled in the art that various changes and modifications can be made therein without departing from the spirit and scope of the invention as defined in the appended claims.
Claims (7)
1. A driving circuit of an infrared detector, comprising:
the power supply circuit is used for supplying power to the chip of the driving circuit and supplying power to the reading circuit of the infrared detector;
the bias voltage driving circuit is used for providing a driving bias voltage level for the infrared detector;
and the signal conditioning circuit is used for carrying out differential output on the analog signal output by the infrared detector.
2. The driving circuit of claim 1, wherein the power circuit comprises a plurality of low dropout regulators (LDOs) arranged in parallel;
the input ends of the multiple LDOs are connected to the VCC, and the output ends of the multiple LDOs are respectively used for supplying power to the chip of the driving circuit and the reading circuit of the infrared detector.
3. The driving circuit of the infrared detector as set forth in claim 1, wherein the bias voltage driving circuit includes an analog bias circuit and a digital bias circuit;
the digital bias circuit is used for carrying out level conversion on a main signal sent by the FPGA so as to meet the driving level requirement of the infrared detector;
and the analog bias circuit is used for providing adjustable analog bias drive for the infrared detector.
4. The driving circuit of claim 3, wherein the digital bias circuit comprises a plurality of level shifter circuits and an RC filter circuit connected in sequence;
the level conversion circuit is used for carrying out level conversion on a main signal sent by the FPGA;
the RC filter circuit comprises a first-order RC low-pass filter, and the cut-off frequency of the first-order RC low-pass filter is determined according to the frequency multiplication of the main signal.
5. The driving circuit of an infrared detector as set forth in claim 3, wherein said analog bias circuit comprises: the first-stage operational amplifier circuit and the second-stage operational amplifier circuit;
the first-stage operational amplifier circuit comprises a first amplifier, wherein the non-inverting input end of the first amplifier is connected to a reference voltage, and the inverting input end of the first amplifier is connected to the output end of the first amplifier;
the second-stage operational amplifier circuit comprises a second amplifier and a third amplifier, wherein the output end of the first amplifier is connected to the non-inverting input ends of the second amplifier and the third amplifier through a sliding rheostat respectively, and the inverting input ends of the second amplifier and the third amplifier are connected to the output ends of the second amplifier and the third amplifier respectively;
the output terminals of the second and third amplifiers are used as the first and second output terminals of the analog bias circuit, respectively.
6. The infrared detector driving circuit according to claim 1, wherein the signal conditioning circuit comprises: the output end of the reference circuit is respectively connected to the input ends of the multiple output circuits;
the reference circuit comprises a fourth amplifier, wherein the non-inverting input end of the fourth amplifier is connected to a reference voltage, the inverting input end of the fourth amplifier is connected to the output end of the fourth amplifier, and the output end of the fourth amplifier serves as a reference voltage end;
any one of the output circuits includes: a fifth amplifier and a sixth amplifier, wherein the non-inverting input terminal of the fifth amplifier is connected to the reference voltage terminal, the inverting input terminal of the fifth amplifier is connected to the output terminal of the fifth amplifier, and the inverting input terminal of the sixth amplifier is connected to the inverting input terminal of the fifth amplifier and the output terminal of the sixth amplifier;
and the same-direction input end of the sixth amplifier, the output end of the sixth amplifier and the output end of the fifth amplifier are respectively used as a first output end, a second output end and a third output end of the output circuit.
7. An infrared detector system, characterized in that it comprises a drive circuit according to any one of claims 1-6.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201911294085.8A CN111082763A (en) | 2019-12-16 | 2019-12-16 | Driving circuit of infrared detector and infrared detector system |
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| CN201911294085.8A CN111082763A (en) | 2019-12-16 | 2019-12-16 | Driving circuit of infrared detector and infrared detector system |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112787668A (en) * | 2020-12-28 | 2021-05-11 | 中国科学院长春光学精密机械与物理研究所 | Medium wave infrared detector imaging driving device |
| CN112782555A (en) * | 2020-12-09 | 2021-05-11 | 中国电子科技集团公司第十一研究所 | Circuit board and device for wafer test of digital infrared detector reading circuit |
| CN113720364A (en) * | 2021-08-11 | 2021-11-30 | 北京波谱华光科技有限公司 | Infrared analog signal conditioning and collecting circuit |
| CN113972811A (en) * | 2020-07-23 | 2022-01-25 | 中国电子科技集团公司第二十四研究所 | Infrared bias power module based on integrated plastic package |
-
2019
- 2019-12-16 CN CN201911294085.8A patent/CN111082763A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113972811A (en) * | 2020-07-23 | 2022-01-25 | 中国电子科技集团公司第二十四研究所 | Infrared bias power module based on integrated plastic package |
| CN113972811B (en) * | 2020-07-23 | 2023-09-22 | 中国电子科技集团公司第二十四研究所 | Infrared bias power supply module based on integrated plastic package |
| CN112782555A (en) * | 2020-12-09 | 2021-05-11 | 中国电子科技集团公司第十一研究所 | Circuit board and device for wafer test of digital infrared detector reading circuit |
| CN112787668A (en) * | 2020-12-28 | 2021-05-11 | 中国科学院长春光学精密机械与物理研究所 | Medium wave infrared detector imaging driving device |
| CN113720364A (en) * | 2021-08-11 | 2021-11-30 | 北京波谱华光科技有限公司 | Infrared analog signal conditioning and collecting circuit |
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