CN111081680B - Wafer and manufacturing method thereof - Google Patents
Wafer and manufacturing method thereof Download PDFInfo
- Publication number
- CN111081680B CN111081680B CN201911216929.7A CN201911216929A CN111081680B CN 111081680 B CN111081680 B CN 111081680B CN 201911216929 A CN201911216929 A CN 201911216929A CN 111081680 B CN111081680 B CN 111081680B
- Authority
- CN
- China
- Prior art keywords
- layer
- wafer
- light
- electrode
- emitting element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 12
- 239000000758 substrate Substances 0.000 claims abstract description 51
- 238000000034 method Methods 0.000 claims description 27
- 238000003892 spreading Methods 0.000 claims description 26
- 230000007480 spreading Effects 0.000 claims description 26
- 230000000903 blocking effect Effects 0.000 claims description 19
- 230000008569 process Effects 0.000 claims description 17
- 238000000151 deposition Methods 0.000 claims description 15
- 239000003550 marker Substances 0.000 claims description 13
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 12
- 239000000377 silicon dioxide Substances 0.000 claims description 6
- 235000012239 silicon dioxide Nutrition 0.000 claims description 5
- 229910052751 metal Inorganic materials 0.000 claims description 4
- 239000002184 metal Substances 0.000 claims description 4
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 claims description 3
- 229910052804 chromium Inorganic materials 0.000 claims description 3
- 239000011651 chromium Substances 0.000 claims description 3
- 229910052755 nonmetal Inorganic materials 0.000 claims description 3
- 238000000059 patterning Methods 0.000 claims description 3
- 230000008719 thickening Effects 0.000 claims description 2
- 238000001259 photo etching Methods 0.000 claims 2
- 240000007594 Oryza sativa Species 0.000 claims 1
- 235000007164 Oryza sativa Nutrition 0.000 claims 1
- 230000004888 barrier function Effects 0.000 claims 1
- 235000009566 rice Nutrition 0.000 claims 1
- 239000004065 semiconductor Substances 0.000 abstract description 16
- 239000000919 ceramic Substances 0.000 description 17
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 8
- 238000004018 waxing Methods 0.000 description 5
- 239000000463 material Substances 0.000 description 4
- 239000011787 zinc oxide Substances 0.000 description 4
- 238000000206 photolithography Methods 0.000 description 3
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 2
- 229910052733 gallium Inorganic materials 0.000 description 2
- 238000000227 grinding Methods 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 229910052594 sapphire Inorganic materials 0.000 description 2
- 239000010980 sapphire Substances 0.000 description 2
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 2
- 229910010271 silicon carbide Inorganic materials 0.000 description 2
- 229910017083 AlN Inorganic materials 0.000 description 1
- 229910002601 GaN Inorganic materials 0.000 description 1
- 229910005540 GaP Inorganic materials 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 239000007771 core particle Substances 0.000 description 1
- 229910052593 corundum Inorganic materials 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 238000001125 extrusion Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 150000004820 halides Chemical class 0.000 description 1
- 229910003437 indium oxide Inorganic materials 0.000 description 1
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- HRHKULZDDYWVBE-UHFFFAOYSA-N indium;oxozinc;tin Chemical compound [In].[Sn].[Zn]=O HRHKULZDDYWVBE-UHFFFAOYSA-N 0.000 description 1
- 238000007733 ion plating Methods 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 229910003465 moissanite Inorganic materials 0.000 description 1
- 238000001451 molecular beam epitaxy Methods 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- KYKLWYKWCAYAJY-UHFFFAOYSA-N oxotin;zinc Chemical compound [Zn].[Sn]=O KYKLWYKWCAYAJY-UHFFFAOYSA-N 0.000 description 1
- 238000005240 physical vapour deposition Methods 0.000 description 1
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000007517 polishing process Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 1
- 229910001887 tin oxide Inorganic materials 0.000 description 1
- 238000007738 vacuum evaporation Methods 0.000 description 1
- 238000000927 vapour-phase epitaxy Methods 0.000 description 1
- 229910001845 yogo sapphire Inorganic materials 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
- 239000011701 zinc Substances 0.000 description 1
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
- H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
- H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/54426—Marks applied to semiconductor devices or parts for alignment
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Led Devices (AREA)
Abstract
The invention belongs to the field of semiconductors, and particularly relates to a wafer and a manufacturing method thereof, wherein the wafer comprises: a substrate having opposing first and second surfaces; a light emitting element on the first surface of the substrate; the marking elements are positioned on the first surface of the substrate, connected with the light-emitting elements through the substrate and distributed at intervals; wherein the thickness of the marking element is larger than that of the light emitting element. When pressure is applied to the second surface of the substrate, the marking element is used for supporting the light-emitting element and preventing the light-emitting element from being damaged.
Description
Technical Field
The invention belongs to the field of semiconductors, and particularly relates to a wafer with a marking element thickness larger than that of a light-emitting element, and a manufacturing method thereof.
Background
In the method for preparing the light emitting diode in the prior art, when the rear-end grinding process of the chip is carried out, because a substrate is thinned, a wafer needs to be fixed on a ceramic substrate after being pressurized and cooled by using melting bonding wax. Because the gold electrode is soft and easy to deform and the surface of the ceramic substrate has larger roughness (Ra is generally 50-400 nm), direct pressurization stress exists between the chip and the ceramic substrate, and although a melting wax bonding buffer layer is filled between the chip and the ceramic substrate, the core particle P Pad/P-Finger electrode in a partial area is completely and directly contacted with the ceramic substrate without wax buffer, so that the P Pad/P-Finger electrode generates a crushing phenomenon.
Disclosure of Invention
The invention aims to solve the technical problem that the electrode of a wafer is easily crushed in the waxing process in the prior art, and in order to solve the technical problem, the wafer designed by the invention comprises a marking element for positioning and aligning and a light-emitting element for emitting light, wherein the thickness of the marking element is larger than that of the light-emitting element, and in the waxing process of the wafer, the marking element plays a role in supporting, so that a certain gap exists between the light-emitting element and a waxing ceramic disc, and the electrode of the light-emitting element is prevented from being crushed. The specific technical scheme is as follows:
in a first aspect of the present invention, there is provided a wafer comprising:
a substrate having opposing first and second surfaces;
a light emitting element on the first surface of the substrate;
the marking elements are positioned on the first surface of the substrate, connected with the light-emitting elements through the substrate and distributed at intervals;
the method is characterized in that: the marking element has a thickness greater than that of the light emitting element, and is used for supporting the light emitting element when pressure is applied to the second surface of the substrate, thereby preventing the light emitting element from being damaged.
Preferably, the wafer is placed on the surface of the carrier plate in an inverted manner, when pressure is applied to the second surface of the substrate by the pressurizing device, a gap is formed between the light-emitting element and the carrier plate, and the marking element is used for supporting the light-emitting element and preventing the carrier plate from damaging the light-emitting element.
Preferably, the light emitting element includes a first epitaxial layer and a first electrode, and the marker element includes a second epitaxial layer and a second electrode. Further, the marker element has a thickened dielectric layer between the second epitaxial layer and the second electrode, the thickened dielectric layer making the marker element thicker than the light emitting element.
Preferably, the light emitting element includes a first epitaxial layer, a first current spreading layer, and a first electrode that are sequentially stacked, and the marker element includes a second epitaxial layer, a second current spreading layer, and a second electrode that are sequentially stacked. Further, the marker element has a thickened dielectric layer between the second epitaxial layer and the second current spreading layer or the second current spreading layer and the second electrode, the thickened dielectric layer making the marker element thicker than the light emitting element.
Preferably, the light emitting element includes a first epitaxial layer, a first current blocking layer, a first current spreading layer, and a first electrode, which are sequentially stacked, and the marker element includes a second epitaxial layer, a second current blocking layer, a second current spreading layer, and a second electrode, which are sequentially stacked. Further, the marking element is provided with a thickened medium layer which is positioned between the second epitaxial layer and the second current blocking layer or between the second current blocking layer and the second current spreading layer or between the second current spreading layer and the second electrode, and the thickened medium layer enables the thickness of the marking element to be larger than that of the light-emitting element.
Preferably, the first epitaxial layer and the second epitaxial layer have the same or different appearance shapes.
Preferably, the first epitaxial layer has an L-shaped appearance with steps, and the second epitaxial layer has a cross-shaped appearance or a m-shaped appearance, so that the marking element is used for alignment and positioning in a wafer lithography process.
Preferably, the first electrode comprises a first P electrode and a first N electrode, and the first N electrode is located on the step surface; the second electrode is the same as the first P electrode.
Preferably, the thickened dielectric layer comprises a metal dielectric layer or a nonmetal dielectric layer. Further, the thickened medium layer is a silicon dioxide layer or a chromium layer.
Preferably, the thickness of the thickened dielectric layer is 1500-25000 angstroms.
Preferably, the marking elements are uniformly distributed among the light emitting elements in an interpenetration manner.
Preferably, the marker elements are distributed among the light emitting elements in a shape of a Chinese character 'mi' or a 'tian'.
Preferably, the marking element is used for alignment positioning in a photolithography process.
In a second aspect of the present invention, there is provided a method for manufacturing the above wafer, comprising the steps of:
step 1, providing a substrate, wherein the substrate is provided with a first surface and a second surface which are opposite, growing an epitaxial layer on the first surface of the substrate, patterning the epitaxial layer, and forming a plurality of first epitaxial layers and second epitaxial layers which are distributed at intervals;
step 2, depositing a thickened dielectric layer on the surface of the second epitaxial layer;
and 3, depositing a first electrode on the surface of the first epitaxial layer to form a light-emitting element, depositing a second electrode on the surface of the thickened medium layer to form a marking element, wherein the thickness of the marking element is greater than that of the light-emitting element, and when pressure is applied to the second surface of the substrate, the marking element is used for supporting the light-emitting element and preventing the light-emitting element from being damaged.
Preferably, the wafer is placed on the surface of the carrier plate in an inverted manner, when pressure is applied to the second surface of the substrate by the pressurizing device, a gap is formed between the light-emitting element and the carrier plate, and the marking element is used for supporting the light-emitting element and preventing the carrier plate from damaging the light-emitting element.
Preferably, a step of depositing a current spreading layer on the surface of the first epitaxial layer and the surface of the thickened dielectric layer is further included between the steps 2 and 3.
Preferably, the method further comprises the step of depositing a current blocking layer between the first epitaxial layer and the current spreading layer and between the thickened dielectric layer and the current spreading layer.
The thickness of a marking element used for marking and positioning on a wafer in the prior art is thickened, and specifically, the thickness of the marking element is larger than that of a conventional light-emitting element by arranging a thickened dielectric layer, so that the wafer is placed upside down on a ceramic disc in a waxing process, the marking element plays a supporting role, an electrode of the light-emitting element is not in contact with the ceramic disc, and the ceramic disc is prevented from being crushed.
Drawings
FIG. 1 is a schematic top view of a wafer according to the present invention.
FIG. 2 is a schematic cross-sectional view of a light emitting device and a marking device according to the present invention.
FIG. 3 is a schematic cross-sectional view of a wax-like light emitting element and a marking element according to the present invention.
Detailed Description
The invention is described in more detail in the following paragraphs by way of example with reference to the accompanying drawings. Advantages and features of the present invention will become apparent from the following description and from the claims. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.
Referring to fig. 1 and 2, in a first aspect of the present invention, there is provided a wafer comprising: a substrate 10 having opposing first and second surfaces; a light emitting element 20 on a first surface of the substrate 10; the marking elements 30 are positioned on the first surface of the substrate 10, connected with the light-emitting elements 20 through the substrate 10 and distributed at intervals; wherein the marking element 30 has a thickness greater than that of the light emitting element 20, and when pressure is applied to the second surface of the substrate 10, the marking element 30 serves to support the light emitting element 20, preventing the light emitting element 20 from being damaged.
The marking elements 30 are uniformly inserted and distributed between the light emitting elements 20, and the distribution between the light emitting elements 20 is in a shape of a Chinese character 'mi' or a 'tian' shape. The number of the light-emitting elements can be set according to the number of the light-emitting elements 20 in the wafer, and is generally not less than 20.
Wherein, the material of the substrate 10 can be selected from Al2O3Any one or combination of more of SiC, GaAs, GaN, AlN, GaP, Si, ZnO and MnO. In this embodiment, the sapphire substrate 10 (sapphire substrate) is taken as an example, and the lattice direction may be (0001), but the invention is not limited to the material and lattice direction of the substrate 10. The substrate 10 may also be patterned to change the propagation path of light, thereby improving the light extraction efficiency of the light emitting device 20.
The light emitting element 20 includes a first epitaxial layer 21 and a first electrode 22, and the marking element 30 includes a second epitaxial layer 31 and a second electrode 32.
Each of the first epitaxial layer 21 and the second epitaxial layer 31 further includes N- type semiconductor layers 211, 311, light emitting layers 212, 312, and P- type semiconductor layers 213, 313. The N- type semiconductor layers 211 and 311 are N-type doped semiconductor layers, and the P- type semiconductor layers 213 and 313 are P-type doped semiconductor layers. The n-type doped impurity type may be Si, Ge, or Sn, and the p-type doped impurity type may be Mg, Zn, Ca, Sr, or Ba, without excluding other equivalent element-substituted doping. The N- type semiconductor layer 211, 311, the light emitting layer 212, 312, and the P- type semiconductor layer 213, 313 may each be a multi-layered compound semiconductor layer structure, in which the light emitting layer 212, 312 may be a single quantum well structure or a multiple quantum well structure. Electrons supplied from the N- type semiconductor layers 211 and 311 and holes supplied from the P- type semiconductor layers 213 and 313 are recombined in the light emitting layers 212 and 312 to emit light.
The method for producing the first epitaxial layer 21 and the second epitaxial layer 31 is not particularly limited, and examples thereof include Metal Organic Chemical Vapor Deposition (MOCVD), Molecular Beam Epitaxy (MBE), halide vapor phase epitaxy (HPVE), sputtering, ion plating, electron shower method, and the like. The present invention is fabricated on a substrate 1010 using a conventional MOCVD process.
The first epitaxial layer 21 and the second epitaxial layer 31 have the same or different shapes but the same thickness. The first electrode 22 and the second electrode 32 are the same or different and have the same thickness. Specifically, in order to make the marking element 30 function as an alignment positioning in the photolithography process, when the first epitaxial layer 21 and the second epitaxial layer 31 are the same, the first electrode 22 and the second electrode 32 are different; conversely, when the first epitaxial layer 21 and the second epitaxial layer 31 are different, the first electrode 22 and the second electrode 32 may be the same or different. The first epitaxial layer 21 may have a rectangular appearance, and the second epitaxial layer 31 may have a rectangular appearance, a cross shape, or a shape like a Chinese character 'mi', in this embodiment, it is preferable that the first epitaxial layer 21 has a rectangular appearance, and the second epitaxial layer 31 has a cross shape, so that the marking element 30 can be distinguished from the light emitting element 20 in appearance, and alignment and identification are facilitated. At this time, the first epitaxial layer 21 has an L-shaped cross section and has one step 25. Specifically, the P-type semiconductor layers 213 and 313 are etched to the N-type semiconductor layers 211 and 311 to form a step 25. The first electrode 22 includes a first P electrode 221 and a first N electrode 222, the first N electrode 222 is on the step 25 and electrically connected to the N-type semiconductor layers 211 and 311, the first P electrode 221 is located on the surface of the first epitaxial layer 21, and a current can be formed between the first P electrode 221 and the first N electrode 222. Meanwhile, the second electrode 32 is the same as the first P electrode 221, and since the second epitaxial layer 31 has a different appearance from the first epitaxial layer 21, the marking element can perform the function of alignment positioning only by making the electrode the same as the first P electrode 221.
In the invention, the thickened dielectric layer 35 is arranged between the second epitaxial layer 31 and the second electrode 32, and the thicknesses of the first epitaxial layer 21 and the second epitaxial layer 31 are the same, and the thicknesses of the first electrode 22 and the second electrode 32 are the same, so that the thickness difference between the light-emitting element 20 and the marking element 30 is the thickness of the thickened dielectric layer 35.
In this embodiment, the first current blocking layer 23, the second current blocking layer 33, the first current spreading layer 24, and the second current spreading layer 34 are further stacked on the surfaces of the first epitaxial layer 21 and the second epitaxial layer 31, respectively, and the thickened dielectric layer 35 is located between the second epitaxial layer 31 and the second current blocking layer 33, but in other embodiments, the thickened dielectric layer 35 may also be located between the second current blocking layer 33 and the second current spreading layer 34, or between the second current spreading layer 34 and the second electrode, which is not particularly limited in the present invention.
The first and second current blocking layers 23 and 33 may be made of one or a combination of aluminum oxide, silicon dioxide, silicon nitride, and silicon carbide. Silica is preferred in this embodiment. The first and second current spreading layers 24 and 34 may be made of one or a combination of several materials selected from a zinc oxide layer, a zinc indium tin oxide layer, an indium zinc oxide layer, a zinc tin oxide layer, a gallium indium oxide layer, a gallium zinc oxide layer, an aluminum-doped zinc oxide layer, and a fluorine-doped tin oxide layer. In this embodiment, an indium tin oxide layer is preferable.
The first current blocking layer 23 and the second current blocking layer 33 have the same thickness, and the first current spreading layer 24 and the second current spreading layer 34 have the same thickness. Therefore, the difference in thickness between the light emitting element 20 and the marker element 30 remains the thickness of the thickened dielectric layer 35.
The first current blocking layer 23 and the first current spreading layer 24 may be provided with openings so that the first P-electrode 221 is inserted into the openings, thereby enhancing the robustness of the first P-electrode 221. In order to simplify the process, the second current blocking layer 33 and the second current spreading layer 34 may be provided without opening, and both may have a layered structure.
Referring to fig. 3, the marker elements 30 may be used for exposure alignment positioning in a preceding process of the LED, such as a photolithography process. Since the substrate 10 has a relatively thick thickness, it is not beneficial to separate the light emitting element 20 into independent crystal grains through a scribing process, and therefore, the substrate 10 needs to be thinned by a thinning process such as grinding. In order to prevent the wafer from moving during the polishing process, the wafer is first fixed on the surface of the carrier 40 by a die bonding process. For example, the front surface of the wafer is attached to the surface of the ceramic disk 40 with melted wax, and a certain pressure is applied from the back surface of the substrate 10 with the pressurizing device 50.
In the present invention, since thickened dielectric layer 35 is additionally provided, when a pressurizing device applies pressure to the back surface of substrate 10, mark element 30 plays a supporting role, second electrode 32 of mark element 30 contacts ceramic disk 40, and first P electrode 221 of light-emitting element 20 does not contact ceramic disk 40, thereby preventing ceramic disk 40 from crushing first P electrode 221.
The material of the thickened medium layer 35 is not particularly limited, and may be a metal medium layer or a nonmetal medium layer, for example, the thickened medium layer 35 is a silicon dioxide layer or a chromium layer. In this embodiment, the thickened dielectric layer 35 is preferably a silicon dioxide layer. The thickness of the thickened dielectric layer 35 needs to be larger than the maximum protrusion of the surface of the ceramic disk 40 in consideration of the roughness of the ceramic disk 40, and the thickness is preferably in the range of 1500-25000 angstroms in this embodiment.
The thickness of the marking element 30 used in the manufacturing process of the light-emitting element 20 is thickened by increasing the thickening medium layer 35, so that the thickness of the marking element is larger than that of the light-emitting element 20, and in the waxing process of the light-emitting element 20, a certain gap is formed between the light-emitting element 20 and the ceramic disc 40, so that damage caused by contact and extrusion of the light-emitting element 20 and the ceramic disc 40 is prevented.
Example 2
In order to fabricate the above-mentioned wafer, the present embodiment provides a fabrication method, which includes the following steps:
step 1, providing a substrate 10, wherein the substrate 10 has a first surface and a second surface which are opposite, growing an epitaxial layer on the first surface of the substrate 10, patterning the epitaxial layer, and forming a plurality of first epitaxial layers 21 and second epitaxial layers 31 which are distributed at intervals;
step 2, depositing a thickened dielectric layer 35 on the surface of the second epitaxial layer 31;
and 3, depositing a first electrode 22 on the surface of the first epitaxial layer 21 to form a light-emitting element 20, depositing a second electrode 32 on the surface of the thickened medium layer 35 to form a marking element 30, wherein the thickness of the marking element 30 is greater than that of the light-emitting element 20, and when pressure is applied to the second surface of the substrate 10, the marking element 30 is used for supporting the light-emitting element 20 and preventing the light-emitting element 20 from being damaged.
When the wafer is placed upside down on the surface of the carrier 40 and pressure is applied to the second surface of the substrate 10 by the pressurizing device, a gap is formed between the light-emitting element 20 and the carrier 40, and the marking element 30 is used for supporting the light-emitting element 20 and preventing the carrier 40 from damaging the light-emitting element 20.
The manufacturing method further comprises the steps of depositing the current expansion layers 24 and 34 on the surface of the first epitaxial layer 21 and the surface of the thickened dielectric layer 35; and a step of depositing a current blocking layer 33 between the first epitaxial layer 21 and the current spreading layer 24 and between the thickened dielectric layer 35 and the current spreading layer 34.
The thickened dielectric layer 35 can be formed by vacuum evaporation, PECVD, MOCVD, PVD, or chemical plating.
It should be understood that the above-mentioned embodiments are preferred examples of the present invention, and the scope of the present invention is not limited to these examples, and any modification made according to the present invention is within the scope of the present invention.
Claims (19)
1. A wafer, comprising:
a substrate having opposing first and second surfaces;
a light emitting element on the first surface of the substrate;
the marking elements are positioned on the first surface of the substrate, connected with the light-emitting elements through the substrate and distributed at intervals;
the method is characterized in that: the thickness of the marking element is larger than that of the light-emitting element, the wafer is inversely placed on the surface of the carrying disc, when pressure is applied to the second surface of the substrate through the pressurizing device, a gap is formed between the light-emitting element and the carrying disc, and the marking element is used for supporting the light-emitting element and preventing the carrying disc from damaging the light-emitting element.
2. A wafer as set forth in claim 1, wherein: the light emitting element includes a first epitaxial layer and a first electrode, and the marker element includes a second epitaxial layer and a second electrode.
3. A wafer as set forth in claim 2, wherein: the marker element has a thickened dielectric layer between the second epitaxial layer and the second electrode, the thickened dielectric layer providing the marker element with a thickness greater than the light emitting element.
4. A wafer as set forth in claim 1, wherein: the light-emitting element comprises a first epitaxial layer, a first current expansion layer and a first electrode which are sequentially stacked, and the marking element comprises a second epitaxial layer, a second current expansion layer and a second electrode which are sequentially stacked.
5. A wafer as set forth in claim 4, wherein: the marking element has a thickened dielectric layer between the second epitaxial layer and the second current spreading layer or between the second current spreading layer and the second electrode, the thickened dielectric layer making the marking element thicker than the light emitting element.
6. A wafer as set forth in claim 1, wherein: the light-emitting element comprises a first epitaxial layer, a first current blocking layer, a first current expansion layer and a first electrode which are sequentially stacked, and the marking element comprises a second epitaxial layer, a second current blocking layer, a second current expansion layer and a second electrode which are sequentially stacked.
7. A wafer as set forth in claim 6, wherein: the marking element is provided with a thickened medium layer positioned between the second epitaxial layer and the second current blocking layer or between the second current blocking layer and the second current spreading layer or between the second current spreading layer and the second electrode, and the thickened medium layer enables the thickness of the marking element to be larger than that of the light-emitting element.
8. A wafer according to claim 2 or 4 or 6, characterized in that: the first epitaxial layer and the second epitaxial layer have the same or different appearance shapes.
9. A wafer as set forth in claim 8, wherein: the appearance shape of the first epitaxial layer is an L shape with steps, and the appearance shape of the second epitaxial layer is a cross shape or a rice shape, so that the marking element is used for aligning and positioning in the photoetching process of the wafer.
10. A wafer as set forth in claim 9 wherein: the first electrode comprises a first P electrode and a first N electrode, and the first N electrode is positioned on the surface of the step; the second electrode is the same as the first P electrode.
11. A wafer according to claim 3 or 5 or 7, characterized in that: the thickened dielectric layer comprises a metal dielectric layer or a nonmetal dielectric layer.
12. A wafer as set forth in claim 11 wherein: the thickening medium layer is a silicon dioxide layer or a chromium layer.
13. A wafer as set forth in claim 11 wherein: the thickness of the thickened dielectric layer is 1500-25000 angstroms.
14. A wafer as set forth in claim 1, wherein: the marking elements are uniformly distributed among the light-emitting elements in an interpenetration mode.
15. A wafer as set forth in claim 1, wherein: the mark elements are distributed among the light-emitting elements in a shape of Chinese character 'mi' or 'tian'.
16. A wafer as set forth in claim 1, wherein: the marking element is used for alignment positioning in a photoetching process.
17. The manufacturing method of the wafer is characterized by comprising the following steps:
step 1, providing a substrate, wherein the substrate is provided with a first surface and a second surface which are opposite, growing an epitaxial layer on the first surface of the substrate, patterning the epitaxial layer, and forming a plurality of first epitaxial layers and second epitaxial layers which are distributed at intervals;
step 2, depositing a thickened dielectric layer on the surface of the second epitaxial layer;
and 3, depositing a first electrode on the surface of the first epitaxial layer to form a light-emitting element, depositing a second electrode on the surface of the thickened medium layer to form a marking element, wherein the thickness of the marking element is greater than that of the light-emitting element, the wafer is inversely placed on the surface of the carrying disc, when pressure is applied to the second surface of the substrate by adopting a pressurizing device, a gap is formed between the light-emitting element and the carrying disc, and the marking element is used for supporting the light-emitting element and preventing the carrying disc from damaging the light-emitting element.
18. The method for manufacturing a wafer according to claim 17, wherein: and a step of depositing a current expansion layer on the surface of the first epitaxial layer and the surface of the thickened dielectric layer is also included between the steps 2 and 3.
19. The method for manufacturing a wafer according to claim 18, wherein: the method also comprises the step of depositing a current barrier layer between the first epitaxial layer and the current expansion layer and between the thickened dielectric layer and the current expansion layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911216929.7A CN111081680B (en) | 2019-12-03 | 2019-12-03 | Wafer and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911216929.7A CN111081680B (en) | 2019-12-03 | 2019-12-03 | Wafer and manufacturing method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN111081680A CN111081680A (en) | 2020-04-28 |
| CN111081680B true CN111081680B (en) | 2021-08-27 |
Family
ID=70312462
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201911216929.7A Active CN111081680B (en) | 2019-12-03 | 2019-12-03 | Wafer and manufacturing method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN111081680B (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5459081A (en) * | 1993-12-21 | 1995-10-17 | Nec Corporation | Process for transferring a device to a substrate by viewing a registration pattern |
| CN101419954A (en) * | 2007-10-22 | 2009-04-29 | 南茂科技股份有限公司 | Contraposition device for chip encapsulation construction |
| CN107658371A (en) * | 2017-09-15 | 2018-02-02 | 武汉大学 | The manufacture method of Micro LED based on laser direct-writing |
| CN110098286A (en) * | 2018-01-29 | 2019-08-06 | 山东浪潮华光光电子股份有限公司 | A kind of pasting method in the LED wafer substrate thinning of simplicity |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5308213B2 (en) * | 2009-03-31 | 2013-10-09 | セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー | Manufacturing method of semiconductor device |
-
2019
- 2019-12-03 CN CN201911216929.7A patent/CN111081680B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5459081A (en) * | 1993-12-21 | 1995-10-17 | Nec Corporation | Process for transferring a device to a substrate by viewing a registration pattern |
| CN101419954A (en) * | 2007-10-22 | 2009-04-29 | 南茂科技股份有限公司 | Contraposition device for chip encapsulation construction |
| CN107658371A (en) * | 2017-09-15 | 2018-02-02 | 武汉大学 | The manufacture method of Micro LED based on laser direct-writing |
| CN110098286A (en) * | 2018-01-29 | 2019-08-06 | 山东浪潮华光光电子股份有限公司 | A kind of pasting method in the LED wafer substrate thinning of simplicity |
Also Published As
| Publication number | Publication date |
|---|---|
| CN111081680A (en) | 2020-04-28 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US8664682B2 (en) | Semiconductor light emitting device and method of fabricating the same | |
| US9099610B2 (en) | Light emitting device and light emitting device package | |
| JP5855422B2 (en) | Light emitting device and manufacturing method thereof | |
| US8614457B2 (en) | Semiconductor light emitting device | |
| EP2312655B1 (en) | Semiconductor light-emitting device | |
| EP1848026B1 (en) | LED having vertical structure | |
| CN101601140A (en) | The III group-III nitride luminescent device of luminescent layer with strain of reduction | |
| WO2008121978A1 (en) | Dual surface-roughened n-face high-brightness led | |
| CN111081680B (en) | Wafer and manufacturing method thereof | |
| US20240282883A1 (en) | Method for manufactuing non-emitting iii-nitride semiconductor stacked structure | |
| US20100255656A1 (en) | Fabrication of semiconductor devices | |
| WO2022141233A1 (en) | Semiconductor light-emitting element and manufacturing method therefor | |
| KR102570675B1 (en) | Method of manufacturing a non emitting iii-nitride semiconductor stacked structure | |
| US8536599B2 (en) | Semiconductor light emitting device and method of fabricating thereof | |
| KR102549356B1 (en) | Method of manufacturing a non emitting iii-nitride semiconductor stacked structure | |
| KR102591148B1 (en) | Method of manufacturing a non emitting iii-nitride semiconductor stacked structure | |
| KR102591151B1 (en) | Method of manufacturing a non emitting iii-nitride semiconductor device | |
| KR102591150B1 (en) | Method of manufacturing a non emitting iii-nitride semiconductor device | |
| KR102556721B1 (en) | Non emitting iii-nitride semiconductor stacked structure and method of manufacturing the same | |
| KR102591149B1 (en) | Method of manufacturing a non emitting iii-nitride semiconductor stacked structure | |
| US8785963B2 (en) | Method of manufacturing semiconductor light emitting device | |
| CN117501450A (en) | Method for manufacturing non-light-emitting group III nitride semiconductor laminate | |
| KR20230077839A (en) | Method of manufacturing a non emitting iii-nitride semiconductor stacked structure | |
| KR20150140938A (en) | Light emitting device and light emitting device package | |
| KR20120013601A (en) | Vertical light emitting diode device and method of manufacturing the same |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |