CN111063388B - Method for positioning failure point of memory - Google Patents
Method for positioning failure point of memory Download PDFInfo
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- CN111063388B CN111063388B CN201911393029.XA CN201911393029A CN111063388B CN 111063388 B CN111063388 B CN 111063388B CN 201911393029 A CN201911393029 A CN 201911393029A CN 111063388 B CN111063388 B CN 111063388B
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
Abstract
The invention provides a method for positioning a failure point of a memory, which comprises the following steps: preliminarily positioning failure points to obtain initial positions of the failure points; calibrating the area where the initial position of the failure point is as a target area; removing the metal layer on the surface of the target area; and positioning the failure point again to obtain the final position of the failure point. The method for positioning the failure point of the memory is simple and easy to implement, and the positioning accuracy of the failure point is greatly improved.
Description
Technical Field
The invention relates to the field of semiconductor manufacturing, in particular to a method for positioning failure points of a memory.
Background
As technology develops, the semiconductor industry continues to seek new ways to produce such that each memory die in a memory device has a greater number of memory cells. In non-volatile memories, such as NAND memories, one way to increase memory density is through the use of vertical memory arrays, i.e., 3D NAND (three-dimensional NAND) memories; with higher and higher integration, 3D NAND memories have evolved from 32 layers to 64 layers, and even higher.
Failure analysis of memory after design and fabrication is an important means to improve memory yield, process technology reliability and stability. However, the existing failure analysis method has low accuracy in locating failure points, and the success rate of failure analysis work is seriously reduced.
Therefore, how to improve the accuracy of positioning the failure point in the failure analysis process of the three-dimensional memory and improve the working efficiency of failure analysis is a technical problem to be solved urgently at present.
Disclosure of Invention
The invention aims to solve the technical problem of providing a method for positioning a failure point of a memory, which can improve the positioning accuracy of the failure point.
In order to solve the above problems, the present invention provides a method for locating a failure point of a memory, which comprises the following steps: preliminarily positioning failure points to obtain initial positions of the failure points; calibrating the area where the initial position of the failure point is as a target area; removing the metal layer on the surface of the target area; and positioning the failure point again to obtain the final position of the failure point.
Further, in the step of preliminarily positioning the failure point, the failure point is positioned by a laser positioning method.
Further, the method for calibrating the area where the initial position of the failure point is located as the target area comprises the following steps: the surface of the area where the initial position of the failure point is located is marked to distinguish it from the area without the failure point.
Further, the surface of the area where the initial position of the failure point is located is subjected to physical or chemical treatment to mark the surface of the area where the initial position of the failure point is located.
Further, laser bombardment is carried out on the surface of the area where the initial position of the failure point is located, the dielectric layer on the surface of the area is carbonized and discolored, and therefore the surface of the area where the initial position of the failure point is located is marked.
Further, before the step of removing the metal layer on the surface of the target area, the method further comprises the following steps: and removing the carbonized dielectric layer.
Further, the area where the initial position of the failure point is located is formed by expanding a preset distance outwards from the initial position of the failure point.
Further, before the step of removing the metal layer of the target area, the method further comprises the following steps: and covering a protective layer on the area without the failure points around the target area, wherein the protective layer at least covers the metal layer on the area without the failure points.
Further, in the step of repositioning the failure point, the failure point is repositioned again by using a laser positioning method.
Further, the memory includes a support layer and a device layer, and the fail point is preliminarily positioned and the fail point is repositioned from the device layer side.
The method for positioning the failure point of the memory adopts a twice positioning method, initially positions the failure point, and can distinguish the area with the failure point from the area without the failure point; after the failure point is preliminarily positioned, the metal layer of the area with the failure point is removed, so that the influence of subsequent failure point positioning is avoided, and the metal layer of the area without the failure point is reserved, and other subsequent failure analysis is not influenced; and after the metal layer of the area with the failure point is removed, the failure point is positioned again, and at the moment, the actual position of the failure point can be obtained without the shielding of the metal layer.
The method for positioning the failure point of the memory is simple and easy to implement, and the positioning accuracy of the failure point is greatly improved.
Drawings
FIG. 1 is a schematic cross-sectional view of a prior art memory;
FIG. 2 is a schematic diagram illustrating the steps of one embodiment of the method for locating a memory failure point according to the present invention;
FIGS. 3A-3E are flow charts of one embodiment of a method for locating a memory failure point according to the present invention;
fig. 4A and 4B are pictures acquired by a laser device for preliminarily locating a failure point, in which fig. 4A is a 20-magnification picture, and fig. 4B is a 100-magnification picture, and hot spot signals are superimposed on a memory image;
fig. 5A and 5B are pictures acquired by the laser device for repositioning the failure point, in which fig. 5A is a 20-magnification picture and fig. 5B is a 100-magnification picture, and hot spot signals are superimposed on the memory image.
Detailed Description
The following describes in detail a specific embodiment of the method for locating a memory failure point according to the present invention with reference to the accompanying drawings.
Fig. 1 is a schematic cross-sectional view of a conventional memory, and referring to fig. 1, the 3D NAND bonding (bonding) memory includes a support layer 10 and a device layer 11 disposed on the support layer 10. Failure analysis of the memory is typically performed on the device layer 11. Failure analysis of the device layer 11 requires locating the point of failure. The back side and front side points are typically used to locate the failure point of the device layer 11. The back side grabbing point is to position the failure point of the device layer 11 from the side of the supporting layer 10, and has the disadvantage that the supporting layer 10 blocks a positioning signal (such as a laser signal or an electron-hole composite signal), so that some failure points can not be grabbed, and the failure points are not complete during subsequent sample preparation, thereby causing failure of FA analysis; the front side of the grabbing point locates the failure point of the device layer 11 from the side of the device layer 11, which has the disadvantage that the metal layer 12 on the device layer 11, such as an aluminum pad, blocks the locating signal (such as a laser signal or an Emmi signal), so that the grabbed signal points are shifted or mistakenly located, and the failure point cannot be accurately located.
Therefore, in order to accurately locate the failure point, the invention provides a method for locating the failure point of the memory.
FIG. 2 is a schematic diagram illustrating the steps of a method for locating a failure point of a memory according to an embodiment of the present invention. Referring to fig. 2, the method for locating the memory failure point includes the following steps: step S20, preliminarily positioning the failure point to obtain the initial position of the failure point; step S21, calibrating the area where the initial position of the failure point is as the target area; step S22, removing the metal layer on the surface of the target area; and step S23, positioning the failure point again to obtain the final position of the failure point.
As shown in fig. 1, the memory includes a support layer 10 and a device layer 11, a metal layer 12 is disposed on a surface of the device layer 11, and a plurality of metal pads 13 are formed on the metal layer 12.
Referring to step S20 and fig. 3A, the fail point is initially located, and the initial position of the fail point is obtained.
In the present embodiment, a laser positioning method is used to position the failure point. Specifically, the failure point emits light and heats under the irradiation of laser due to reasons such as abnormal circuit connection and the like, and then the heat point signal acquisition is carried out, so that the failure point can be preliminarily positioned, and the initial position of the failure point can be obtained.
Fig. 4A and 4B are pictures acquired by a laser device for preliminarily locating a failure point, in which a hot spot signal is superimposed on a memory image, where fig. 4A is a 20-magnification picture and fig. 4B is a 100-magnification picture. In order to clearly observe the information in the picture, the hot spot signal can also be drawn in color. Referring to fig. 4A and 4B, there is a hot spot signal (as shown in fig. 4A and 4B by the dotted oval line) at the side of the metal pad 13, which indicates that there is a failure point around or under the metal pad 13.
When the failure point is preliminarily positioned, the positioning position of the failure point blocked by the metal pad 13 may be shifted from the actual position thereof. For example, referring to fig. 3A, the failure point 14 is located below the metal pad 13, when the failure point 14 is captured, the metal pad 13 blocks a thermal signal of the failure point 14, heat of the failure point 14 overflows from an edge of the metal pad 13, a hot spot signal 15 exists at the edge of the metal pad 13, and if the position of the hot spot signal 15 is taken as a final position of the failure point, a positioning position of the failure point is inconsistent with an actual position, so that the positioning of the failure point is extremely inaccurate, and subsequent failure analysis is affected. Of course, not all of the failure points are blocked by the metal layer, but the probability of the failure points being blocked by the metal layer is greater than 50%, which has greatly affected the subsequent failure analysis.
In step S20, the position of the hot spot signal 15 is used as the initial position of the failure point, and the subsequent process is performed accordingly.
Referring to step S21 and fig. 3B, the area where the initial position of the failure point is located is marked as the target area. The purpose of this step is to distinguish the area with the failure point from the area without the failure point, so that only the area with the failure point is operated in the subsequent operation, and the area without the failure point is not operated, thereby avoiding the subsequent operation from damaging the area without the failure point.
Specifically, in this step, the region where the hot spot signal 15 is located is designated as a target region a. Wherein the initial position of the failure point is formed by extending a preset distance from the initial position of the failure point (i.e. the position of the hot spot signal 15). In this embodiment, the initial position of the failure point 14 is located in a region at least covering the metal pad 13 located above the failure point 14 and the dielectric layer 16 around the metal pad 13. The dielectric layer 16 includes, but is not limited to, a polyamide layer.
Further, the surface of the area where the initial position of the failure point is located can be marked, so that the target area can be visually observed on the surface of the memory, and the subsequent steps can be conveniently carried out. Wherein, the surface of the area where the initial position of the failure point is located can be marked by adopting a physical or chemical method. For example, in this embodiment, the surface of the region where the initial position of the failure point is located is subjected to laser bombardment, the laser can carbonize the dielectric layer 16 on the surface of the region, and the dielectric layer 16 becomes black, so that the region having the failure point can be distinguished from the region having no failure point.
Further, the carbonization depth of the dielectric layer 16 can be selected according to the requirement. For example, only a certain range of the dielectric layer 16 located downward from the surface of the region where the initial position of the failure point is located may be carbonized, and the dielectric layer 16 deeper may not be carbonized. The carbonization depth of the dielectric layer 16 can be changed by changing the energy of the laser and the time of acting on the dielectric layer.
The laser bombardment equipment used in step S21 may be the same as the laser method used in step S20 to primarily locate the failure point, and step S21 may be executed without adding additional equipment on the basis of step S20, so that the method for locating the failure point of the memory of the present invention is simple and convenient, and has low cost.
Further, after step S21, the method further includes the following steps: referring to fig. 3C, a region without a failure point around the target region a is covered with a protective layer 17, and the protective layer 17 covers at least the metal layer of the region without the failure point. The purpose of this step is to protect the metal layer in the region without the failure point from being damaged in step S22, thereby affecting the subsequent failure analysis. The protective layer 17 may be a polyimide tape or the like, which is attached to the surface of the region having no failure point to shield the metal layer in the region having no failure point.
Having distinguished the region having the failure point from the region having no failure point in step S21, in the step of covering the protective layer, the protective layer may be set according to the distinguishing mark so that the protective layer covers only the region having no failure point. Specifically, in step S21, the dielectric layer is carbonized to black, and the protective layer 17 is covered outside the black region with the carbonized black dielectric layer as a boundary.
Further, after step S21, the method further includes the following steps: referring to fig. 3D, the carbonized dielectric layer 16 is removed. Wherein the carbonized dielectric layer 16 may be removed by physical or chemical means. After the step is completed, the side surface of the metal pad 13 surrounded by the dielectric layer 16 is exposed, and the removal speed of the metal pad 13 can be increased when the step S22 is performed.
In step S22 and fig. 3E, the metal layer on the surface of the target area a is removed. The purpose of this step is to remove the metal layer to avoid it affecting the execution of step S23.
Specifically, in this step, the metal pad on the surface of the target area a is removed. Wherein, a strong acid can be used to remove the metal layer, for example, if the material of the metal layer is aluminum, hydrochloric acid can be used to remove the metal layer. In this step, the protective layer 17 blocks the metal layer in the area without the failure point, and the metal layer in the area without the failure point is reserved for the subsequent failure analysis, and the metal layer in the area with the failure point is removed.
After step S22, there is no metal layer covering the failure point 14.
Referring to step S23, the fail point is located again to obtain the final position of the fail point. The metal layer of the target area has been removed in step S22, and there is no metal layer blocking signal in the target area, and the position of the failure point obtained in this step is the final position.
Fig. 5A and 5B are pictures acquired by the laser device for repositioning the failure point, in which fig. 5A is a 20-magnification picture and fig. 5B is a 100-magnification picture, and hot spot signals are superimposed on the memory image. In order to clearly observe the information in the picture, the hot spot signal can also be drawn in color. Referring to fig. 5A and 5B, there is a hot spot signal (as shown in the area indicated by the dashed oval line in fig. 5A and 5B) under the metal pad 13 in the target area, but there is no hot spot signal at the position of the hot spot signal 15 shown in fig. 4A, which indicates that the actual position of the failure point is under the metal pad, and when step S20 (i.e., preliminary positioning of the failure point) is executed, the hot spot signal of the failure point is shielded by the metal pad above the failure point, so that the hot spot signal is shifted, and the hot spot signal 15 is displayed at the edge of the metal pad.
Further, in this embodiment, the same apparatus as that of step S20 may be used, and the laser positioning method may be used to position the failure point.
The method for positioning the failure point of the memory adopts a twice positioning method, initially positions the failure point, and can distinguish the area with the failure point from the area without the failure point; after the failure point is preliminarily positioned, the metal layer of the area with the failure point is removed, so that the influence of subsequent failure point positioning is avoided, and the metal layer of the area without the failure point is reserved, and other subsequent failure analysis is not influenced; and after the metal layer of the area with the failure point is removed, the failure point is positioned again, and at the moment, the actual position of the failure point can be obtained without the shielding of the metal layer. The method for positioning the failure point of the memory is simple and easy to implement, and the positioning accuracy of the failure point is greatly improved.
The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.
Claims (10)
1. A method for locating a memory failure point, comprising the steps of:
preliminarily positioning failure points to obtain initial positions of the failure points;
calibrating the area where the initial position of the failure point is as a target area;
removing the metal layer on the surface of the target area;
and (4) positioning the failure point again for the target area without the metal layer to obtain the final position of the failure point.
2. The method of claim 1, wherein in the step of preliminarily locating the failure point, the failure point is located by laser positioning.
3. The method for locating the failure point of the memory according to claim 1, wherein the method for calibrating the area where the initial position of the failure point is located as the target area comprises the following steps:
the surface of the area where the initial position of the failure point is located is marked to distinguish it from the area without the failure point.
4. The method of claim 3, wherein the surface of the area where the initial position of the failure point is located is physically or chemically treated to mark the surface of the area where the initial position of the failure point is located.
5. The method for locating the failure point of the memory according to claim 3, wherein laser bombardment is performed on the surface of the region where the initial position of the failure point is located, and the dielectric layer on the surface of the region is carbonized and discolored to mark the surface of the region where the initial position of the failure point is located.
6. The method of claim 5, further comprising the following steps before the step of removing the metal layer on the surface of the target area: and removing the carbonized dielectric layer.
7. The method as claimed in claim 1, wherein the initial location of the failure point is formed by expanding a predetermined distance from the initial location of the failure point.
8. The method of locating a memory failure point of claim 1, further comprising, before the step of removing the metal layer of the target region, the steps of: and covering a protective layer on the area without the failure point around the target area, wherein the protective layer at least covers the metal layer on the area without the failure point.
9. The method of claim 1, wherein in the step of repositioning the failure point, the failure point is repositioned using a laser positioning method.
10. The method of claim 1, wherein the memory comprises a support layer and a device layer, and the failure point is initially located and re-located from the device layer side.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102854429A (en) * | 2011-06-28 | 2013-01-02 | 上海华碧检测技术有限公司 | Failure point positioning method for semiconductor power device failure analysis |
| CN105448766B (en) * | 2015-12-31 | 2018-06-19 | 上海华虹宏力半导体制造有限公司 | Power device failure independent positioning method |
| CN107958849B (en) * | 2017-11-21 | 2019-12-10 | 上海华虹宏力半导体制造有限公司 | Method for positioning failure point of barrier-layer-free metal layer power device I GSS |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JP2003066115A (en) * | 2001-08-22 | 2003-03-05 | Matsushita Electric Ind Co Ltd | Fail analysis method and apparatus of semiconductor device |
| CN102466778A (en) * | 2010-11-17 | 2012-05-23 | 上海华虹Nec电子有限公司 | Failure positioning method for defects of power metal-oxide-semiconductor chip |
| CN106019118A (en) * | 2016-05-18 | 2016-10-12 | 上海华虹宏力半导体制造有限公司 | Method for determining invalid position of power MOS |
| CN106373905A (en) * | 2016-11-23 | 2017-02-01 | 武汉新芯集成电路制造有限公司 | Locating method for electric leakage point in gate oxide |
| CN108614197A (en) * | 2018-04-19 | 2018-10-02 | 武汉新芯集成电路制造有限公司 | A kind of electric leakage independent positioning method for floating boom |
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