CN111048404A - Buffer layer structure and preparation method thereof - Google Patents
Buffer layer structure and preparation method thereof Download PDFInfo
- Publication number
- CN111048404A CN111048404A CN201911360215.3A CN201911360215A CN111048404A CN 111048404 A CN111048404 A CN 111048404A CN 201911360215 A CN201911360215 A CN 201911360215A CN 111048404 A CN111048404 A CN 111048404A
- Authority
- CN
- China
- Prior art keywords
- layer
- platinum group
- group metal
- buffer layer
- preparing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02378—Silicon carbide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/0242—Crystalline insulating materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02488—Insulating materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02491—Conductive materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/02505—Layer structure consisting of more than two layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02527—Carbon, e.g. diamond-like carbon
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Crystallography & Structural Chemistry (AREA)
- Physical Vapour Deposition (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
Abstract
A buffer layer structure, comprising: a substrate; an oxide buffer layer formed on the substrate; an iridium oxide layer formed over the oxide buffer layer; a platinum group metal seed layer formed over the iridium oxide layer; a platinum group metal layer formed on the platinum group metal seed layer. Silicon carbide, silicon, sapphire and the like are used as substrates, the preparation and processing flow is fused with the current semiconductor process, the substrate size selection range is wide, the process stability is high, and the subsequent requirements can be better met; due to the iridium oxide, the crystal mismatch degree of the adjacent thin film is reduced, and the iridium oxide is used as a barrier layer to inhibit the solid-phase reaction of the platinum group metal and an oxide buffer layer, so that the quality of the platinum group metal is effectively improved; the seed crystal layer is prepared in situ, so that the reaction of oxide with oxygen, water vapor and the like in the air is avoided, the surface of the film is kept in a better state, and the difficulty in the subsequent preparation of the platinum group metal layer is reduced.
Description
Technical Field
The invention relates to the technical field of semiconductors, functional thin film materials and quantum spin, in particular to a buffer layer structure and a preparation method thereof.
Background
In recent years, wide-bandgap semiconductor materials are used as strategic high points of next-generation information technology, energy-saving and emission-reduction technology and national defense security technology in the microelectronic field of high power, high frequency, radiation resistance and the like. The diamond has wide band gap, high thermal conductivity, high breakdown electric field and high carrier mobility, so that the diamond device has wide development prospect and application. The preparation device puts higher requirements on the material preparation process. Because the common substrate for homoepitaxy is high-temperature and high-pressure diamond, the epitaxy size of the common substrate is limited by the size of the substrate, and the diamond with larger size prepared by the splicing method has crystal boundary defects and higher cost. Therefore, the heteroepitaxy preparation of diamond is widely interested by various research groups at home and abroad. In particular, great progress has been made in heteroepitaxial diamond on iridium (Ir), which is a noble metal of the platinum group, which is not suitable from the point of view of economy and differences in thermal expansion coefficient for the direct heteroepitaxial preparation of diamond using iridium monocrystals.
Platinum group metal thin films can be prepared directly on magnesium oxide (MgO), Strontium Titanate (STO), and iridium oxide stabilized zirconia (YSZ) (100) single crystals. But this inevitably entails that the size of the platinum group metal thin film is subject to the development of the oxide crystal preparation process and the price is high. In contrast, monocrystalline silicon, silicon carbide, sapphire and the like have a very perfect industrial chain from both preparation and processing processes. Therefore, it is possible to produce a platinum group metal thin film using other equipment after the oxide thin film is formed on the silicon substrate. However, since the oxide film is exposed to air and reacts with water vapor or generates physical adsorption, the surface state is changed, which increases the difficulty of the subsequent process. Therefore, by the above method, a high-quality platinum group metal thin film is not obtained in many cases. Furthermore, since the metal in the oxide layer tends to have a possibility of solid-phase reaction with the platinum group metal, this leads to deterioration of the quality of the platinum group metal layer.
Disclosure of Invention
In view of the above, the present invention provides a buffer layer structure and a method for fabricating the same, which are intended to solve at least one of the above problems.
In order to achieve the above object, as an aspect of the present invention, there is provided a buffer layer structure including:
a substrate;
an oxide buffer layer formed over the substrate;
an iridium oxide layer formed over the oxide buffer layer;
a platinum group metal seed layer formed over the iridium oxide layer;
a platinum group metal layer formed on the platinum group metal seed layer.
Wherein the substrate is made of a material selected from silicon carbide, silicon and sapphire.
Wherein the oxide buffer layer is made of at least one material selected from yttria-stabilized zirconia, magnesia and strontium titanate, and the thickness of the oxide buffer layer is 15-170 nm.
Wherein the iridium oxide layer has a thickness of 5 to 200 nm;
the platinum group metal seed layer is made of at least one material selected from the group consisting of platinum, palladium, osmium, iridium, ruthenium, and rhodium.
The platinum group metal layer is made of at least one material selected from platinum, palladium, osmium, iridium, ruthenium and rhodium, and is required to be consistent with the material of the platinum group metal seed crystal layer, and the thickness of the platinum group metal seed crystal layer is 10-600 nm.
As another aspect of the present invention, there is also provided a method for preparing a buffer layer structure, including the steps of:
preparing an oxide buffer layer on a substrate;
preparing an iridium oxide layer in situ on the oxide buffer layer;
preparing a platinum group metal seed crystal layer in situ on the iridium oxide layer;
a platinum group metal layer is prepared on the platinum group metal seed layer.
Wherein the step of preparing the oxide buffer layer on the substrate specifically comprises: heating the substrate to 250-1200 ℃, and preserving heat for 10-60 minutes, wherein the heating rate is 1-20 ℃/min; the preparation temperature is set to be 250-1200 ℃, the thickness is prepared to be 5-20 nm under vacuum, and then oxygen is introduced to ensure thatThe vacuum degree of the cavity is 10-5About 100Torr, and then continuously preparing until the thickness is 15-170 nm; after the preparation is finished, preserving the heat for 0.5 to 12 hours under the high oxygen pressure of 1 to 200 Torr; the method used in the process of preparing the oxide buffer layer is selected from the group consisting of pulse laser deposition, magnetron sputtering, electron beam evaporation, ion beam assisted deposition, molecular beam epitaxy and metal organic chemical vapor deposition related film preparation methods.
The step of preparing the iridium oxide layer in situ on the oxide buffer layer specifically comprises the following steps: the temperature of the substrate is reduced to 200 ℃, and then the temperature is increased to 250-1200 ℃ at 10 DEG C-5An iridium oxide thin film of 5 to 200nm is prepared under an oxygen pressure of 100Torr, and after the preparation is completed, the temperature is maintained for 0.5 to 12 hours under a high oxygen pressure of 1 to 200 Torr.
Wherein, in the step of preparing the platinum group metal seed crystal layer on the iridium oxide layer in situ, the method specifically comprises the following steps: heating the substrate to 250-1200 ℃ at 10 DEG C-5The platinum group metal seed layer is prepared under an oxygen or argon atmosphere of about 100 Torr.
Wherein the step of preparing the platinum group metal layer on the platinum group metal seed layer specifically comprises: the background gas pressure for preparing the platinum group metal layer is 10-5The preparation time is 2 to 10 hours, and the substrate temperature is 250 to 1200 ℃ under the condition of about 100 Torr; the method used in the process of preparing the platinum group metal layer is selected from magnetron sputtering, electron beam evaporation, ion beam assisted deposition, molecular beam epitaxy and a preparation method of a film related to metal organic chemical vapor deposition.
Based on the technical scheme, compared with the prior art, the buffer layer structure and the preparation method thereof have at least one of the following beneficial effects:
1. silicon carbide, silicon, sapphire and the like are used as substrates, the preparation and processing flow is fused with the current semiconductor process, the substrate size selection range is wide, the process stability is high, and the subsequent requirements can be better met;
2. due to the iridium oxide, the crystal mismatch degree of the adjacent thin film is reduced, and the iridium oxide is used as a barrier layer to inhibit the solid-phase reaction of the platinum group metal and an oxide buffer layer, so that the quality of the platinum group metal is effectively improved;
3. the seed crystal layer is prepared in situ, so that the reaction of oxide with oxygen, water vapor and the like in the air is avoided, the surface of the film is kept in a better state, and the difficulty in the subsequent preparation of the platinum group metal layer is reduced;
4. iridium oxide/platinum group metals may be used as the back electrode for certain devices, thereby reducing the complexity of subsequent processing of the devices; and the signal transmission resistivity can be reduced and the reliability of the device can be improved.
Drawings
FIG. 1 is a schematic view of a buffer layer structure of the present invention;
fig. 2 is a flow chart of a method for preparing a buffer layer in an embodiment of the invention.
In the above drawings, the reference numerals have the following meanings:
101. a substrate; 102. an oxide buffer layer; 103. an iridium oxide layer;
104. a platinum group metal seed layer; 105, a platinum group metal layer.
Detailed Description
In order that the objects, technical solutions and advantages of the present invention will become more apparent, the present invention will be further described in detail with reference to the accompanying drawings in conjunction with the following specific embodiments.
The invention discloses a buffer layer structure and a preparation method thereof, wherein the buffer layer structure comprises the following steps: substrate/oxide buffer layer/iridium oxide layer/platinum group metal seed layer/platinum group metal layer. The iridium oxide/platinum group metal seed crystal layer is prepared in situ, so that the repeatability of the platinum group metal preparation process is improved, and the prepared platinum group metal film has good quality. The platinum group metal film can be used as a buffer layer of epitaxial diamond and also can be used as a back electrode of a piezoelectric micro-mechanical system, so that the signal transmission resistivity can be reduced, and the reliability of the device can be improved. Meanwhile, due to the wide application of platinum group metals in spin quantum devices, the structure can also be applied to this field.
Specifically, the present invention discloses a buffer layer structure, as shown in fig. 1, including:
a substrate 101;
an oxide buffer layer 102 formed on the substrate 101;
an iridium oxide layer 103 formed on the oxide buffer layer 102;
a platinum group metal seed layer 104 formed on the iridium oxide layer 103;
a platinum group metal layer 105 formed on the platinum group metal seed layer 104.
The material of the substrate 101 is selected from silicon carbide, silicon and sapphire.
Wherein the oxide buffer layer 101 is made of at least one material selected from yttria-stabilized zirconia, magnesia and strontium titanate, and has a thickness of 15-170 nm.
Wherein the iridium oxide layer 103 has a thickness of 5 to 200 nm;
the platinum group metal seed layer 104 is made of at least one material selected from the group consisting of platinum, palladium, osmium, iridium, ruthenium, and rhodium.
The platinum group metal layer 105 is made of at least one selected from platinum, palladium, osmium, iridium, ruthenium and rhodium, and is required to be consistent with the platinum group metal seed crystal layer 104, and the thickness of the platinum group metal seed crystal layer is 10-600 nm.
As another aspect of the present invention, there is also provided a method for preparing a buffer layer structure, as shown in fig. 2, including the following steps:
201: preparing an oxide buffer layer on a substrate;
202: preparing an iridium oxide layer in situ on the oxide buffer layer;
203: preparing a platinum group metal seed crystal layer in situ on the iridium oxide layer;
204: a platinum group metal layer is prepared on the platinum group metal seed layer.
Wherein the step of preparing the oxide buffer layer on the substrate specifically comprises: heating the substrate to 250-1200 ℃, and preserving heat for 10-60 minutes, wherein the heating rate is 1-20 ℃/min; the preparation temperature is set to be 250-1200 ℃, the preparation thickness is 5-20 nm under vacuum, and then oxygen is introduced to ensure that the vacuum degree of the cavity is 10-5About 100Torr, and then continuously preparing until the thickness is 15-170 nm; after the preparation is finished, preserving the heat for 0.5 to 12 hours under the high oxygen pressure of 1 to 200 Torr; the process for preparing the oxide buffer layer uses a method selected from pulsed laserDeposition, magnetron sputtering, electron beam evaporation, ion beam assisted deposition, molecular beam epitaxy and metal organic chemical vapor deposition related film preparation methods.
The step of preparing the iridium oxide layer in situ on the oxide buffer layer specifically comprises the following steps: the temperature of the substrate is reduced to 200 ℃, and then the temperature is increased to 250-1200 ℃ at 10 DEG C-5An iridium oxide thin film of 5 to 200nm is prepared under an oxygen pressure of 100Torr, and after the preparation is completed, the temperature is maintained for 0.5 to 12 hours under a high oxygen pressure of 1 to 200 Torr.
Wherein, in the step of preparing the platinum group metal seed crystal layer on the iridium oxide layer in situ, the method specifically comprises the following steps: heating the substrate to 250-1200 ℃ at 10 DEG C-5The platinum group metal seed layer is prepared under an oxygen or argon atmosphere of about 100 Torr.
Wherein the step of preparing the platinum group metal layer on the platinum group metal seed layer specifically comprises: the background gas pressure for preparing the platinum group metal layer is 10-5The preparation time is 2 to 10 hours, and the substrate temperature is 250 to 1200 ℃ under the condition of about 100 Torr; the method used in the process of preparing the platinum group metal layer is selected from magnetron sputtering, electron beam evaporation, ion beam assisted deposition, molecular beam epitaxy and a preparation method of a film related to metal organic chemical vapor deposition.
Two preferred embodiments of the invention are listed below.
Example 1
The method for preparing the YSZ/Ir film on the silicon substrate comprises the following steps:
a YSZ layer was first prepared. Specifically, the silicon substrate was placed in a pulsed laser apparatus, and the apparatus was evacuated to a high vacuum. Heating to the preparation temperature at 5 ℃/min and preserving the heat for 1 hour. After 5 minutes of preparation under background vacuum, 20sccm of oxygen was introduced and preparation was continued for 45 minutes. After the preparation, the oxygen pressure is further increased and the temperature is kept for 1 hour. And cooling to about 200 ℃ at a speed of 5 ℃/min, and cooling along with the furnace.
Putting the prepared Si/YSZ sample into magnetron sputtering equipment, and vacuumizing to high vacuum; heating to the preparation temperature, and keeping the temperature for 1 hour. An Ir layer was prepared by passing argon so that the apparatus was maintained at a constant pressure for about 2.5 hours.
Example 2
A YSZ layer was first prepared. Specifically, the silicon substrate was placed in a pulsed laser apparatus, and the apparatus was evacuated to a high vacuum. Heating to constant temperature at 5 deg.C/min, and maintaining for 1 hr. After 5 minutes of preparation under background vacuum, 20sccm of oxygen was introduced and preparation was continued for 45 minutes. After the preparation, the oxygen pressure is further increased and the temperature is kept for 1 hour. And the temperature is reduced to about 200 ℃ at the speed of 5 ℃/min.
And then preparing an iridium oxide layer. Raising the temperature to a constant temperature at the speed of 5 ℃/min, and introducing oxygen of 20sccm to prepare the iridium oxide layer. Then further raised to a high oxygen pressure and held for 1 hour. And the temperature is reduced to about 200 ℃ at the speed of 5 ℃/min.
The iridium seed layer continues to be prepared. Heating to a constant temperature at a speed of 5 ℃/min, and introducing 20sccm argon to prepare the iridium seed crystal layer. Keeping the temperature for one hour, reducing the temperature to about 200 ℃ at the speed of 5 ℃/min, and cooling along with the furnace.
Putting the prepared silicon/yttria-stabilized zirconia/iridium oxide/iridium seed crystal layer sample into magnetron sputtering equipment, and vacuumizing to high vacuum; raising the temperature to a constant temperature and preserving the temperature for 1 hour. Argon is introduced to keep the equipment at a certain pressure; the Ir layer was prepared under rf power for about 2.5 hours.
The above-mentioned embodiments are intended to illustrate the objects, technical solutions and advantages of the present invention in further detail, and it should be understood that the above-mentioned embodiments are only exemplary embodiments of the present invention and are not intended to limit the present invention, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (10)
1. A buffer layer structure, comprising:
a substrate;
an oxide buffer layer formed over the substrate;
an iridium oxide layer formed over the oxide buffer layer;
a platinum group metal seed layer formed over the iridium oxide layer;
a platinum group metal layer formed on the platinum group metal seed layer.
2. The buffer layer structure of claim 1, wherein the substrate is selected from the group consisting of silicon carbide, silicon, and sapphire.
3. The buffer layer structure of claim 1, wherein the oxide buffer layer is made of at least one material selected from yttria-stabilized zirconia, magnesia, and strontium titanate, and has a thickness of 15-170 nm.
4. The buffer layer structure of claim 1, wherein the iridium oxide layer has a thickness of 5 to 200 nm;
the platinum group metal seed layer is made of at least one material selected from the group consisting of platinum, palladium, osmium, iridium, ruthenium, and rhodium.
5. The buffer layer structure of claim 1, wherein the material of the platinum group metal layer is at least one selected from platinum, palladium, osmium, iridium, ruthenium and rhodium, and the thickness of the material of the platinum group metal seed layer is 10-600 nm.
6. A method for preparing a buffer layer structure according to any one of claims 1 to 5, comprising the steps of:
preparing an oxide buffer layer on a substrate;
preparing an iridium oxide layer in situ on the oxide buffer layer;
preparing a platinum group metal seed crystal layer in situ on the iridium oxide layer;
a platinum group metal layer is prepared on the platinum group metal seed layer.
7. The method according to claim 6, wherein the step of preparing the oxide buffer layer on the substrate specifically comprises: heating the substrate to 250-1200 ℃, and preserving heat for 10-60 minutes, wherein the heating rate is 1-20 ℃/min; the preparation temperature is set to be 250-1200 ℃, the thickness is prepared to be 5-20 nm in vacuum, and then the mixture is introducedOxygen is introduced to make the vacuum degree of the cavity be 10-5About 100Torr, and then continuously preparing until the thickness is 15-170 nm; after the preparation is finished, preserving the heat for 0.5 to 12 hours under the high oxygen pressure of 1 to 200 Torr; the method used in the process of preparing the oxide buffer layer is selected from the group consisting of pulse laser deposition, magnetron sputtering, electron beam evaporation, ion beam assisted deposition, molecular beam epitaxy and metal organic chemical vapor deposition related film preparation methods.
8. The preparation method according to claim 6, wherein the step of preparing the iridium oxide layer in situ on the oxide buffer layer specifically comprises: the temperature of the substrate is reduced to 200 ℃, and then the temperature is increased to 250-1200 ℃ at 10 DEG C-5An iridium oxide thin film of 5 to 200nm is prepared under an oxygen pressure of 100Torr, and after the preparation is completed, the temperature is maintained for 0.5 to 12 hours under a high oxygen pressure of 1 to 200 Torr.
9. The preparation method according to claim 6, wherein the step of preparing the platinum group metal seed layer in situ on the iridium oxide layer specifically comprises: heating the substrate to 250-1200 ℃ at 10 DEG C-5The platinum group metal seed layer is prepared under an oxygen or argon atmosphere of about 100 Torr.
10. The method according to claim 6, wherein the step of preparing the platinum group metal layer on the platinum group metal seed layer specifically comprises: the background gas pressure for preparing the platinum group metal layer is 10-5The preparation time is 2 to 10 hours, and the substrate temperature is 250 to 1200 ℃ under the condition of about 100 Torr; the method used in the process of preparing the platinum group metal layer is selected from magnetron sputtering, electron beam evaporation, ion beam assisted deposition, molecular beam epitaxy and a preparation method of a film related to metal organic chemical vapor deposition.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911360215.3A CN111048404B (en) | 2019-12-25 | 2019-12-25 | Buffer layer structure and preparation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911360215.3A CN111048404B (en) | 2019-12-25 | 2019-12-25 | Buffer layer structure and preparation method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN111048404A true CN111048404A (en) | 2020-04-21 |
| CN111048404B CN111048404B (en) | 2022-10-18 |
Family
ID=70239788
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201911360215.3A Active CN111048404B (en) | 2019-12-25 | 2019-12-25 | Buffer layer structure and preparation method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN111048404B (en) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20050075076A (en) * | 2004-01-15 | 2005-07-20 | 학교법인 포항공과대학교 | Gallium nitride-based ⅢⅤ group compound semiconductor device and methed of producing the same |
| JP2005219962A (en) * | 2004-02-05 | 2005-08-18 | Sumitomo Electric Ind Ltd | Diamond single crystal substrate and its manufacturing method |
| CN102041551A (en) * | 2009-10-13 | 2011-05-04 | 信越化学工业株式会社 | Base material for growing single crystal diamond and method for producing single crystal diamond substrate |
| CN104499047A (en) * | 2014-12-20 | 2015-04-08 | 哈尔滨工业大学 | Substrate for realizing heteroepitaxial growth of large-size monocrystal diamond and preparation method thereof |
| CN107710412A (en) * | 2015-08-31 | 2018-02-16 | 赛普拉斯半导体公司 | The method that ferroelectric RAM is manufactured on the bottom electrode and barrier oxide layer being pre-patterned |
-
2019
- 2019-12-25 CN CN201911360215.3A patent/CN111048404B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20050075076A (en) * | 2004-01-15 | 2005-07-20 | 학교법인 포항공과대학교 | Gallium nitride-based ⅢⅤ group compound semiconductor device and methed of producing the same |
| JP2005219962A (en) * | 2004-02-05 | 2005-08-18 | Sumitomo Electric Ind Ltd | Diamond single crystal substrate and its manufacturing method |
| CN102041551A (en) * | 2009-10-13 | 2011-05-04 | 信越化学工业株式会社 | Base material for growing single crystal diamond and method for producing single crystal diamond substrate |
| CN104499047A (en) * | 2014-12-20 | 2015-04-08 | 哈尔滨工业大学 | Substrate for realizing heteroepitaxial growth of large-size monocrystal diamond and preparation method thereof |
| CN107710412A (en) * | 2015-08-31 | 2018-02-16 | 赛普拉斯半导体公司 | The method that ferroelectric RAM is manufactured on the bottom electrode and barrier oxide layer being pre-patterned |
Non-Patent Citations (3)
| Title |
|---|
| MIKE ANDERSSON ET AL: "Tailoring of field effect gas sensors for sensing of non-hydrogen containing substances from mechanistic studies on model systems", 《IEEE SENSORS 2009 CONFERENCE》 * |
| N.IZYUMSKAYA ET AL: "Processing, Structure, Properties, and Applications of PZT Thin Films", 《SOLID STATE AND MATERIALS SCIENCES》 * |
| 周清军: "《嵌入式RAM的优化设计及前后端关键技术研究》", 31 December 2016 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN111048404B (en) | 2022-10-18 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US9200379B2 (en) | Base material for growing single crystal diamond and method for producing single crystal diamond substrate | |
| Hung et al. | Epitaxial growth of MgO on (100) GaAs using ultrahigh vacuum electron‐beam evaporation | |
| KR102551587B1 (en) | Underlayer substrate for diamond film-forming and method for preparing diamond substrate using the same | |
| EP1832673B1 (en) | Method for producing substrate for single crystal diamond growth | |
| US20130220214A1 (en) | Base material for growing single crystal diamond and method for producing single crystal diamond substrate | |
| JPS58130517A (en) | Manufacture of single crystal thin film | |
| WO2008004657A1 (en) | p-TYPE ZINC OXIDE THIN FILM AND METHOD FOR FORMING THE SAME | |
| CN109136869A (en) | Metal for ultraviolet band mixes gallium oxide transparent conductive film and preparation method thereof | |
| CN111048404B (en) | Buffer layer structure and preparation method thereof | |
| CN109860058B (en) | Preparation method of gallium oxide/copper gallium oxygen heterojunction | |
| US20090294776A1 (en) | Highly Oxygen-Sensitive Silicon Layer and Method for Obtaining Same | |
| CN111139526A (en) | Method for obtaining single crystal boron nitride film by ion beam sputtering deposition | |
| JP7298832B2 (en) | Underlying substrate for diamond film formation and method for producing diamond substrate using the same | |
| CN110896024A (en) | Silicon carbide epitaxial gallium oxide film method and silicon carbide epitaxial gallium oxide film structure | |
| JP3615081B2 (en) | Method for producing GaN single crystal | |
| US20240003051A1 (en) | New transparent conductive oxide thin film and use thereof | |
| CN114015982A (en) | Method for preparing crystalline barium stannate film by magnetic field enhancement technology | |
| CN110993504A (en) | Ga based on SiC substrate2O3Preparation method of film and Ga based on SiC substrate2O3Film(s) | |
| CN105483617A (en) | Method for preparing Mg2Si film on non-silicon substrate | |
| CN110993505A (en) | Semiconductor structure preparation method based on silicon carbide substrate and semiconductor structure | |
| KR19990062035A (en) | Gallium Substrate Manufacturing Method Using Silicon Substrate | |
| CN114775043B (en) | Preparation method for improving uniformity of film thickness | |
| CN115376886B (en) | Nitrogen-doped p-type gallium oxide film and preparation method and application thereof | |
| CN117690780B (en) | Preparation method of aluminum nitride single crystal composite substrate | |
| JP2022118481A (en) | PRODUCTION METHOD OF Li-DOPED p-TYPE NiO THIN FILM |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |