CN111046445A - Encryption and decryption key generation method - Google Patents

Encryption and decryption key generation method Download PDF

Info

Publication number
CN111046445A
CN111046445A CN201811182627.8A CN201811182627A CN111046445A CN 111046445 A CN111046445 A CN 111046445A CN 201811182627 A CN201811182627 A CN 201811182627A CN 111046445 A CN111046445 A CN 111046445A
Authority
CN
China
Prior art keywords
encryption
block
difference
decryption key
nand flash
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201811182627.8A
Other languages
Chinese (zh)
Other versions
CN111046445B (en
Inventor
陈政宇
黄识夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hefei Peirui Microelectronics Co ltd
Original Assignee
Hefei Peirui Microelectronics Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hefei Peirui Microelectronics Co ltd filed Critical Hefei Peirui Microelectronics Co ltd
Priority to CN201811182627.8A priority Critical patent/CN111046445B/en
Publication of CN111046445A publication Critical patent/CN111046445A/en
Application granted granted Critical
Publication of CN111046445B publication Critical patent/CN111046445B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/78Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data
    • G06F21/79Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data in semiconductor storage media, e.g. directly-addressable memories
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/72Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in cryptographic circuits

Abstract

A method for generating an encryption/decryption key includes the following steps: selecting a block of a NAND flash memory; initializing a block of the NAND flash memory; programming a block of the NAND flash memory to obtain a plurality of first potentials of a plurality of memory cells in the block; reinitializing blocks of the NAND flash memory; reprogramming the block of the NAND flash memory to obtain a plurality of second potentials of the memory cells in the block; subtracting the first potentials and the second potentials of the memory cells to obtain a difference table; and reading a plurality of difference values in the difference table according to a set sequence to be used as an encryption and decryption key.

Description

Encryption and decryption key generation method
Technical Field
The present invention relates to a method for generating an encryption/decryption key, and more particularly, to a method for generating an encryption/decryption key using a NAND flash memory.
Background
The trend is to digitize information, which can be permanently stored. Once digitized, an important issue derived is "information security". Conventional information encryption methods, such as HASH, SHA (Secure HashAlgorithm), ssl (Secure Socket layer), WPA (Wi-Fi Protected Access) …, are widely used in different fields. In a standard encryption program, the encryption and decryption method is easy to crack, so that the complexity is increased by matching Random numbers (Random numbers), and the information security is further improved.
As mentioned above, in order to provide random numbers to improve information security, a true random Number Generator (Truerandom Number Generator) is required, which utilizes a time-varying environment to generate random numbers with different environmental variables. However, the complexity of the random numbers generated by the conventional true random number generator is insufficient, and even if the random numbers are used, the digitized information is easy to be cracked.
Disclosure of Invention
This summary is provided to provide a simplified summary of the disclosure in order to provide a basic understanding to the reader. This summary is not an extensive overview of the disclosure and is intended to neither identify key/critical elements of the embodiments nor delineate the scope of the embodiments.
An object of the present invention is to provide a method for generating encryption/decryption keys, so as to solve the problems of the prior art, the solution of which is described below.
To achieve the above objects, one embodiment of the present invention relates to a method for generating an encryption/decryption key, comprising: selecting a block of a NAND flash memory; initializing a block of the NAND flash memory; programming a block of the NAND flash memory to obtain a plurality of first potentials of a plurality of memory cells in the block; reinitializing blocks of the NAND flash memory; reprogramming the block of the NAND flash memory to obtain a plurality of second potentials of the memory cells in the block; subtracting the first potentials and the second potentials of the memory cells to obtain a difference table; and reading a plurality of difference values in the difference table according to a set sequence to be used as an encryption and decryption key.
Therefore, according to the technical content of the present invention, the encryption/decryption key generating method according to the embodiment of the present invention generates the difference value as the encryption/decryption key by using the physical characteristics of the NAND flash memory, thereby increasing the complexity of the encryption/decryption key. In addition, the present invention further adopts different reading sequences of difference values, or limits of difference value ranges to filter out part of difference values, thereby further increasing the complexity of the encryption/decryption key generated by the present invention.
The basic spirit and other objects of the present invention, as well as the technical means and embodiments adopted by the present invention, will be readily understood by those skilled in the art after considering the following embodiments.
Drawings
In order to make the aforementioned and other objects, features, advantages and embodiments of the invention more comprehensible, the following description is given:
FIG. 1 is a block diagram of an array of a NAND flash memory according to an embodiment of the present invention.
FIG. 2 is a flowchart illustrating a method for generating an encryption/decryption key according to an embodiment of the present invention.
FIG. 3 is a block diagram of the NAND flash memory shown in FIG. 1 according to an embodiment of the invention.
FIG. 4 is a schematic diagram illustrating a block programming operation of the NAND flash memory shown in FIG. 1 according to an embodiment of the invention.
FIG. 5 is a schematic diagram illustrating a block programming operation of the NAND flash memory shown in FIG. 1 according to an embodiment of the invention.
FIG. 6 is a schematic diagram showing the difference values of the NAND flash memory shown in FIG. 1 according to an embodiment of the invention.
In accordance with conventional practice, the various features and elements of the drawings are not drawn to scale in order to best illustrate the particular features and elements associated with the present invention. Moreover, the same or similar reference numbers are used throughout the different drawings to refer to similar elements/components.
Description of the symbols
100: NAND flash memory
110: block
200: method of producing a composite material
210 to 270: step (ii) of
300: difference table
D11 to Dnm: difference value
M11 to Mxy: memory cell
Detailed Description
In order to make the description of the present disclosure more complete and complete, the following description is given for illustrative purposes with respect to the embodiments and specific examples of the present invention; it is not intended to be the only form in which the embodiments of the invention may be practiced or utilized. The embodiments are intended to cover the features of the various embodiments as well as the method steps and sequences for constructing and operating the embodiments. However, other embodiments may be utilized to achieve the same or equivalent functions and step sequences.
Unless defined otherwise herein, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. Furthermore, as used herein, the singular tense of a noun, unless otherwise conflicting with context, encompasses the plural form of that noun; the use of plural nouns also covers the singular form of such nouns.
FIG. 1 is a block diagram of an array of a NAND flash memory 100 according to an embodiment of the invention. As shown, NAND flash memory 100 includes a plurality of memory cells M11 through Mxy, where x and y are positive integers. To illustrate how the physical characteristics of the NAND flash memory 100 are adopted to generate the encryption/decryption key, please refer to fig. 2, which is a flowchart illustrating a method 200 for generating the encryption/decryption key according to an embodiment of the present invention.
Referring to FIG. 2, the encryption/decryption key generating method 200 includes the following steps:
step 210: selecting a block of the NAND flash memory;
step 220: initializing a block of the NAND flash memory;
step 230: programming a block of the NAND flash memory to obtain a plurality of first potentials of a plurality of memory cells in the block;
step 240: reinitializing blocks of the NAND flash memory;
step 250: reprogramming the block of the NAND flash memory to obtain a plurality of second potentials of the memory cells in the block;
step 260: subtracting the first potentials and the second potentials of the memory cells to obtain a difference table; and
step 270: reading the plurality of difference values in the difference table according to a set sequence to be used as an encryption/decryption key.
Please refer to fig. 1 and fig. 2 together for illustration. In step 210, the block 110 of the NAND flash memory 100 is selected. However, the invention is not limited to the embodiment shown in fig. 1, which is only used to illustrate one implementation manner of the invention. In other embodiments, other portions of the NAND flash memory 100 may be selected as blocks, such as the lower left portion, the upper right portion, the lower right portion, the middle portion, or other suitable portions of the NAND flash memory 100, so that the complexity of the subsequent encryption/decryption key is further increased when different portions of the NAND flash memory 100 are selected as blocks.
At step 220, please refer to fig. 3 for explanation, wherein fig. 3 is a schematic diagram illustrating a block 110 of the NAND flash memory 100 shown in fig. 1 according to an embodiment of the invention. As shown, the block 110 of the NAND flash memory 100 includes a plurality of memory cells M11 through Mnm, where n and M are positive integers. The block 110 of the NAND flash memory 100 is initialized, as shown in step 220. For example, the initialization may be performed by erasing the information of memory cells M11 through Mnm in block 110 of NAND flash memory 100.
Next, step 230 is executed, referring to fig. 4 for explanation, where fig. 4 is a schematic diagram illustrating a program operation of the block 110 of the NAND flash memory 100 shown in fig. 1 according to an embodiment of the invention. In step 230, a program operation is performed on block 110 of NAND flash 100 to obtain a plurality of first potentials for memory cells M11 through Mnm in block 110. For example, the programming operation may be writing a high voltage into memory cells M11-Mnm in block 110 of NAND flash memory 100. Referring to FIG. 4, the potentials of memory cells M11 through Mnm are shown in a dot-matrix diagram, with denser dots indicating higher potentials. It should be noted that, due to slight differences in materials, process …, etc., generally, the characteristics of each memory cell M11 to Mnm are different, and therefore, even though the same high voltage is applied, the voltages of the memory cells M11 to Mnm are still different. The present invention utilizes this physical property to generate a more complex encryption/decryption key, which will be described in detail later.
Referring to step 240, block 110 of NAND flash memory 100 is reinitialized, for example, information of memory cells M11 through Mnm in block 110 of NAND flash memory 100 is re-erased/re-erased. Then, step 250 is executed, referring to fig. 5 for explanation, fig. 5 is a schematic diagram illustrating a program operation of the block 110 of the NAND flash memory 100 shown in fig. 1 according to an embodiment of the invention. In step 250, the block 110 of the NAND flash memory 100 is programmed again to obtain a plurality of second potentials of the memory cells M11-Mnm in the block 110. For example, the programming operation may be writing a high voltage into memory cells M11-Mnm in block 110 of NAND flash memory 100. As shown in FIG. 5, the memory cells M11 through Mnm still have different potentials after writing high, and are different from the potentials exhibited by the memory cells M11 through Mnm after writing high in FIG. 4.
In step 260, the first potentials and the second potentials of the memory cells M11-Mnm are subtracted from each other to obtain a difference table. For example, the potential exhibited by memory cells M11 through Mnm of FIG. 4 is subtracted from the potential exhibited by the corresponding memory cells M11 through Mnm of FIG. 5 to obtain difference table 300 of FIG. 6. Specifically, the difference D11 of FIG. 6 is obtained by subtracting the potential of the corresponding memory cell M11 of FIG. 5 from the potential of the memory cell M11 of FIG. 4, and the difference can be obtained from the other memory cells by the above-mentioned method. If all the difference values are collected, the difference table 300 shown in FIG. 6 can be obtained. It should be noted that not all memory cells will exhibit different potentials during the two programming operations, such as memory cell M12, which has the same potential after the two programming operations, and thus, there is no difference D12 (the non-difference one is marked with white, but the embodiment of FIG. 6 is merely for illustration and not for limitation of the invention).
Then, step 270 is executed to read a plurality of difference values in the difference table 300 according to the set order to be used as the encryption/decryption key. For example, if the difference D11 is 255 and the difference D14 is 127, the obtained encryption/decryption key is 255127. However, the present invention is not limited thereto, and only illustrates one implementation of the present invention for easy understanding, and the difference table 300 has a plurality of difference values, and if the difference values are combined into the encryption/decryption key, the encryption/decryption key has a very high complexity and is secure for encryption/decryption.
In one embodiment, the matrix formed by the blocks 110 of fig. 3 to 5, or the matrix unit formed by one column and one row of the matrix formed by the difference values of fig. 6, may be used as a basic unit. Referring to fig. 6, the difference value D12 is a matrix cell, which occupies a basic unit of the matrix, and the difference value D13 is a matrix cell, which occupies a basic unit of the matrix. The encryption/decryption key of the present invention can be further complicated according to the above situation, for example, in addition to the difference value D11 being 255 and the difference value D14 being 127, since the difference value D11 is separated from the difference value D14 by two basic units (e.g., D12 and D13), the encryption/decryption key can be formed by a combination of the difference value and the basic units, specifically, the encryption/decryption key can be a combination of "the difference value D11, the basic units 2 (e.g., D12 and D13) separated by the difference value D6326" and the difference value D14 ", that is, the encryption/decryption key can be 2552127. However, the present invention is not limited to this, the difference table 300 has a plurality of difference values and basic units spaced between the difference values, and if the combination of the difference values and the basic units is used as the encryption/decryption key, the complexity of the encryption/decryption key will be further increased, and the security of the encryption/decryption will be further guaranteed.
In another embodiment, the setting order of reading the difference values in the difference table in step 270 may be: selectively reading the difference values corresponding to the same column of the matrix in the difference table 300, selectively reading the difference values corresponding to the same row of the matrix in the difference table 300, or selectively reading the difference values corresponding to any column and any row of the matrix in the difference table 300, and combining the read difference values with the values of the basic units to be used as the encryption and decryption key. Referring to fig. 6, taking the same column as the matrix in the reading order as an example, the difference value D11, the basic unit 2(D12, D13) and the difference value D14 can be read, so that the encryption/decryption key is 2552127. In the same behavior example of reading order as matrix, it can read the difference value D11, the basic unit 1(D21) and the difference value D31, and if the difference value D31 is 268, then the encryption/decryption key is 2551268. Taking the reading sequence as any column and any column of the matrix, it can read the information on the oblique lines of the difference table, such as reading the difference value D11, the basic unit 1(D22) and the difference value D33, and if the difference value D33 is 525, then the encryption/decryption key is 2551525. Similarly, the present invention is not limited thereto, and the difference table 300 has a plurality of difference values and basic units spaced between the difference values, and if the combination of the difference values and the basic units is used as the encryption/decryption key, the complexity of the encryption/decryption key can be further increased, and the security of the encryption/decryption is further guaranteed. In addition, the setting order of the difference values in the reading difference table in step 270 is not limited to the above embodiments, and during the reading, the difference values with differences may be read at intervals, for example, the difference values with differences are D11, D14, D16, D18, and D19, the difference values D11, D16, and D19 may be read at intervals in the present invention, the difference values D14 and D18 are skipped, or the even difference values D14 and D18 may be read, or any desired reading order may be set.
In yet another embodiment, a range of difference values may be set, for example, a range of difference values from 128 to 256, and if the difference values are not within the range, the difference values are filtered out, thereby further increasing the complexity of encrypting and decrypting the key. For example, taking the same column with the reading sequence as the matrix as an example, the difference value D11, the basic unit 2(D12, D13) and the difference value D14 can be read originally, however, the difference value D14 is 127, which exceeds the difference value range 128 to 256, so that the difference value D14 can not be read actually, but the same column can be searched for the difference values with the rest bits within the difference value range, assuming that after 500 basic units are passed, the difference value D1502 is 152 (the above D1502 is column 1, row 502), and then after 50 basic units are passed, the difference value D1553 is found again as 198 (the above D1553 is column 1, row 553), the encryption/decryption key is actually the combination 25550015250198 of the difference value and the basic unit, which is listed in detail as follows:
255/500/152/50/198
d11/interval value/D1502/interval value/D1553
Thus, the complexity of encrypting/decrypting the key can be increased again, and the security of encryption/decryption can be further enhanced. It should be noted that the initialization step of fig. 3, the programming steps of fig. 4 and 5, and the step of generating the difference value by subtracting in fig. 6 can be performed by an electronic device or other suitable devices, for example, by a Central Processing Unit (CPU), a Microprocessor (MCU) or other suitable components of the electronic device.
As can be seen from the above-described embodiments of the present invention, the following advantages can be obtained by applying the present invention. The encryption and decryption key generation method disclosed by the embodiment of the invention generates the difference value as the encryption and decryption key by using the physical characteristics of the NAND flash memory, thereby improving the complexity of the encryption and decryption key. In addition, the present invention further adopts different reading sequences of the difference values, or adopts the limitation of the range of the difference values to filter out part of the difference values, thereby further increasing the complexity of the encryption/decryption key generated by the present invention.
Although the foregoing embodiments have been described with reference to specific embodiments, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention as defined in the following claims.

Claims (10)

1. A method for generating an encryption/decryption key includes the following steps:
selecting a block of a NAND flash memory;
initializing the block of the NAND flash memory;
programming the block of the NAND flash memory to obtain a plurality of first potentials of a plurality of memory cells in the block;
reinitializing the block of the NAND flash memory;
reprogramming the block of the NAND flash memory to obtain a plurality of second potentials of the memory cells in the block;
subtracting the first potentials and the second potentials of the memory units correspondingly to obtain a difference table; and
reading a plurality of difference values in the difference table according to a set sequence to be used as an encryption/decryption key.
2. The encryption/decryption key generating method of claim 1, wherein the step of initializing the block of the NAND flash memory comprises:
erasing information of the memory cells in the block of the NAND flash memory.
3. The encryption/decryption key generating method of claim 1, wherein the step of programming the block of the NAND flash memory comprises:
writing a high potential to the memory cells in the block of the NAND flash memory.
4. The encryption/decryption key generating method of claim 3, wherein the first voltage levels corresponding to the memory cells in the block are partially different.
5. The encryption/decryption key generating method of claim 4, wherein the step of reprogramming the block of the NAND flash memory comprises:
and rewriting the high potential into the memory cells in the block of the NAND flash memory.
6. The encryption/decryption key generating method of claim 5, wherein the second potential portions corresponding to the memory units in the block are different.
7. The method of claim 6, wherein the step of subtracting the first potentials and the second potentials of the memory units to obtain the difference table comprises the steps of:
correspondingly subtracting the first potential of a first memory unit of the memory units from the second potential of the first memory unit to obtain a first difference value;
correspondingly subtracting the first potential of a second memory unit of the memory units from the second potential of the second memory unit to obtain a second difference value; and
obtaining the difference table according to the first difference value and the second difference value.
8. The encryption/decryption key generating method of claim 7, wherein the memory cells in the block are arranged in a matrix, wherein a matrix cell formed by a row and a column of the matrix is used as a basic unit, the difference values appear once every a plurality of basic units, and the step of reading the difference values in the difference table according to the predetermined order as the encryption/decryption key comprises:
reading the difference values in the difference table according to the set sequence, and using the combination of the difference values and the numerical values of the basic units as the encryption and decryption key.
9. The method of claim 8, wherein the step of reading the difference values in the difference table according to the predetermined order as the encryption/decryption key comprises:
selectively reading the difference values corresponding to the same row of the matrix in the difference table, selectively reading the difference values corresponding to the same column of the matrix in the difference table, or selectively reading the difference values corresponding to any row and any column of the matrix in the difference table, and combining the read difference values with the numerical values of the basic units to be used as the encryption and decryption key.
10. The encryption/decryption key generating method of claim 7, wherein the step of reading the difference values in the difference table according to the predetermined order as the encryption/decryption key comprises:
setting a difference value range; and
reading the difference values in the difference table within the difference value range according to the set sequence to serve as the encryption and decryption key.
CN201811182627.8A 2018-10-11 2018-10-11 Encryption and decryption key generation method Active CN111046445B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201811182627.8A CN111046445B (en) 2018-10-11 2018-10-11 Encryption and decryption key generation method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201811182627.8A CN111046445B (en) 2018-10-11 2018-10-11 Encryption and decryption key generation method

Publications (2)

Publication Number Publication Date
CN111046445A true CN111046445A (en) 2020-04-21
CN111046445B CN111046445B (en) 2022-01-28

Family

ID=70229026

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201811182627.8A Active CN111046445B (en) 2018-10-11 2018-10-11 Encryption and decryption key generation method

Country Status (1)

Country Link
CN (1) CN111046445B (en)

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101371314A (en) * 2005-12-06 2009-02-18 桑迪士克股份有限公司 Reducing read disturb for non-volatile storage
TW201015322A (en) * 2008-10-08 2010-04-16 Ee Solutions Inc Method and system for data secured data recovery
TW201308966A (en) * 2011-08-15 2013-02-16 Phison Electronics Corp Key transport method, memory controller and memory storage apparatus
CN103839577A (en) * 2012-11-26 2014-06-04 英飞凌科技股份有限公司 Storage circuit
CN104579631A (en) * 2014-12-15 2015-04-29 天津大学 AES (Advanced Encryption Standard) secret key generation structure and method based on latch type voltage sensitive amplifier PUF (Physical Unclonable Function)
US9722774B2 (en) * 2015-04-29 2017-08-01 Samsung Electronics Co., Ltd. Non-leaky helper data: extracting unique cryptographic key from noisy F-PUF fingerprint
CN107819583A (en) * 2016-09-13 2018-03-20 渡边浩志 The anti-abuse technology of key

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101371314A (en) * 2005-12-06 2009-02-18 桑迪士克股份有限公司 Reducing read disturb for non-volatile storage
TW201015322A (en) * 2008-10-08 2010-04-16 Ee Solutions Inc Method and system for data secured data recovery
TW201308966A (en) * 2011-08-15 2013-02-16 Phison Electronics Corp Key transport method, memory controller and memory storage apparatus
CN103839577A (en) * 2012-11-26 2014-06-04 英飞凌科技股份有限公司 Storage circuit
CN104579631A (en) * 2014-12-15 2015-04-29 天津大学 AES (Advanced Encryption Standard) secret key generation structure and method based on latch type voltage sensitive amplifier PUF (Physical Unclonable Function)
US9722774B2 (en) * 2015-04-29 2017-08-01 Samsung Electronics Co., Ltd. Non-leaky helper data: extracting unique cryptographic key from noisy F-PUF fingerprint
CN107819583A (en) * 2016-09-13 2018-03-20 渡边浩志 The anti-abuse technology of key

Also Published As

Publication number Publication date
CN111046445B (en) 2022-01-28

Similar Documents

Publication Publication Date Title
EP2727277B1 (en) System and method for the secure transmission of data
WO2007071788A1 (en) Method for extracting random signatures from a material element and method for generating a decomposition base to implement the extraction method
US10069627B2 (en) Devices and methods for facilitating generation of cryptographic keys from a biometric
CN1278938A (en) Secure memory having anti-wire tapping
CN1648967A (en) Cryptographic apparatus, cryptographic method, and storage medium thereof
CN1296790C (en) Memory management unit code verifying device and code decoder
CN1714330A (en) Circuit arrangement with non-volatile memory module and method of en-/decrypting data in the non-volatile memory module
EP3465663A1 (en) Cryptographic device and memory based puf
US11449310B2 (en) Random number generator, encryption/decryption secret key generator and method based on characteristics of memory cells
Jia et al. Extracting robust keys from NAND flash physical unclonable functions
CN107220547A (en) Terminal device and its startup method
ITTO20120462A1 (en) SYSTEM AND METHOD OF PROTECTION OF INFORMATION DATA
CN101042683A (en) Method and apparatus for binding computer memory to motherboard
CN109765856A (en) The method of security logic system and safe operation flogic system
CN1991870A (en) Preventing method and preventing system for data deletion
US20210051010A1 (en) Memory Device Providing Data Security
CN1279458C (en) Data encrypting/de-encrypling method and its device
CN112069551A (en) Electronic circuit
CN111046445B (en) Encryption and decryption key generation method
CN103413097A (en) Encryption method, encryption device and security chip
CN1306424C (en) Portable information processor having password code checking function
EP3284066A1 (en) Multi-factor authentication using a combined secure pattern
WO2015110899A1 (en) Method of protecting secret data when used in a cryptographic algorithm
DE102008057681B3 (en) Method for the secure storage of data in a memory of a portable data carrier
TWI700757B (en) Encryption and decryption secret key generation method

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant