CN111044772A - Current sampling circuit and control method - Google Patents
Current sampling circuit and control method Download PDFInfo
- Publication number
- CN111044772A CN111044772A CN201911418280.7A CN201911418280A CN111044772A CN 111044772 A CN111044772 A CN 111044772A CN 201911418280 A CN201911418280 A CN 201911418280A CN 111044772 A CN111044772 A CN 111044772A
- Authority
- CN
- China
- Prior art keywords
- sampling
- current
- circuit
- switch
- resistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/0092—Arrangements for measuring currents or voltages or for indicating presence or sign thereof measuring current only
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
- H02M1/322—Means for rapidly discharging a capacitor of the converter for protecting electrical components or for preventing electrical shock
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
Abstract
A current sampling circuit comprises a first primary winding, a first secondary winding, a first sampling resistor, a first sampling switch and a first sampling capacitor, wherein the first primary winding is connected in series at a detected position of a main circuit, the homonymous end of the first secondary winding is connected with one end of the first sampling resistor, the other end of the first sampling resistor is connected with one end of the first sampling capacitor and one end of the first sampling switch, the connection point is also used as the output end of the current sampling circuit, and the other end of the first sampling capacitor, the other end of the first sampling switch and the synonym end of the first secondary winding are simultaneously connected to a ground reference end. The invention provides a novel current sampling circuit which adopts an isolation sampling mode and is not influenced by a reference ground.
Description
Technical Field
The present invention relates to a sampling circuit, and more particularly, to a current sampling circuit and a current sampling control method in a sampling circuit.
Background
In the field of power supply, a common method for controlling and protecting sampled current is to sample current, and for current sampling, resistance sampling, hall chip sampling and current transformer sampling are generally adopted. The resistor sampling cost is lowest, the application is largest, but the loss is larger when the current is large, and the reference potential of the sampling signal needs to be consistent with the reference potential of the control chip, so that the resistor sampling is obviously limited under certain conditions (such as totem bridgeless PFC); the Hall chip sampling is not limited to a reference ground, but has high cost and small bandwidth, and can only be used for detecting average current generally; the current transformer has small sampling loss, is not limited by a reference ground, is flexible to apply, has relatively low cost, and is a current sampling scheme which is extremely widely applied at present.
Fig. 1 shows a conventional circuit for sampling current by using resistors, which includes a switching tube Q1, a sampling resistor Rs1, and a switching tube control signal SW 1. When the switch tube control signal SW1 controls the switch tube Q1 to be conducted, the current flows through Rs1 to form a current sampling signal Cs 1.
Fig. 2 shows a sampling signal waveform Cs1 of the current sampling circuit shown in fig. 1, which is formed by the current passing through the sampling resistor Rs1 under the condition that the switch control signal SW1 controls the switch Q1 to be turned on. The direction indicated by the arrow in the figure is a current reference direction, and the sampling mode can realize the sampling of positive and negative currents, but when a large current flows, the sampling mode causes large loss, and needs to be processed with the same ground of a chip, and if the sampling mode is in a floating condition, isolation sampling is needed, which increases the complexity of current sampling.
Fig. 3 shows a conventional current sampling circuit using a current transformer, which includes a switch Q1, a current transformer CT1, a transformer primary winding P1, a transformer secondary winding S1, a demagnetization inductor Lm1, a sampling resistor Rs1, a demagnetization resistor Rc1, and a diode D1, where two ends of the primary winding P1 are two input ends of the current sampling circuit, one end of the secondary winding S1 connected in parallel with the demagnetization circuit is connected to an anode of the diode D1, and the other end is grounded, the demagnetization circuit is formed by connecting the demagnetization inductor Lm and the demagnetization resistor Rc1 in parallel and is used for demagnetizing the CT1, a cathode of the diode D1 is connected to one end of the sampling resistor Rs1, and the other end of the sampling resistor Rs1 is grounded, and the direction shown in the drawing is a current reference direction. Generally, when the switch control signal SW1 controls the switch tube to be turned on, if there is a current flowing through the primary winding P1 in the current direction shown in the figure, the secondary winding S1 induces a current to flow through the diode D1, and generates a sampling signal Cs after passing through the sampling resistor Rs1, and then the inductor Lm1 is excited. When the switch control signal SW1 controls the switch to turn off, the current flowing through the primary winding P1 disappears, and the secondary winding S1 induces a current to demagnetize and reset the inductor Lm1 through the Rc 1.
Fig. 4 shows a sampling signal waveform Cs1 formed by the sampling current flowing through the sampling resistor Rs1 when the switch control signal SW1 controls the switch Q1 to be turned on in the current sampling circuit shown in fig. 3. Generally, the value of the demagnetization resistor Rc1 is usually k Ω, the value of the demagnetization resistor Rc1 is usually tens of times that of the sampling resistor, and the value of the demagnetization resistor Rc1 is far larger than that of Rs1, when a negative current passes through the primary winding P1 of the transformer, because the diode D1 is turned off in the reverse direction, the negative current generates a large negative voltage (usually hundreds of V) on the resistor Rc1, if the voltage does not cause the diode D1 to break down in the reverse direction, a large exciting current is formed on the exciting inductance of the transformer CT1, the exciting current is demagnetized through the diode D1 and the resistor Rs1, the demagnetization problem exists, the transformer CT1 is saturated in several cycles instead of one cycle, the sampling loss is increased, and meanwhile, a false triggering signal is generated. There is thus a need for an alternative solution from the point of view of current sampling control that avoids the above-mentioned problems.
Disclosure of Invention
The invention aims to provide a current sampling circuit and a control mode thereof, wherein the sampling circuit utilizes an isolation sampling mode, integrates the advantages of common transformer sampling and resistance sampling, is not influenced by a reference ground, and can perform sampling by the current sampling circuit even when positive and negative currents flow through a detection position.
To solve the technical problems, the technical scheme adopted by the invention is as follows:
a current sampling circuit comprises a first primary winding, a first secondary winding, a first sampling resistor, a first sampling switch and a first sampling capacitor, wherein the first primary winding is connected in series at a detected position of a main circuit, the homonymous end of the first secondary winding is connected with one end of the first sampling resistor, the other end of the first sampling resistor is connected with one end of the first sampling capacitor and one end of the first sampling switch, the connection point is also used as the output end of the current sampling circuit, and the other end of the first sampling capacitor, the other end of the first sampling switch and the synonym end of the first secondary winding are simultaneously connected to a ground reference end.
Preferably, the current sampling circuit adopts two combined circuits, which are a first current sampling circuit and a second current sampling circuit respectively, and further comprises a first voltage-dividing resistor and a second voltage-dividing resistor connected between the output end of the first current sampling circuit and the output end of the second current sampling circuit, the first voltage-dividing resistor and the second voltage-dividing resistor are connected in series, and the series connection point of the first voltage-dividing resistor and the second voltage-dividing resistor is led out as the output ends of the two combined current sampling circuits.
Preferably, the sampling switch is an MOS transistor, a gate of the MOS transistor is a control end of the sampling switch, a source of the MOS transistor is a reference end of the sampling switch, and a drain of the MOS transistor is an anode port of the sampling switch.
The invention also provides a current sampling control method, which comprises the following steps: when the main circuit works as a direct-current input voltage, when a forward increasing current flows through a first primary winding of the current sampling circuit, a first sampling control signal controls a first sampling switch to be turned off, and at the moment, the current generated by the first secondary winding of the current sampling circuit is charged to a first sampling capacitor through a first sampling resistor to form a forward sampling voltage signal; when the forward current flowing through the first primary winding of the current sampling circuit is increased to a set threshold value, the first sampling control signal controls the first sampling switch to be conducted, and two ends of the first sampling capacitor are in short circuit with the ground reference end; when the current flowing through the first primary winding of the current sampling circuit is reduced to a set threshold value, the first sampling control signal controls the first sampling switch to be switched off, and when the current flowing through the first primary winding is negative current, the current induced by the first secondary winding of the current sampling circuit reversely charges the first sampling capacitor to form a negative sampling voltage signal.
Preferably, when the main circuit is used as an ac input voltage, two current sampling circuits are used in combination, and according to the polarity of the input voltage, when one current sampling circuit is controlled to operate by one sampling control signal, the other sampling control signal controls the sampling switch of the other current sampling circuit to be always in a shielded state.
The invention further provides a BOOST PFC circuit capable of realizing zero voltage conduction of a main switching tube, which comprises the current sampling circuit.
The invention also provides a totem bridgeless PFC circuit, which comprises the current sampling circuit.
Compared with the prior art, the invention has the following beneficial effects:
1. the invention provides a novel current sampling circuit which adopts an isolation sampling mode and is not influenced by a reference ground. The sampling switch controlled by the control signal controls the sampling loop, when the inductive current of the first primary winding of the sampling circuit is positively increased, the control signal controls the sampling switch to be switched off, and at the moment, the first sampling capacitor is positively charged through the sampling resistor to sample the current of the primary winding of the current transformer. Even if negative current exists in the current transformer, accurate sampling can be carried out through the current transformer sampling circuit, and the saturation condition cannot exist.
2. The invention can realize that the current of the primary winding of the mutual inductor can be sampled when the positive half period and the negative half period of the AC input in the totem bridgeless PFC circuit are switched by combining the two sampling circuits.
3. The current sampling can be performed on both positive and negative currents flowing.
4. The circuit is simple, and the sampling switch control signal is easy to realize.
Interpretation of terms:
anode terminal: a port into which current flows in accordance with a reference direction;
a cathode terminal: a port for current flowing outwards according with the reference direction;
a control terminal: and inputting a control signal to control the on and off ports of the sampling switch.
Drawings
FIG. 1 is a schematic diagram of a conventional circuit for sampling current by using a resistor;
FIG. 2 is a schematic diagram of a sampling control timing sequence and effect of the prior art resistive sampling circuit of FIG. 1;
FIG. 3 is a schematic diagram of a conventional current sampling circuit using a transformer;
FIG. 4 is a schematic diagram of a sampling control timing sequence and effect of the prior art transformer sampling circuit scheme shown in FIG. 3;
FIG. 5 is a schematic circuit diagram of a current sampling circuit according to a first embodiment of the present invention;
FIG. 6-a is a schematic diagram illustrating the operation of the current sampling circuit according to the first embodiment of the present invention when a forward current flows through the first primary winding;
FIG. 6-b is a schematic diagram illustrating the operation of the current sampling circuit according to the first embodiment of the present invention when a negative current flows through the first primary winding;
FIG. 7 is a timing diagram of the sampling control signal Vgs1, the first primary winding current waveform, and the voltage sampling signal V _ Cs1 on the first sampling capacitor C1 of FIGS. 6-a and 6-b;
fig. 8 is a schematic circuit diagram of a current sampling circuit applied to a BOOST PFC circuit to achieve zero voltage conduction according to a first embodiment of the present invention;
FIG. 9 is a schematic diagram illustrating the operation of the current sampling circuit for detecting a forward current according to the first embodiment of the present invention;
FIG. 10 is a diagram illustrating the operation of the current sampling circuit for detecting a negative current according to the first embodiment of the present invention;
FIG. 11 is a schematic diagram illustrating the timing and effect of control signals in the circuit of FIG. 8;
FIG. 12 is a circuit schematic of a current sampling circuit according to a second embodiment of the present invention;
fig. 13 is a schematic circuit diagram of a current sampling circuit according to a second embodiment of the present invention, which is applied to a totem bridgeless PFC;
fig. 14 is a control timing diagram of the totem bridgeless PFC circuit according to the second embodiment of the present invention;
fig. 15a is a control timing and key node waveforms of a totem bridgeless PFC circuit during a positive half cycle of an ac input according to a second embodiment of the present invention;
fig. 15b is a diagram illustrating the control timing and key node waveforms of the totem bridgeless PFC circuit during the negative half cycle of the ac input according to the second embodiment of the present invention;
fig. 16a shows a point sampling signal V _ Cs in the first and second voltage dividing resistors and a current sampling signal V _ Cs1 on the first sampling capacitor in fig. 15 a;
fig. 16b shows a point sampling signal V _ Cs in the first and second voltage dividing resistors and a current sampling signal V _ Cs2 in the second sampling capacitor in fig. 15 b.
Detailed Description
Embodiments of the present invention will be described in further detail below with reference to the accompanying drawings.
First embodiment
Fig. 5 shows a current sampling circuit according to a first embodiment of the present invention, which includes a first primary winding P1, a first secondary winding S1, a first sampling resistor Rs1, a first sampling capacitor C1, and a first sampling MOS transistor M1, wherein when in use, the first primary winding P1 is connected in series to a corresponding position to be detected in the middle of a main circuit to be detected.
As shown in fig. 5, in the current sampling circuit of the present invention, the end 2 of the first primary winding and the end 3 of the first secondary winding are homonymous ends, one end of the first sampling resistor Rs1 is connected to the end 3 of the first secondary winding S1, the other end of the first resistor Rs1 is connected to the drain of the first sampling MOS transistor M1, the first sampling MOS transistor M1 is connected in parallel to the first sampling capacitor C1, and the end 4 of the first secondary winding S2, the source of the first sampling MOS transistor and one end of the first sampling capacitor C1 are both connected to ground. The first control signal Vgs1 is connected to the G-pole of the first sampling MOS transistor M1, and controls the switching of the first sampling MOS transistor M1.
When the main circuit is used as a direct current input voltage, the working principle of the current sampling circuit is analyzed as follows:
as shown in fig. 6a, when a forward increasing current flows through the first primary winding P1, the first control signal Vgs1 controls the first sampling MOS transistor M1 to turn off, and at this time, the current induced by the first secondary winding S1 charges the first sampling capacitor C1 through the first sampling resistor Rs1, so as to form a forward sampling voltage signal Cs 1. When the forward current flowing through the first primary winding P1 increases to the maximum value, the first control signal Vgs1 controls the first sampling MOS transistor M1 to be conductive, and the first sampling capacitor C1 is short-circuited to ground. When the current flowing through the first primary winding drops to a certain set threshold value, the first control signal Vgs1 controls the first sampling MOS tube M1 to be switched off.
As shown in fig. 6b, when the current flowing through the first primary winding P1 drops to a certain set threshold from the forward current, the first control signal Vgs1 controls the first sampling MOS transistor M1 to turn off. At this time, when a negative current flows through the first primary winding P1, the current induced by the first secondary winding S1 charges the first sampling capacitor C1 in the opposite direction, so as to form a negative sampling voltage signal Cs1, which can collect a negative current sampling signal.
Fig. 7 shows a timing diagram of the first control signal Vgs1, a current waveform of the first primary winding P1 and a voltage sampling signal V _ Cs1 on the first sampling capacitor C1 in fig. 6a and 6 b.
As shown in fig. 8, which is a schematic diagram of a current sampling circuit according to the first embodiment applied to a conventional BOOST PFC circuit for sampling, the first sampling switch M1 is preferably an N-type MOS transistor. The sampling circuit comprises a first sampling resistor Rs1, a first sampling capacitor C1 and a first sampling MOS tube M1, wherein one end of the first sampling resistor is connected with the end 2 of the first secondary winding, and the other end of the first sampling resistor is connected with the drain end of the sampling MOS tube M1 and one end of the sampling capacitor. The other end of the sampling capacitor is connected with the source electrode of the sampling MOS tube M1 and is connected to the ground. After the input AC is rectified by the rectifier bridge, the '+' end of the rectifier bridge is connected to the dotted end 2 end of the first primary winding P1, and the unlike end 1 end of the first primary winding is connected to the source electrode of the MOS transistor S2 and the drain electrode of the MOS transistor S1. The source of the MOS transistor S1 is connected to ground, and the source of the MOS transistor S2 is connected to one end of the output capacitor Co and the output load R _ load. The other end of the output capacitor Co and the output load R _ load are connected to the ground, and besides the above, a ZCD zero-crossing detection circuit is provided. The first sampling control signal Vgs1 controls the sampling switch M1, the control signal SW1 controls the switching of the MOS transistor S1, and the control signal SW2 controls the switching of the MOS transistor S2.
As shown in FIG. 9, when the control signal SW1 controls the MOS transistor S1 to be turned on and the control signal SW2 controls the MOS transistor S2 to be turned off, the input voltage V is setinIs added on a first primary winding P1 of the sampling circuit, when the first primary winding is excited, the current change rate is
Simultaneously setting the turn ratio of the first primary winding P1 to the first secondary winding S1 as NP1:NS1When the first control signal Vgs1 controls the first sampling switch M ═ M1 is turned off, and the current charging the first sampling capacitor C1 is according to the turn ratio relation
This current charges the first sampling capacitor C1 to form the sampled voltage signal V _ Cs 1. When the forward current flowing through the first primary winding P1 increases to a certain set threshold, the first control sampling signal Vgs1 controls the sampling switch M1 to be turned on and connected to ground, and the sampled voltage on the sampling capacitor C1 is rapidly discharged to zero. Meanwhile, the control signal SW1 controls the MOS transistor S1 to be turned off, the control signal SW2 controls the MOS transistor S2 to be turned on, and the voltage loaded on the first primary winding P1 is V at the momentin-VoThe first primary winding P1 is demagnetized at a current change rate of
The forward current begins to drop. When the primary side forward current flowing through the current transformer is reduced to zero, the zero-crossing detection circuit generates a ZCD signal, and the ZCD signal enables the first control signal Vgs1 to control the sampling switch M1 to be turned off.
As shown in fig. 10, when the forward current flowing through the primary winding drops to zero, the first control signal Vgs1 controls the sampling switch M1 to turn off, and the control signal SW1 controls the MOS transistor S1 to turn off. The control signal SW2 controls the MOS transistor S2 to be turned on continuously, so that a negative current flows through the first primary winding P1, and at this time, the induced current induced by the first secondary winding S1 charges the C1 in the opposite direction, so as to form a sampled voltage signal Cs1, which can collect a negative current sampled signal.
Fig. 11 shows a timing diagram of the control signals SW1, SW2, Vgs of the circuit in fig. 8, a current waveform of the first primary winding P1, and a voltage sampling signal V _ Cs1 on the sampling capacitor C1.
Second embodiment
Fig. 12 shows a current sampling circuit according to a second embodiment of the present invention, compared with the circuit according to the first embodiment, the second embodiment adopts a combination of two current sampling circuits, that is, one current sampling circuit is added, and the circuit structures are the same except that the winding current direction is opposite. The current sampling circuit comprises a second secondary winding S2, a second sampling resistor Rs2, a second sampling capacitor C2, a second sampling switch M2, a second control signal Vgs2, a first voltage-dividing resistor R1 and a second voltage-dividing resistor R2. The 1 terminal of the first primary winding P1, the 8 terminal of the first secondary winding S1, and the 5 terminal of the second secondary winding S2 are homonymous terminals. One end of a second sampling resistor Rs2 is connected to the 5 end of the second secondary winding S2, the other end of the second sampling resistor Rs2 is connected to the drain of the second sampling switch M2 and one end of a second sampling capacitor, and the source of the second sampling switch M2 and the other end of the second sampling capacitor are both connected to ground. One end of the first sampling capacitor C1 is connected in series with the second divider resistor R2 via the first divider resistor R1 to the second sampling capacitor C2. The midpoint voltage between the first voltage-dividing resistor R1 and the second voltage-dividing resistor R2 is the sampling signal Cs.
Fig. 13 is a schematic diagram of a circuit in which a current sampling circuit according to a second embodiment of the present invention is applied to a totem-bridge-less PFC circuit for sampling, where a first primary winding P1 is a boost inductor, the totem-bridge-less PFC circuit includes, in addition to the sampling circuit according to the second embodiment, an input voltage VAC, a switching tube S1, a switching tube S2, a diode D1, a diode D2, a ZCD zero-crossing detection circuit, a filter capacitor Co, and a Load R _ Load, where the switching tubes S1 and S2 are connected in series to form a first switching arm, the diode D1 and the diode D2 are connected in series to form a second rectifying arm, the switching arm, the rectifying arm, the filter capacitor, and the output Load are connected in parallel, one end of an input power VAC is coupled to a midpoint of the first switching arm through the first primary winding P1, and the other end of the VAC is directly coupled. The first sampling control signal Vgs1 of the current sampling circuit controls the switch current at which the loop of the first sampling switch M1 detects the input of the positive half cycle of VAC. The second sampling control signal Vgs2 of the current sampling circuit controls the switch current at the time when the loop of the second sampling switch M2 detects the negative half-cycle input of VAC.
Fig. 14 is a timing diagram of control signals applied to a totem bridgeless PFC circuit by the current sampling circuit according to the second embodiment of the present invention.
Fig. 15a shows the control timing of the current sampling circuit according to the second embodiment of the present invention during the AC positive half cycle. Current sampling is achieved by a first current sampling circuit controlled by a first sampling control signal Vgs1 during the AC positive half cycle, and a second current sampling circuit controlled by a second sampling control signal Vgs2 is in a shielded state. When the first switch signal SW1 controls the switch tube S1 to be turned on, the second switch signal SW2 controls the switch tube S2 to be turned off. The current I _ P1 flowing through the first primary winding P1 rises. At this time, the first sampling control signal Vgs1 controls the first sampling switch M1 to turn off, the voltage on the first sampling capacitor C1 rises linearly, and the current signal V _ cs1 is sampled. In the process, the second sampling control signal Vgs2 controls the second sampling switch M2 to be always turned on to be in a shielded state, and the two ends of the second sampling capacitor C2 are connected to the ground. Meanwhile, one end of the first sampling capacitor C1 is connected in series with the second divider resistor R2 to the second sampling capacitor C2 through the first divider resistor R1. The midpoint voltage between the first voltage-dividing resistor R1 and the second voltage-dividing resistor R2 is the sampling signal Cs. When the current I _ P1 of the first primary winding P1 rises to a set threshold, the first switching signal SW1 controls the switching tube S1 to turn off, the second switching signal SW2 controls the switching tube S2 to turn on, the current I _ P1 flowing through the first primary winding P1 falls, the first sampling control signal Vgs1 controls the first sampling switch M1 to turn on, and two ends of the first sampling capacitor C1 are connected to the ground. When the current I _ P1 flowing through the first primary winding P1 drops to zero, the first sampling control signal Vgs1 controls the first sampling switch M1 to turn off. At this time, the second switch signal SW2 controls the switch tube S2 to be turned on continuously, so that a negative current is generated, the voltage V _ cs1 of the first sampling capacitor C1 linearly decreases, and the voltage signal is sampled.
Fig. 15b shows the control timing of the current sampling circuit of example two of the present invention during the AC negative half cycle. The second current sampling circuit controlled by the second sampling control signal Vgs2 is used for realizing current sampling in the AC negative half period, and the first current sampling circuit controlled by the first sampling control signal Vgs1 is in a shielded state. When the second switch signal SW2 controls the switch tube S2 to be turned on, the first switch signal SW1 controls the switch tube S1 to be turned off. The current I _ P1 flowing through the first primary winding P1 rises. At this time, the second sampling control signal Vgs2 controls the second sampling switch M2 to turn off, the voltage on the second sampling capacitor C2 rises linearly, and the current signal V _ cs2 is sampled. In the process, the first sampling control signal Vgs1 controls the first sampling switch M1 to be always turned on to be in a shielded state, and two ends of the first sampling capacitor C1 are shorted to the ground. Meanwhile, one end of the second sampling capacitor C2 is connected in series with the second divider resistor R2 to the first sampling capacitor C1 through the first divider resistor R1. The midpoint voltage between the first voltage-dividing resistor R1 and the second voltage-dividing resistor R2 is the sampling signal Cs. When the current I _ P1 flowing through the first primary winding P1 rises to a set threshold, the second switching signal SW2 controls the switching tube S2 to be turned off, and the first switching signal SW1 controls the switching tube S1 to be turned on. At this time, the current I _ P1 flowing through the first primary winding P1 drops, and the second sampling control signal Vgs2 controls the first sampling switch M2 to be turned on, and the two ends of the second sampling capacitor C2 are connected to ground. When the current I _ P1 flowing through the first primary winding P1 drops to zero, the second sampling control signal Vgs2 controls the second sampling switch M2 to turn off. At this time, the first switch signal SW1 controls the switch tube S1 to be turned on continuously, so that a negative current is generated, the voltage V _ cs2 of the second sampling capacitor C2 linearly decreases, and the voltage signal is sampled.
Fig. 16a shows the point sampling signal Cs in the first dividing resistor and the second dividing resistor and the C1 current sampling signal in the first sampling capacitor when the first dividing resistor and the second dividing resistor are equal in value in fig. 15 a.
Fig. 16b shows the point sampling signal Cs in the first dividing resistor and the second dividing resistor and the C2 current sampling signal in the second sampling capacitor when the first dividing resistor and the second dividing resistor are equal in value in fig. 15 b.
The above-described embodiments of the present invention are not intended to limit the scope of the present invention, and the embodiments of the present invention are not limited thereto, and various other modifications, substitutions and alterations can be made to the above-described structure of the present invention without departing from the basic technical concept of the present invention as described above, according to the common technical knowledge and conventional means in the field of the present invention.
Claims (7)
1. A current sampling circuit, characterized by: the current sampling circuit comprises a first primary winding, a first secondary winding, a first sampling resistor, a first sampling switch and a first sampling capacitor, wherein the first primary winding is connected to a detected position of a main circuit in series, the homonymous end of the first secondary winding is connected with one end of the first sampling resistor, the other end of the first sampling resistor is connected with one end of the first sampling capacitor and one end of the first sampling switch, the connection point is also used as the output end of the current sampling circuit, and the other end of the first sampling capacitor, the other end of the first sampling switch and the synonym end of the first secondary winding are simultaneously connected to a ground reference end.
2. The current sampling circuit of claim 1, wherein: the current sampling circuit adopts two combined use, which are respectively a first current sampling circuit and a second current sampling circuit, and also comprises a first divider resistor and a second divider resistor which are connected between the output end of the first current sampling circuit and the output end of the second current sampling circuit, wherein the first divider resistor and the second divider resistor are connected in series, and the series connection point of the first divider resistor and the second divider resistor is led out to be the output ends of the two combined current sampling circuits.
3. The current sampling circuit of claim 1 or 2, wherein: the sampling switch is an MOS tube, the grid electrode of the MOS tube is the control end of the sampling switch, the source electrode of the MOS tube is the reference end of the sampling switch, and the drain electrode of the MOS tube is the anode port of the sampling switch.
4. A current sampling control method comprises the following steps: when the main circuit is operating as a dc input voltage,
when a forward increasing current flows through a first primary winding of a current sampling circuit, a first sampling control signal controls a first sampling switch to be switched off, and at the moment, the current induced by the first secondary winding of the current sampling circuit charges a first sampling capacitor through a first sampling resistor to form a forward sampling voltage signal;
when the forward current flowing through the first primary winding of the current sampling circuit is increased to a set threshold value, the first sampling control signal controls the first sampling switch to be conducted, and two ends of the first sampling capacitor are in short circuit with the ground reference end;
when the current flowing through the first primary winding of the current sampling circuit is reduced to a set threshold value, the first sampling control signal controls the first sampling switch to be switched off, and when the current flowing through the first primary winding is negative current, the current induced by the first secondary winding of the current sampling circuit reversely charges the first sampling capacitor to form a negative sampling voltage signal.
5. The current sampling control method according to claim 4, characterized in that: when the main circuit works as an alternating current input voltage, the two current sampling circuits are combined for use, and according to the polarity of the input voltage, when one current sampling circuit is controlled to work by one sampling control signal, the other sampling control signal controls the sampling switch of the other current sampling circuit to be always in a shielded state.
6. The utility model provides a can realize BOOST PFC circuit that main switch tube zero voltage switched on which characterized in that: comprising a current sampling circuit according to claim 1 or 3.
7. A totem bridgeless PFC circuit is characterized in that: comprising a current sampling circuit according to claim 2 or 3.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911418280.7A CN111044772B (en) | 2019-12-31 | 2019-12-31 | Current sampling circuit and control method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911418280.7A CN111044772B (en) | 2019-12-31 | 2019-12-31 | Current sampling circuit and control method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN111044772A true CN111044772A (en) | 2020-04-21 |
| CN111044772B CN111044772B (en) | 2022-05-20 |
Family
ID=70243064
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201911418280.7A Active CN111044772B (en) | 2019-12-31 | 2019-12-31 | Current sampling circuit and control method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN111044772B (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111669043A (en) * | 2020-06-22 | 2020-09-15 | 珠海格力电器股份有限公司 | Control device of PFC circuit, PFC circuit and control method thereof |
| CN114204797A (en) * | 2021-12-15 | 2022-03-18 | 杭州优特电源有限公司 | Continuous mode bridgeless power factor correction control circuit |
Citations (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20060026701A (en) * | 2004-09-21 | 2006-03-24 | 페어차일드코리아반도체 주식회사 | Power factor correction circuit |
| CN101286415A (en) * | 2008-01-29 | 2008-10-15 | 艾默生网络能源有限公司 | A bidirectional sample and reset circuit for a current mutual inductor |
| JP2012217247A (en) * | 2011-03-31 | 2012-11-08 | Semiconductor Components Industries Llc | Power-supply circuit |
| CN102843025A (en) * | 2012-08-06 | 2012-12-26 | 台达电子工业股份有限公司 | Control circuit, control method, and power supply system for power factor correction (PFC) circuit |
| CN103490605A (en) * | 2013-10-12 | 2014-01-01 | 成都芯源系统有限公司 | Isolated switch converter and controller and control method thereof |
| CN104237615A (en) * | 2013-06-09 | 2014-12-24 | 中兴通讯股份有限公司 | Current zero-crossing detection device, signal acquisition circuit and circuit system |
| CN104360143A (en) * | 2014-12-04 | 2015-02-18 | 杰华特微电子（杭州）有限公司 | Load zero crossing point detection circuit and method and load voltage detection circuit and method |
| CN105004910A (en) * | 2014-04-22 | 2015-10-28 | 中兴通讯股份有限公司 | Current detection method and apparatus of PFC inductor |
| CN105305848A (en) * | 2014-07-22 | 2016-02-03 | 株式会社村田制作所 | Boost inductor demagnetization detection for bridgeless boost pfc converter operating in boundary-conduction mode |
| CN106130325A (en) * | 2016-07-13 | 2016-11-16 | 成都芯源系统有限公司 | Noise reduction switch converter, control circuit and method |
| CN107395022A (en) * | 2017-07-25 | 2017-11-24 | 杭州士兰微电子股份有限公司 | Mode of resonance switch converters and its control method |
| CN107612326A (en) * | 2017-08-30 | 2018-01-19 | 中南大学 | A kind of Sofe Switch modulator approach of two-way tandem type Buck Boosts |
| US20180287488A1 (en) * | 2017-03-29 | 2018-10-04 | Murata Manufacturing Co., Ltd. | Power factor correction device, and current sensing method and apparatus thereof |
| EP3484033A1 (en) * | 2017-11-14 | 2019-05-15 | Delta Electronics (Thailand) Public Co., Ltd. | Current measurement circuit |
| US20190260290A1 (en) * | 2018-02-19 | 2019-08-22 | Rohm Co., Ltd. | Switching power supply |
| EP3540448A1 (en) * | 2018-03-14 | 2019-09-18 | Fico Triad, S.A. | Electronic device with pfc circuit and method for measuring alternating current input to the electronic device |
| CN110308315A (en) * | 2019-07-30 | 2019-10-08 | 广州金升阳科技有限公司 | A kind of current transformer sample circuit |
-
2019
- 2019-12-31 CN CN201911418280.7A patent/CN111044772B/en active Active
Patent Citations (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20060026701A (en) * | 2004-09-21 | 2006-03-24 | 페어차일드코리아반도체 주식회사 | Power factor correction circuit |
| CN101286415A (en) * | 2008-01-29 | 2008-10-15 | 艾默生网络能源有限公司 | A bidirectional sample and reset circuit for a current mutual inductor |
| JP2012217247A (en) * | 2011-03-31 | 2012-11-08 | Semiconductor Components Industries Llc | Power-supply circuit |
| CN102843025A (en) * | 2012-08-06 | 2012-12-26 | 台达电子工业股份有限公司 | Control circuit, control method, and power supply system for power factor correction (PFC) circuit |
| CN104237615A (en) * | 2013-06-09 | 2014-12-24 | 中兴通讯股份有限公司 | Current zero-crossing detection device, signal acquisition circuit and circuit system |
| CN103490605A (en) * | 2013-10-12 | 2014-01-01 | 成都芯源系统有限公司 | Isolated switch converter and controller and control method thereof |
| CN105004910A (en) * | 2014-04-22 | 2015-10-28 | 中兴通讯股份有限公司 | Current detection method and apparatus of PFC inductor |
| CN105305848A (en) * | 2014-07-22 | 2016-02-03 | 株式会社村田制作所 | Boost inductor demagnetization detection for bridgeless boost pfc converter operating in boundary-conduction mode |
| CN104360143A (en) * | 2014-12-04 | 2015-02-18 | 杰华特微电子（杭州）有限公司 | Load zero crossing point detection circuit and method and load voltage detection circuit and method |
| CN106130325A (en) * | 2016-07-13 | 2016-11-16 | 成都芯源系统有限公司 | Noise reduction switch converter, control circuit and method |
| US20180287488A1 (en) * | 2017-03-29 | 2018-10-04 | Murata Manufacturing Co., Ltd. | Power factor correction device, and current sensing method and apparatus thereof |
| CN108663558A (en) * | 2017-03-29 | 2018-10-16 | 株式会社村田制作所 | A kind of PFC equipment and its electric current detecting method and current sensing means |
| CN107395022A (en) * | 2017-07-25 | 2017-11-24 | 杭州士兰微电子股份有限公司 | Mode of resonance switch converters and its control method |
| CN107612326A (en) * | 2017-08-30 | 2018-01-19 | 中南大学 | A kind of Sofe Switch modulator approach of two-way tandem type Buck Boosts |
| EP3484033A1 (en) * | 2017-11-14 | 2019-05-15 | Delta Electronics (Thailand) Public Co., Ltd. | Current measurement circuit |
| US20190260290A1 (en) * | 2018-02-19 | 2019-08-22 | Rohm Co., Ltd. | Switching power supply |
| EP3540448A1 (en) * | 2018-03-14 | 2019-09-18 | Fico Triad, S.A. | Electronic device with pfc circuit and method for measuring alternating current input to the electronic device |
| CN110308315A (en) * | 2019-07-30 | 2019-10-08 | 广州金升阳科技有限公司 | A kind of current transformer sample circuit |
Non-Patent Citations (2)
| Title |
|---|
| 张晓峰 吕征宇: "混合动力车用全数字电流控制型双向DC/DC变换器", 《电工技术学报》 * |
| 胡玮等: "一种含回路二极管双Boost PFC电路", 《电力电子技术》 * |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111669043A (en) * | 2020-06-22 | 2020-09-15 | 珠海格力电器股份有限公司 | Control device of PFC circuit, PFC circuit and control method thereof |
| CN114204797A (en) * | 2021-12-15 | 2022-03-18 | 杭州优特电源有限公司 | Continuous mode bridgeless power factor correction control circuit |
| CN114204797B (en) * | 2021-12-15 | 2023-11-21 | 杭州优特电源有限公司 | Bridgeless power factor correction circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| CN111044772B (en) | 2022-05-20 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101552546B (en) | Bridgeless power factor circuit correcting circuit system used for critical conduction mode and control method thereof | |
| CN103716965B (en) | LED driving device and control circuit and output current detection circuit thereof | |
| CN110365203B (en) | Current sampling circuit, current zero-crossing detection circuit, totem-pole bridgeless PFC circuit and control method thereof | |
| US10199949B1 (en) | Active-clamp flyback circuit and control method thereof | |
| US9997994B1 (en) | Totem-pole power factor corrector and current-sampling unit thereof | |
| CN214506884U (en) | Power converter and power control chip | |
| CN101860189A (en) | Bridgeless power factor correcting circuit for critical continuous current mode and method thereof | |
| CN110308315A (en) | A kind of current transformer sample circuit | |
| CN111044772B (en) | Current sampling circuit and control method | |
| CN111327186A (en) | Inductive current zero-crossing detection method of bridgeless power factor correction circuit | |
| CN112865546A (en) | Power converter and power supply control method and power supply control chip thereof | |
| CN1276574C (en) | Current driven synchronous rectifier with energy recovery using hysteresis driver | |
| WO2022253279A1 (en) | Current sampling circuit applied to bidirectional ac-dc converter | |
| CN103424602A (en) | Secondary winding current detection circuit based on source electrode drive | |
| CN104702095A (en) | Switching power supply controller and switching power supply comprising switching power supply controller | |
| CN102480221A (en) | Application method of PFC (power factor correction) controller in Buck circuit | |
| CN113030554A (en) | Zero current detection circuit and detection method thereof | |
| EP0649214A2 (en) | High efficiency switch mode regulator | |
| CN204442169U (en) | Switch power controller and comprise the Switching Power Supply of this switch power controller | |
| CN209419502U (en) | Power supply circuit, control circuit and Switching Power Supply | |
| CN205123588U (en) | It turns over to keep apart swashs formula high frequency switching power supply and input voltage detection circuitry thereof | |
| CN203734885U (en) | LED driving device and control circuit and output current detection circuit thereof | |
| CN202190220U (en) | Synchronous rectification circuit | |
| CN213990523U (en) | Synchronous rectifying device | |
| CN107026578B (en) | Power supply device for widening input voltage range of low-power switch power supply |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |