CN111026576A - Method, equipment and medium for analyzing mainboard faults - Google Patents
Method, equipment and medium for analyzing mainboard faults Download PDFInfo
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- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0751—Error or fault detection not based on redundancy
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0766—Error or fault reporting or storing
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/079—Root cause analysis, i.e. error or fault diagnosis
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- G06F11/326—Display of status information by lamps or LED's for error or online/offline status
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
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Abstract
The invention discloses a method for analyzing mainboard faults, which comprises the following steps: acquiring a historical fault log, and creating a fault code table according to the log; acquiring mainboard state information through a serial port, and judging whether a fault exists according to the mainboard state information; responding to the existence of the fault, matching the fault according to the fault code table, and outputting the matched fault code; and reporting the fault to a user in response to the failure code can not be matched according to the fault code table, and adding the fault to the fault code table in a user-defined mode. The invention also discloses a computer device and a readable storage medium. The method, the equipment and the medium for monitoring the credible state provided by the invention can visually display the fault code through the onboard nixie tube, can realize rapid analysis and positioning of the fault reason and positioning, and greatly improve the efficiency of a mainboard debugging stage.
Description
Technical Field
The present invention relates to the field of computer application technologies, and in particular, to a method, a device, and a medium for analyzing a motherboard fault.
Background
At present, various fault phenomena can occur in the production and debugging process of a mainboard based on a domestic platform. Because the platform mainboard is relatively complicated, the reasons for the generated faults are many, and the information quantity is huge. When the main board breaks down, the traditional maintenance means needs a technician to manually debug the tool for analysis, find corresponding fault information and solve the problem of the fault, so that the technician is very difficult to quickly determine the fault reason. Manual analysis is not only time consuming, labor consuming, and expensive, but also inefficient.
As for the inevitable occurrence of faults or hidden dangers of the main board, if the faults cannot be found and eliminated in time, great loss may be caused. Therefore, a fault analysis method is needed, which can quickly and accurately determine and visually display the fault information of the motherboard when the motherboard fails.
Disclosure of Invention
In view of this, an object of the embodiments of the present invention is to provide a method, an apparatus, and a medium for analyzing a motherboard fault, which can visually display a fault code through an onboard nixie tube, thereby realizing rapid analysis and positioning of a fault cause and positioning, and greatly improving efficiency of a motherboard debugging stage.
Based on the above object, an aspect of the embodiments of the present invention provides a method for analyzing a motherboard fault, including the following steps: acquiring a historical fault log, and creating a fault code table according to the log; acquiring mainboard state information through a serial port, and judging whether a fault exists according to the mainboard state information; responding to the existence of the fault, matching the fault according to the fault code table, and outputting the matched fault code; and reporting the fault to a user in response to the failure to match the fault according to the fault code table, and adding the fault to the fault code table in a user-defined manner.
In some embodiments, matching the fault according to the fault code table and outputting the matched fault code further comprises: and sending the fault code information to an onboard nixie tube, and displaying the indication state and the fault code through the onboard nixie tube.
In some embodiments, obtaining the status information of the motherboard via the serial port, and determining whether a fault exists according to the status information of the motherboard includes: and acquiring the power-on state information of the CPLD through the serial port, wherein the power-on state information is the power-on state information of the CPU, the power-on state information of the memory and the power supply state information of the peripheral chip.
In some embodiments, obtaining the status information of the motherboard via the serial port, and determining whether a fault exists according to the status information of the motherboard includes: and acquiring information output by the BIOS based on a communication protocol, wherein the information output by the BIOS is CPU initialization state information, memory initialization state information and peripheral expansion equipment initialization state information.
In some embodiments, further comprising: and presetting a fault solution, and repairing the fault according to the fault solution.
In another aspect of the embodiments of the present invention, there is also provided a computer device, including: at least one processor; and a memory storing computer instructions executable on the processor, the instructions being executable by the processor to perform the steps of: acquiring a historical fault log, and creating a fault code table according to the log; acquiring mainboard state information through a serial port, and judging whether a fault exists according to the mainboard state information; responding to the existence of the fault, matching the fault according to the fault code table, and outputting the matched fault code; and reporting the fault to a user in response to the failure to match the fault according to the fault code table, and adding the fault to the fault code table in a user-defined manner.
In some embodiments, matching the fault according to the fault code table and outputting the matched fault code further comprises: and sending the fault code information to an onboard nixie tube, and displaying the indication state and the fault code through the onboard nixie tube.
In some embodiments, obtaining the status information of the motherboard via the serial port, and determining whether a fault exists according to the status information of the motherboard includes: and acquiring the power-on state information of the CPLD through the serial port, wherein the power-on state information is the power-on state information of the CPU, the power-on state information of the memory and the power supply state information of the peripheral chip.
In some embodiments, obtaining the status information of the motherboard via the serial port, and determining whether a fault exists according to the status information of the motherboard includes: and acquiring information output by the BIOS based on a communication protocol, wherein the information output by the BIOS is CPU initialization state information, memory initialization state information and peripheral expansion equipment initialization state information.
According to the present invention, there is also provided a computer readable storage medium storing a computer program which, when executed by a processor, implements the steps of the method described above.
The invention has the following beneficial technical effects: the fault codes are visually displayed through the onboard nixie tube, so that the fault reasons can be quickly analyzed and positioned, and the efficiency of the mainboard debugging stage is greatly improved.
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In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other embodiments can be obtained by using the drawings without creative efforts.
Fig. 1 is a schematic diagram of an embodiment of a method for analyzing a motherboard fault according to the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the following embodiments of the present invention are described in further detail with reference to the accompanying drawings.
It should be noted that all expressions using "first" and "second" in the embodiments of the present invention are used for distinguishing two entities with the same name but different names or different parameters, and it should be noted that "first" and "second" are merely for convenience of description and should not be construed as limitations of the embodiments of the present invention, and they are not described in any more detail in the following embodiments.
In view of the above, a first aspect of the embodiments of the present invention provides an embodiment of a method for analyzing a motherboard fault. Fig. 1 is a schematic diagram illustrating an embodiment of a method for analyzing a motherboard fault according to the present invention. As shown in fig. 1, the embodiment of the present invention includes the following steps:
s1, acquiring a historical fault log, and creating a fault code table according to the log;
s2, acquiring the state information of the mainboard through a serial port, and judging whether a fault exists according to the state information of the mainboard;
s3, responding to the fault, matching the fault according to the fault code table, and outputting the matched fault code; and
and S4, reporting the fault to a user in response to the fact that the fault cannot be matched according to the fault code table, and adding the fault to the fault code table in a self-defined manner.
In the present embodiment, a history fault log is acquired, and a fault keyword-fault code table is created from the fault log so as to be displayed on a display device. Acquiring mainboard state information through a serial port, judging whether a fault exists according to the mainboard state information, matching corresponding fault code tables if the fault exists, and outputting the matched fault code tables to a display device for displaying; and if the fault codes are not matched, reporting the fault to a user through a user interface, generating a fault log, and adding the fault to a fault code table in a self-defined manner so that the corresponding fault codes can be matched when the fault occurs again.
According to some embodiments of the present invention, matching the fault according to the fault code table and outputting the matched fault code further comprises: and sending the fault code information to the nixie tube, and displaying the indication state and the fault code through the onboard nixie tube. Debugging personnel can be according to the quick location problem of the fault code that shows on board carries the charactron, and then improves the efficiency in mainboard debugging stage.
According to some embodiments of the present invention, obtaining the status information of the motherboard via the serial port, and determining whether a fault exists according to the status information of the motherboard includes: and acquiring the power-on state information of the CPLD through the serial port, wherein the power-on state information comprises CPU power-on state information, memory power-on state information, peripheral chip power supply state information and the like. The CPLD is used for controlling the system power-on time sequence, and when the system is powered on, if a fault occurs, the fault can be reflected by the power-on state information of the CPLD.
According to some embodiments of the present invention, obtaining the status information of the motherboard via the serial port, and determining whether a fault exists according to the status information of the motherboard includes: and acquiring information output by the BIOS based on a communication protocol, wherein the information output by the BIOS comprises CPU initialization state information, memory initialization state information, peripheral expansion equipment initialization state information and the like.
According to some embodiments of the invention, the method further comprises presetting a fault solution, and repairing the fault according to the fault solution. And presetting a fault solution for the fault which can be automatically recovered according to the historical fault log, and automatically repairing the fault of the main board when the fault occurs, wherein the fault comprises the resetting, refreshing and reconfiguring of hardware and the like.
It should be particularly noted that, the steps in the embodiments of the method for analyzing a motherboard fault may be intersected, replaced, added, or deleted, and therefore, these methods for analyzing a motherboard fault that are transformed by reasonable permutation and combination also belong to the scope of the present invention, and the scope of the present invention should not be limited to the embodiments.
In view of the above object, a second aspect of the embodiments of the present invention provides a computer device, including: at least one processor; and a memory storing computer instructions executable on the processor, the instructions being executable by the processor to perform the steps of: s1, acquiring a historical fault log, and creating a fault code table according to the log; s2, acquiring the state information of the mainboard through a serial port, and judging whether a fault exists according to the state information of the mainboard; s3, responding to the fault, matching the fault according to the fault code table, and outputting the matched fault code; and S4, reporting the fault to the user in response to the failure to match the fault according to the fault code table, and adding the fault to the fault code table in a user-defined manner.
According to some embodiments of the present invention, matching the fault according to the fault code table and outputting the matched fault code further comprises: and sending the fault code information to an onboard nixie tube, and displaying the indication state and the fault code through the onboard nixie tube.
According to some embodiments of the present invention, obtaining the status information of the motherboard via the serial port, and determining whether a fault exists according to the status information of the motherboard includes: and acquiring the power-on state information of the CPLD through the serial port, wherein the power-on state information is the power-on state information of the CPU, the power-on state information of the memory and the power supply state information of the peripheral chip.
According to some embodiments of the present invention, obtaining the status information of the motherboard via the serial port, and determining whether a fault exists according to the status information of the motherboard includes: and acquiring information output by the BIOS based on a communication protocol, wherein the information output by the BIOS is CPU initialization state information, memory initialization state information and peripheral expansion equipment initialization state information.
The invention also provides a computer readable storage medium storing a computer program which, when executed by a processor, performs the method as above.
Finally, it should be noted that, as one of ordinary skill in the art can appreciate that all or part of the processes of the methods of the above embodiments can be implemented by a computer program to instruct related hardware, and the program of the method for file protection based on soft link can be stored in a computer readable storage medium, and when executed, the program can include the processes of the embodiments of the methods as described above. The storage medium of the program may be a magnetic disk, an optical disk, a Read Only Memory (ROM), a Random Access Memory (RAM), or the like. The embodiments of the computer program may achieve the same or similar effects as any of the above-described method embodiments.
Furthermore, the methods disclosed according to embodiments of the present invention may also be implemented as a computer program executed by a processor, which may be stored in a computer-readable storage medium. Which when executed by a processor performs the above-described functions defined in the methods disclosed in embodiments of the invention.
Further, the above method steps and system elements may also be implemented using a controller and a computer readable storage medium for storing a computer program for causing the controller to implement the functions of the above steps or elements.
Further, it should be appreciated that the computer-readable storage media (e.g., memory) herein can be either volatile memory or nonvolatile memory, or can include both volatile and nonvolatile memory. By way of example, and not limitation, nonvolatile memory can include Read Only Memory (ROM), Programmable ROM (PROM), Electrically Programmable ROM (EPROM), Electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM), which can act as external cache memory. By way of example and not limitation, RAM is available in a variety of forms such as synchronous RAM (DRAM), Dynamic RAM (DRAM), Synchronous DRAM (SDRAM), Double Data Rate SDRAM (DDRSDRAM), Enhanced SDRAM (ESDRAM), Synchronous Link DRAM (SLDRAM), and Direct Rambus RAM (DRRAM). The storage devices of the disclosed aspects are intended to comprise, without being limited to, these and other suitable types of memory.
Those of skill would further appreciate that the various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the disclosure herein may be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as software or hardware depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the disclosed embodiments of the present invention.
The various illustrative logical blocks, modules, and circuits described in connection with the disclosure herein may be implemented or performed with the following components designed to perform the functions herein: a general purpose processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination of these components. A general purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP, and/or any other such configuration.
The steps of a method or algorithm described in connection with the disclosure herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor such the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium may be integral to the processor. The processor and the storage medium may reside in an ASIC. The ASIC may reside in a user terminal. In the alternative, the processor and the storage medium may reside as discrete components in a user terminal.
In one or more exemplary designs, the functions may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium. Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A storage media may be any available media that can be accessed by a general purpose or special purpose computer. By way of example, and not limitation, such computer-readable media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a general-purpose or special-purpose computer, or a general-purpose or special-purpose processor. Also, any connection is properly termed a computer-readable medium. For example, if the software is transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, twisted pair, Digital Subscriber Line (DSL), or wireless technologies such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of medium. Disk and disc, as used herein, includes Compact Disc (CD), laser disc, optical disc, Digital Versatile Disc (DVD), floppy disk, blu-ray disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.
The foregoing is an exemplary embodiment of the present disclosure, but it should be noted that various changes and modifications could be made herein without departing from the scope of the present disclosure as defined by the appended claims. The functions, steps and/or actions of the method claims in accordance with the disclosed embodiments described herein need not be performed in any particular order. Furthermore, although elements of the disclosed embodiments of the invention may be described or claimed in the singular, the plural is contemplated unless limitation to the singular is explicitly stated.
It should be understood that, as used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly supports the exception. It should also be understood that "and/or" as used herein is meant to include any and all possible combinations of one or more of the associated listed items.
The numbers of the embodiments disclosed in the embodiments of the present invention are merely for description, and do not represent the merits of the embodiments. It will be understood by those skilled in the art that all or part of the steps for implementing the above embodiments may be implemented by hardware, or may be implemented by a program instructing relevant hardware, and the program may be stored in a computer-readable storage medium, and the above-mentioned storage medium may be a read-only memory, a magnetic disk or an optical disk, etc.
Those of ordinary skill in the art will understand that: the discussion of any embodiment above is meant to be exemplary only, and is not intended to intimate that the scope of the disclosure, including the claims, of embodiments of the invention is limited to these examples; within the idea of an embodiment of the invention, also technical features in the above embodiment or in different embodiments may be combined and there are many other variations of the different aspects of the embodiments of the invention as described above, which are not provided in detail for the sake of brevity. Therefore, any omissions, modifications, substitutions, improvements, and the like that may be made without departing from the spirit and principles of the embodiments of the present invention are intended to be included within the scope of the embodiments of the present invention.
Claims (10)
1. A method for analyzing a failure of a motherboard, comprising:
acquiring a historical fault log, and creating a fault code table according to the log;
acquiring mainboard state information through a serial port, and judging whether a fault exists according to the mainboard state information;
responding to the existence of the fault, matching the fault according to the fault code table, and outputting the matched fault code; and
and reporting the fault to a user in response to the failure to match the fault according to the fault code table, and adding the fault to the fault code table in a self-defined manner.
2. The method of claim 1, wherein matching the fault according to the fault code table and outputting the matched fault code further comprises:
and sending the fault code information to an onboard nixie tube, and displaying an indication state and the fault code through the onboard nixie tube.
3. The method of claim 1, wherein obtaining motherboard status information via a serial port, and determining whether a fault exists according to the motherboard status information comprises:
and acquiring the power-on state information of the CPLD through the serial port, wherein the power-on state information is CPU power-on state information, memory power-on state information and peripheral chip power supply state information.
4. The method of claim 1, wherein obtaining motherboard status information via a serial port, and determining whether a fault exists according to the motherboard status information comprises:
and acquiring information output by the BIOS based on a communication protocol, wherein the information output by the BIOS is CPU initialization state information, memory initialization state information and peripheral expansion equipment initialization state information.
5. The method of claim 1, further comprising: and presetting a fault solution, and repairing the fault according to the fault solution.
6. A computer device, comprising:
at least one processor; and
a memory storing computer instructions executable on the processor, the instructions when executed by the processor implementing the steps of:
acquiring a historical fault log, and creating a fault code table according to the log;
acquiring mainboard state information through a serial port, and judging whether a fault exists according to the mainboard state information;
responding to the existence of the fault, matching the fault according to the fault code table, and outputting the matched fault code; and
and reporting the fault to a user in response to the failure to match the fault according to the fault code table, and adding the fault to the fault code table in a self-defined manner.
7. The computer device of claim 6, wherein matching the fault according to the fault code table and outputting the matched fault code further comprises:
and sending the fault code information to an onboard nixie tube, and displaying an indication state and the fault code through the onboard nixie tube.
8. The computer device of claim 6, wherein obtaining motherboard status information via a serial port, and determining whether a fault exists according to the system status information comprises:
and acquiring the power-on state information of the CPLD through the serial port, wherein the power-on state information is CPU power-on state information, memory power-on state information and peripheral chip power supply state information.
9. The computer device of claim 6, wherein obtaining motherboard status information via a serial port, and determining whether a fault exists according to the system status information comprises:
and acquiring information output by the BIOS based on a system communication protocol, wherein the information output by the BIOS is CPU initialization state information, memory initialization state information and peripheral expansion equipment initialization state information.
10. A computer-readable storage medium, in which a computer program is stored which, when being executed by a processor, carries out the steps of the method according to any one of claims 1 to 5.
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| CN114625233A (en) * | 2022-03-30 | 2022-06-14 | 苏州浪潮智能科技有限公司 | Method, system, device and storage medium for power management |
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