CN111078528A - Management method, equipment and medium for automatic test - Google Patents

Management method, equipment and medium for automatic test Download PDF

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Publication number
CN111078528A
CN111078528A CN201911119551.9A CN201911119551A CN111078528A CN 111078528 A CN111078528 A CN 111078528A CN 201911119551 A CN201911119551 A CN 201911119551A CN 111078528 A CN111078528 A CN 111078528A
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thread
test
thread state
identification
test case
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CN201911119551.9A
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周广跃
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Suzhou Inspur Intelligent Technology Co Ltd
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Suzhou Inspur Intelligent Technology Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/36Preventing errors by testing or debugging software
    • G06F11/3668Software testing
    • G06F11/3672Test management
    • G06F11/3688Test management for test execution, e.g. scheduling of test suites

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  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)

Abstract

The invention discloses a management method for automatic testing, which comprises the following steps: the thread states of a plurality of test cases are monitored on line, and corresponding identification bits are generated according to the monitored thread state information; traversing and reading identification bits generated aiming at all test cases, and displaying the identification bits on line; judging whether the thread state of the corresponding test case passes or not based on the read identification bit; and in response to the thread state failing, determining the reason of the thread state exception based on the identification bit, and processing based on the reason. The invention also discloses a computer device and a readable storage medium. The management method, the equipment and the medium for the automatic test realize real-time recording, statistics and display of the thread state of the test case by constructing the intelligent running monitoring module, and simultaneously carry out intelligent processing on the test thread in the abnormal state.

Description

Management method, equipment and medium for automatic test
Technical Field
The present invention relates to the field of software testing technologies, and in particular, to a management method, a device and a readable medium for automated testing.
Background
Automated testing is a process that translates human-driven test behavior into machine execution. Typically, after a test case is designed and passes review, the test is performed step by a tester according to the procedures described in the test case, resulting in a comparison of the actual results with the expected results. Automated testing is an important link in software testing.
The traditional automatic execution mode has a series of problems, such as:
1) the current execution progress cannot be checked, when the execution of the use case is suspended, the reason of the suspension cannot be located, and the executed test result cannot be recorded.
2) When the current network environment is blocked, waiting time is needed between the use cases, the traditional solution is that waiting is directly added between the use cases, time waste is caused, and the period is increased.
3) The automatic test has certain instability, when a use case fails, the case can be executed again due to some external reasons, if the case which is misjudged is recovered to initial data, the system task amount can be increased, and the working efficiency is reduced.
Disclosure of Invention
In view of this, an object of the embodiments of the present invention is to provide a management method, a device, and a medium for automated testing, which implement real-time recording, statistics, and display of thread states of test cases by constructing an intelligently operating monitoring module, and perform intelligent processing on test threads in an abnormal state.
Based on the above purpose, an aspect of the embodiments of the present invention provides a management method for an automation test, including the following steps: the thread states of a plurality of test cases are monitored on line, and corresponding identification bits are generated according to the monitored thread state information; traversing and reading identification bits generated aiming at all test cases, and displaying the identification bits on line; judging whether the thread state of the corresponding test case passes or not based on the read identification bit; and in response to the thread state failing, determining the reason of the thread state exception based on the identification bit, and processing based on the reason.
In some embodiments, the traversing reading the identification bits generated for all test cases, and the online displaying includes: traversing and reading identification bits generated aiming at all test cases; counting the thread state of the test case corresponding to the identification bit; and displaying the statistical data on line.
In some embodiments, in response to the thread status failing, determining a cause of the thread status exception based on the identification bit, and processing based on the cause includes: and responding to the network exception of the thread state, and adding waiting time to the thread of the test case.
In some embodiments, in response to the thread status failing, determining a cause of the thread status exception based on the identification bit, and processing based on the cause includes: and responding to the thread state as failure, and retesting the thread of the failed test case.
In some embodiments, further comprising: and restoring the initial data of the test case in response to the retest result still being the state exception.
In another aspect of the embodiments of the present invention, there is also provided a computer device, including: at least one processor; and a memory storing computer instructions executable on the processor, the instructions being executable by the processor to perform the steps of: the thread states of a plurality of test cases are monitored on line, and corresponding identification bits are generated according to the monitored thread state information; traversing and reading identification bits generated aiming at all test cases, and displaying the identification bits on line; judging whether the thread state of the corresponding test case passes or not based on the read identification bit; and in response to the thread state failing, determining the reason of the thread state exception based on the identification bit, and processing based on the reason.
In some embodiments, the traversing reading the identification bits generated for all test cases, and the online displaying includes: traversing and reading identification bits generated aiming at all test cases; counting the thread state of the test case corresponding to the identification bit; and displaying the statistical data on line.
In some embodiments, in response to the thread status failing, determining a cause of the thread status exception based on the identification bit, and processing based on the cause includes: and responding to the network exception of the thread state, and adding waiting time to the thread of the test case.
In some embodiments, in response to the thread status failing, determining a cause of the thread status exception based on the identification bit, and processing based on the cause includes: responding to the thread state as failure, and retesting the thread of the failed test case; and restoring the initial data of the test case in response to the retest result still being the state exception.
In a further aspect of the embodiments of the present invention, a computer-readable storage medium is also provided, in which a computer program for implementing the above method steps is stored when the computer program is executed by a processor.
The invention has the following beneficial technical effects: by constructing an intelligent running monitoring module, the real-time recording, statistics and display of the thread state of the test case are realized, and meanwhile, the test thread in an abnormal state is intelligently processed.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other embodiments can be obtained by using the drawings without creative efforts.
Fig. 1 is a schematic diagram of an embodiment of a management method for an automated test provided by the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the following embodiments of the present invention are described in further detail with reference to the accompanying drawings.
It should be noted that all expressions using "first" and "second" in the embodiments of the present invention are used for distinguishing two entities with the same name but different names or different parameters, and it should be noted that "first" and "second" are merely for convenience of description and should not be construed as limitations of the embodiments of the present invention, and they are not described in any more detail in the following embodiments.
In view of the above-mentioned objects, a first aspect of the embodiments of the present invention provides an embodiment of a management method for an automation test. Fig. 1 is a schematic diagram illustrating an embodiment of a management method for an automated test provided by the present invention. As shown in fig. 1, the embodiment of the present invention includes the following steps:
s1, carrying out on-line monitoring on the thread states of a plurality of test cases, and generating corresponding identification bits according to the monitored thread state information;
s2, traversing and reading the identification bits generated aiming at all test cases, and displaying on line;
s3, judging whether the thread state of the corresponding test case passes or not based on the read identification bit; and;
and S4, responding to the thread state failing, determining the reason of the thread state exception based on the identification bit, and processing based on the reason.
In this embodiment, the automated test refers to a test method that is executed according to a set use case and compares the result with an expected result to return a result, based on a programming language and a test framework or a test tool; the automated testing framework is a framework applied to automated testing, and provides an architecture module with automated testing execution and management functions; the automatic test case is a test case for automatic testing, runs on a test framework, and feeds back a test result of each test point to the service test.
In some embodiments of the present invention, a concept of a test case monitor is introduced to implement a function of a management module for automated testing, a constructor is defined, a test framework drives a test case monitor object of a process case, and the test case monitor object according to a test case instance is added to the test framework. The test case monitor is used for adding each test case as a thread into a test process through a test framework, detecting the state of the thread of the test case, setting an identification bit function, and setting according to the state of the thread of the test case read by the test case monitor and a result returned from the thread, wherein five identification bits are initially set by default: 0 did not start, 1 underway, 2 passed, 3 failed, 4 network exception. The identification bit can be self-defined according to the specific test environment and the required function.
The test case monitor reads the thread state of the case, updates the identification position on line in real time, and the test process carries out intelligent processing through the identification position of the test case monitor, displays the test progress in real time, increases the waiting in real time, retests the failed case in real time, processes abnormal data in real time and the like.
In some embodiments of the present invention, the traversing and reading the identification bits generated for all test cases, and the online displaying includes: traversing and reading identification bits generated aiming at all test cases; counting the thread state of the test case corresponding to the identification bit; and displaying the statistical data on line. The test case monitor object returns its own identification position to the test frame, the test frame facilitates all test case monitor objects to read the identification position, count all objects including the number of completed objects, the number of ongoing objects and the like, and record the result in real time and display the result through the display, thereby realizing the real-time monitoring of all test cases.
In some embodiments of the invention, in response to the thread status failing, determining a cause of the thread status exception based on the identification bit, and processing based on the cause comprises: and responding to the network exception of the thread state, and adding waiting time to the thread of the test case. The test framework reads the identification position of the test case monitor, and when the identification position is read to be abnormal, the waiting time is increased to the execution case thread, so that the intelligent waiting function is realized, and the problem of waiting without jamming is solved.
In some embodiments of the invention, in response to the thread status failing, determining a cause of the thread status exception based on the identification bit, and processing based on the cause comprises: and responding to the thread state as failure, and retesting the thread of the failed test case. And if the thread return result does not meet the expected range, the test framework reads the identification bit of the test case monitor as failure, and the case thread of the current test case monitor object is added into the queue again for testing again. The mechanism for automatically retesting failed test cases reduces false failed cases.
In some embodiments, the method further comprises: and in response to the retest result that the state is still abnormal, recovering the initial data of the test case, calling a script for cleaning and recovering the test environment by the test framework, solving the problem of cleaning without abnormality and realizing the function of intelligently processing the abnormal data.
It should be particularly noted that the steps in the embodiments of the storage performance optimization method described above can be mutually intersected, replaced, added, or deleted, and therefore, these methods of file protection based on soft link should also belong to the scope of the present invention, and should not limit the scope of the present invention to the embodiments.
In view of the above object, a second aspect of the embodiments of the present invention provides a computer device, including: at least one processor; and a memory storing computer instructions executable on the processor, the instructions being executable by the processor to perform the steps of: the thread states of a plurality of test cases are monitored on line, and corresponding identification bits are generated according to the monitored thread state information; traversing and reading identification bits generated aiming at all test cases, and displaying the identification bits on line; judging whether the thread state of the corresponding test case passes or not based on the read identification bit; and in response to the thread state failing, determining the reason of the thread state exception based on the identification bit, and processing based on the reason.
In some embodiments, the traversing reading the identification bits generated for all test cases, and the online displaying includes: traversing and reading identification bits generated aiming at all test cases; counting the thread state of the test case corresponding to the identification bit; and displaying the statistical data on line.
In some embodiments, in response to the thread status failing, determining a cause of the thread status exception based on the identification bit, and processing based on the cause includes: and responding to the network exception of the thread state, and adding waiting time to the thread of the test case.
In some embodiments, in response to the thread status failing, determining a cause of the thread status exception based on the identification bit, and processing based on the cause includes: responding to the thread state as failure, and retesting the thread of the failed test case; and restoring the initial data of the test case in response to the retest result still being the state exception.
The invention also provides a computer readable storage medium storing a computer program which, when executed by a processor, performs the method as above.
Finally, it should be noted that, as one of ordinary skill in the art can appreciate that all or part of the processes of the methods of the above embodiments can be implemented by instructing relevant hardware through a computer program, and the program of the management method of the automated test can be stored in a computer readable storage medium, and when executed, the program can include the processes of the embodiments of the methods as described above. The storage medium of the program may be a magnetic disk, an optical disk, a Read Only Memory (ROM), a Random Access Memory (RAM), or the like. The embodiments of the computer program may achieve the same or similar effects as any of the above-described method embodiments.
Furthermore, the methods disclosed according to embodiments of the present invention may also be implemented as a computer program executed by a processor, which may be stored in a computer-readable storage medium. Which when executed by a processor performs the above-described functions defined in the methods disclosed in embodiments of the invention.
Further, the above method steps and system elements may also be implemented using a controller and a computer readable storage medium for storing a computer program for causing the controller to implement the functions of the above steps or elements.
Further, it should be appreciated that the computer-readable storage media (e.g., memory) herein can be either volatile memory or nonvolatile memory, or can include both volatile and nonvolatile memory. By way of example, and not limitation, nonvolatile memory can include Read Only Memory (ROM), Programmable ROM (PROM), Electrically Programmable ROM (EPROM), Electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM), which can act as external cache memory. By way of example and not limitation, RAM is available in a variety of forms such as synchronous RAM (DRAM), Dynamic RAM (DRAM), Synchronous DRAM (SDRAM), Double Data Rate SDRAM (DDRSDRAM), Enhanced SDRAM (ESDRAM), Synchronous Link DRAM (SLDRAM), and Direct Rambus RAM (DRRAM). The storage devices of the disclosed aspects are intended to comprise, without being limited to, these and other suitable types of memory.
Those of skill would further appreciate that the various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the disclosure herein may be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as software or hardware depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the disclosed embodiments of the present invention.
The various illustrative logical blocks, modules, and circuits described in connection with the disclosure herein may be implemented or performed with the following components designed to perform the functions herein: a general purpose processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination of these components. A general purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP, and/or any other such configuration.
The steps of a method or algorithm described in connection with the disclosure herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor such the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium may be integral to the processor. The processor and the storage medium may reside in an ASIC. The ASIC may reside in a user terminal. In the alternative, the processor and the storage medium may reside as discrete components in a user terminal.
In one or more exemplary designs, the functions may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium. Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A storage media may be any available media that can be accessed by a general purpose or special purpose computer. By way of example, and not limitation, such computer-readable media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a general-purpose or special-purpose computer, or a general-purpose or special-purpose processor. Also, any connection is properly termed a computer-readable medium. For example, if the software is transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, twisted pair, Digital Subscriber Line (DSL), or wireless technologies such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of medium. Disk and disc, as used herein, includes Compact Disc (CD), laser disc, optical disc, Digital Versatile Disc (DVD), floppy disk, blu-ray disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.
The foregoing is an exemplary embodiment of the present disclosure, but it should be noted that various changes and modifications could be made herein without departing from the scope of the present disclosure as defined by the appended claims. The functions, steps and/or actions of the method claims in accordance with the disclosed embodiments described herein need not be performed in any particular order. Furthermore, although elements of the disclosed embodiments of the invention may be described or claimed in the singular, the plural is contemplated unless limitation to the singular is explicitly stated.
It should be understood that, as used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly supports the exception. It should also be understood that "and/or" as used herein is meant to include any and all possible combinations of one or more of the associated listed items.
The numbers of the embodiments disclosed in the embodiments of the present invention are merely for description, and do not represent the merits of the embodiments.
It will be understood by those skilled in the art that all or part of the steps for implementing the above embodiments may be implemented by hardware, or may be implemented by a program instructing relevant hardware, and the program may be stored in a computer-readable storage medium, and the above-mentioned storage medium may be a read-only memory, a magnetic disk or an optical disk, etc.
Those of ordinary skill in the art will understand that: the discussion of any embodiment above is meant to be exemplary only, and is not intended to intimate that the scope of the disclosure, including the claims, of embodiments of the invention is limited to these examples; within the idea of an embodiment of the invention, also technical features in the above embodiment or in different embodiments may be combined and there are many other variations of the different aspects of the embodiments of the invention as described above, which are not provided in detail for the sake of brevity. Therefore, any omissions, modifications, substitutions, improvements, and the like that may be made without departing from the spirit and principles of the embodiments of the present invention are intended to be included within the scope of the embodiments of the present invention.

Claims (10)

1. A management method for automatic test is characterized by comprising the following steps:
the thread states of a plurality of test cases are monitored on line, and corresponding identification bits are generated according to the monitored thread state information;
traversing and reading the identification bits generated aiming at all the test cases, and displaying the identification bits on line;
judging whether the thread state of the corresponding test case passes or not based on the read identification bit; and
and in response to the thread state not passing, determining the reason of the thread state exception based on the identification bit, and processing based on the reason.
2. The management method according to claim 1, wherein traversing and reading the identification bits generated for all test cases and displaying on line comprises:
traversing and reading the identification bits generated aiming at all the test cases;
counting the thread state of the test case corresponding to the identification bit;
and displaying the statistical data on line.
3. The method of claim 1, wherein in response to the thread status failing, determining a cause of the thread status exception based on the identification bit, and wherein processing based on the cause comprises:
and in response to the thread state being a network exception, adding latency to the thread of the test case.
4. The method of claim 1, wherein in response to the thread status failing, determining a cause of the thread status exception based on the identification bit, and wherein processing based on the cause comprises:
and responding to the thread state as failure, and retesting the failed thread of the test case.
5. The method of managing according to claim 4, further comprising: and restoring the initial data of the test case in response to the retest result still being the state exception.
6. A computer device, comprising:
at least one processor; and
a memory storing computer instructions executable on the processor, the instructions when executed by the processor implementing the steps of:
the thread states of a plurality of test cases are monitored on line, and corresponding identification bits are generated according to the monitored thread state information;
traversing and reading the identification bits generated aiming at all the test cases, and displaying the identification bits on line;
judging whether the thread state of the corresponding test case passes or not based on the read identification bit; and
and in response to the thread state not passing, determining the reason of the thread state exception based on the identification bit, and processing based on the reason.
7. The computer device of claim 6, wherein traversing to read the identification bits generated for all test cases and displaying online comprises:
traversing and reading the identification bits generated aiming at all the test cases;
counting the thread state of the test case corresponding to the identification bit;
and displaying the statistical data on line.
8. The computer device of claim 6, wherein in response to the thread state failing, determining a cause of the thread state exception based on the identification bits, and wherein processing based on the cause comprises:
and in response to the thread state being a network exception, adding latency to the thread of the test case.
9. The computer device of claim 6, wherein in response to the thread state failing, determining a cause of the thread state exception based on the identification bits, and wherein processing based on the cause comprises:
responding to the thread state as failure, and retesting the failed thread of the test case;
and restoring the initial data of the test case in response to the retest result still being the state exception.
10. A computer-readable storage medium, in which a computer program is stored which, when being executed by a processor, carries out the steps of the method according to any one of claims 1 to 5.
CN201911119551.9A 2019-11-15 2019-11-15 Management method, equipment and medium for automatic test Withdrawn CN111078528A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113918397A (en) * 2021-10-28 2022-01-11 浪潮(山东)计算机科技有限公司 Pressure testing method, device, equipment and storage medium

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113918397A (en) * 2021-10-28 2022-01-11 浪潮(山东)计算机科技有限公司 Pressure testing method, device, equipment and storage medium

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Application publication date: 20200428