CN110990307A - Wiring system of server and server - Google Patents

Wiring system of server and server Download PDF

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Publication number
CN110990307A
CN110990307A CN201911207097.2A CN201911207097A CN110990307A CN 110990307 A CN110990307 A CN 110990307A CN 201911207097 A CN201911207097 A CN 201911207097A CN 110990307 A CN110990307 A CN 110990307A
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China
Prior art keywords
communication line
target
server
cpu
multiplexer
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Pending
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CN201911207097.2A
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Chinese (zh)
Inventor
吕晶
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Inspur Power Commercial Systems Co Ltd
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Inspur Power Commercial Systems Co Ltd
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Priority to CN201911207097.2A priority Critical patent/CN110990307A/en
Publication of CN110990307A publication Critical patent/CN110990307A/en
Pending legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1608—Error detection by comparing the output signals of redundant hardware
    • G06F11/1625—Error detection by comparing the output signals of redundant hardware in communications, e.g. transmission, interfaces

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Hardware Redundancy (AREA)

Abstract

The application discloses wiring system of server includes: the multiplexer is used for establishing communication connection with a CPU (central processing unit) in a target server and a target terminal and expanding a communication line between the CPU and the target terminal to obtain a standby communication line; SMBus IO expander connected with the multiplexer and used for controlling the target output signal of the multiplexer; and the programmable logic device is connected with the SMBus IO expander and the CPU and is used for monitoring a communication line between the CPU and the target terminal according to the target output signal and informing the SMBus IO expander to switch the target communication line to a standby communication line when detecting that the target communication line between the CPU and the target terminal is in fault. The system can switch the target communication line with the fault to the standby communication line, and the safety problem caused by the fault of the communication line is avoided, so that the safety of the server can be improved.

Description

Wiring system of server and server
Technical Field
The present invention relates to the field of server technologies, and in particular, to a server wiring system and a server.
Background
With the rapid development of the technical field of the server, an extremely high requirement is put on the security of the server system, and the communication cables connected with each other in the server are equivalent to transportation lines for the server to perform various data interactions. In this technical context, if a communication cable in a server fails, a series of security problems are caused to the server. At present, no effective solution exists for the problem.
Therefore, how to further improve the security of the server in the operation process is a technical problem to be solved urgently by those skilled in the art.
Disclosure of Invention
In view of the above, the present invention provides a wiring system of a server and a server, so as to further improve the security of the server during the operation process. The specific scheme is as follows:
a wiring system for a server, comprising:
the multiplexer is used for establishing communication connection with a CPU (central processing unit) and a target terminal in a target server and expanding a communication line between the CPU and the target terminal to obtain a standby communication line;
the SMBus IO expander is connected with the multiplexer and used for controlling a target output signal of the multiplexer;
and the programmable logic device is connected with the SMBus IO expander and the CPU and used for monitoring a communication line between the CPU and the target terminal according to the target output signal and informing the SMBus IO expander to switch the target communication line to the standby communication line when detecting that the target communication line between the CPU and the target terminal has a fault.
Preferably, the multiplexer is specifically CBTL 01023.
Preferably, the SMBus IO extender is specifically PCA 9555.
Preferably, the SMBus IO extender is specifically PCA 9554.
Preferably, the programmable logic device is specifically an FPGA.
Preferably, the FPGA further comprises:
and the display is used for displaying the operation information of the multiplexer.
Preferably, the FPGA further comprises:
a memory for storing the operation information.
Preferably, the FPGA further comprises:
and the alarm is used for prompting the fault information of the target communication line.
Correspondingly, the invention also discloses a server, which comprises the wiring system of the server disclosed in the foregoing.
Therefore, in the invention, firstly, a multiplexer is used for establishing communication connection between a CPU in a target server and a target terminal, and the multiplexer is used for expanding a communication line between the CPU and the target terminal to obtain a standby communication line; then, connecting the SMBus IO expander with the multiplexer to control a target output signal of the multiplexer by using the SMBus IO expander; and finally, connecting the programmable logic device with the SMBus IO expander and the CPU, so that the programmable logic device can monitor a communication line between the CPU and a target terminal by using a target output signal of the multiplexer, and when the programmable logic device detects that the target communication line between the CPU and the target terminal is in fault, the programmable logic device can inform the SMBus IO expander to switch the target communication line in fault to a standby communication line. Obviously, in the wiring system of the server provided by the invention, the target communication line with the fault can be switched to the standby communication line under the condition that the target communication line between the CPU and the target terminal has the fault, so that the safety problem of the server caused by the fault of the communication line is avoided, and the safety of the server in the operation process can be further improved. Correspondingly, the server provided by the invention also has the beneficial effects.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a structural diagram of a wiring system of a server according to an embodiment of the present invention;
fig. 2 is a structural diagram of another wiring system of a server according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1, fig. 1 is a structural diagram of a wiring system of a server according to an embodiment of the present invention, where the wiring system of the server includes:
the multiplexer 11 is used for establishing communication connection with a CPU (central processing unit) and a target terminal in a target server and expanding a communication line between the CPU and the target terminal to obtain a standby communication line;
an SMBus IO expander 12 connected to the multiplexer 11, and configured to control a target output signal of the multiplexer 11;
and the programmable logic device 13 is connected with the SMBus IO expander 12 and the CPU, and is used for monitoring a communication line between the CPU and the target terminal according to the target output signal, and informing the SMBus IO expander 12 to switch the target communication line to a standby communication line when detecting that the target communication line between the CPU and the target terminal is in fault.
In the embodiment, in order to further improve the safety of the server in the operation process, a wiring system for redundantly wiring the server is provided, and the wiring system is composed of a multiplexer 11, an SMBus IO expander 12 and a programmable logic device 13.
It can be understood that, in the operation process of the target server, the CPU in the target server corresponds to the brain of the target server and controls the operation states of various terminal devices in the target server, so in this embodiment, firstly, the multiplexer 11 is used to establish a communication connection between the CPU in the target server and the target terminal, and the multiplexer 11 is used to expand the communication line between the CPU and the target terminal, so as to obtain a spare communication line.
In this embodiment, the target terminal refers to any terminal in the server that can communicate with the CPU; the number of the multiplexers 11 may be one or more, and is specifically set for the purpose of practical application; the method of using the multiplexer 11 to expand the communication line between the CPU and the target terminal to obtain the spare communication line is well known by those skilled in the art, and will not be described in detail here.
When the multiplexer 11 is used to expand the communication line between the CPU and the target terminal to obtain a spare communication line, the SMBus IO (System Management Bus Input Output) expander 12 is connected to the multiplexer 11, so that the SMBus IO expander 12 is used to control the target Output signal in the multiplexer 11.
And finally, connecting the programmable logic device 13 with programming logic capability and the SMBus IO expander 12 with the CPU, monitoring a communication line between the CPU and a target terminal by using the programmable logic device 13, and when the programmable logic device 13 detects that the communication line between the CPU and the target terminal is in fault, sending a target instruction to the SMBus IO expander 12 by using the programmable logic device 13 so as to inform the SMBus IO expander 12 to switch the target communication line in fault to a standby communication line.
In this embodiment, the logic programmable device 13 refers to any logic device with logic editing capability, such as: a single chip microcomputer, an FPGA (Field Programmable Gate Array), an MCU (Micro Controller Unit), and the like, which are not specifically limited herein.
It is conceivable that when the CPU switches the destination communication line in which the failure occurs to the backup communication line, the normal communication function between the CPU and the destination terminal can be recovered, so that the safety problem occurring in the server due to the failure of the communication line can be avoided, and thus the safety and reliability of the server in the operation process can be further improved. In addition, the wiring method provided by the embodiment can also be applied to design architectures of desktop computers, notebook computers or enterprise-type computer systems, or wiring in other electronic industries.
As can be seen, in this embodiment, first, a multiplexer is used to establish a communication connection between a CPU in a target server and a target terminal, and the multiplexer is used to expand a communication line between the CPU and the target terminal, so as to obtain a standby communication line; then, connecting the SMBus IO expander with the multiplexer to control a target output signal of the multiplexer by using the SMBus IO expander; and finally, connecting the programmable logic device with the SMBus IO expander and the CPU, so that the programmable logic device can monitor a communication line between the CPU and a target terminal by using a target output signal of the multiplexer, and when the programmable logic device detects that the target communication line between the CPU and the target terminal is in fault, the programmable logic device can inform the SMBus IO expander to switch the target communication line in fault to a standby communication line. Obviously, in the wiring system of the server provided in this embodiment, since the target communication line having a failure can be switched to the backup communication line when the target communication line between the CPU and the target terminal has a failure, the safety problem of the server due to the failure of the communication line is avoided, and thus the safety of the server during operation can be further improved.
Based on the above embodiments, this embodiment further describes and optimizes the technical solution, and as a preferred implementation, the multiplexer 11 is specifically CBTL 01023.
In the present embodiment, the multiplexer 11 is set to CBTL01023, because CBTL01023 supports two independent pin configurations, signal offset and crosstalk between channels can be minimized, and signal attenuation capability is low.
Moreover, since the external size of CBTL01023 is small and does not require a large space, when the multiplexer 11 is set to CBTL01023, not only the stability of the CPU and the destination terminal in communication can be relatively improved, but also the wiring complexity in the server can be reduced. In addition, in practical application, CBTL01023 can be replaced by other chips of the same type, which are not listed here.
Based on the above embodiments, this embodiment further describes and optimizes the technical solution, and as a preferred implementation, the SMBus IO extender 12 is specifically a PCA 9555.
In a specific implementation, the SMBus IO extender 12 may be set as PCA9555, because the PCA9555 is a CMOS device with 24 pins and can provide I2C/SMBus 16-bit general parallel IO port extension, when the SMBus IO extender 12 is set as PCA9555, a larger number of peripheral devices may be additionally connected to the server, thereby further increasing the peripheral extension capability of the server.
Based on the above embodiments, this embodiment further describes and optimizes the technical solution, and as a preferred implementation, the SMBus IO extender 12 is specifically PCA 9554.
In addition to SMBus IO extender 12 being set to PCA9555, SMBus IO extender 12 may be set to PCA9554, since PCA9554 is a 16-pin CMOS device capable of providing an extension of the 8-bit general purpose parallel IO port in I2C/SMBus applications, the target output signal of multiplexer 11 may also be controlled using PCA 9554. Obviously, the technical scheme provided by this embodiment can make the setting mode of the SMBus IO expander 12 more flexible and various.
Based on the above embodiments, this embodiment further describes and optimizes the technical solution, and as a preferred implementation, the programmable logic device 13 is specifically an FPGA.
Specifically, in the actual operation process, the programmable logic device 13 may be set as an FPGA, and the FPGA is a hardware logic circuit composed of hardware resources such as a logic unit, an ARM (Advanced RISC Machines, ARM processors), and a multiplier, so the FPGA has extremely fast parallel logic computation capability. Obviously, by such a setting mode, not only the data processing capability of the programmable logic device 13 can be improved, but also the user experience of the user in the process of using the server can be further improved.
As a preferred embodiment, the FPGA further comprises:
and a display for displaying operation information of the multiplexer 11.
It can be understood that, because the multiplexer 11 establishes the communication connection with the CPU in the target server and the target terminal, the communication connection relationship between the CPU and the target terminal can be characterized by the operation of the multiplexer 11, that is, the cable connection between the CPU and the target terminal can be inferred by using the operation information of the multiplexer 11.
Therefore, in this embodiment, a display for displaying the operation information of the multiplexer 11 is further provided in the FPGA, so that the worker can more clearly and intuitively view the line connection between the CPU and the target terminal through the operation information of the multiplexer 11 displayed on the display.
As a preferred embodiment, the FPGA further comprises:
and the memory is used for storing the operation information.
It can be understood that, because the operation information of the multiplexer 11 can represent the communication connection relationship between the CPU and the target terminal, in practical applications, in order to enable the staff to see the communication situation between the CPU and the target terminal in real time, the operation information of the multiplexer 11 can also be stored in the memory of the FPGA. Obviously, by the setting mode, the user experience of the user in the process of using the server can be further improved.
As a preferred embodiment, the FPGA further comprises:
and the alarm is used for prompting the fault information of the target communication line.
In this embodiment, an alarm is further provided in the FPGA, and the alarm is used to prompt the fault information of the target communication line. When the alarm is used for prompting the fault information of the target communication line, the safety of the server in the use process can be improved, and the worker can find the reason of the fault of the target communication line more quickly through the fault information prompted by the alarm, so that the overhaul efficiency of the worker in overhauling the target communication line can be further improved.
Based on the technical content disclosed in the above embodiments, the present embodiment is described through a specific application scenario, please refer to fig. 2, and fig. 2 is a structural diagram of another server wiring system provided in the embodiment of the present invention.
In fig. 2, PCIE _ RDRV _ PP _ CBL _ MX _0 to PCIE _ RDRV _ PP _ CBL _ MX _7 are uplink communication lines between the CPU and the PCIE Switch, and PCIE _ CBL _ PP _ RDRV _ MX _0 to PCIE _ CBL _ PP _ RDRV _ MX _7 are downlink communication lines between the CPU and the PCIE Switch.
That is, when the CPU sends data to the PCIE Switch, the CPU sends data to the PCIE Switch through the PCIE _ RDRV _ PP _ CBL _ MX _0 to PCIE _ RDRV _ PP _ CBL _ MX _ 7; when a PCIE Switch sends data to a CPU, the PCIE Switch sends data to the CPU through PCIE _ CBL _ PP _ RDRV _ MX _0 to PCIE _ CBL _ PP _ RDRV _ MX _7, and PCIE _ RDRV _ PP _ CBL _ MX _ 1_ SPR and PCIE _ CBL _ PP _ RDRV _ MX 1_ SPR are two spare communication lines extended from CBTL 01023.
In the wiring system, output signals of the CBTL01023 are uploaded to the FPGA through the PCA9555, and when the FPGA detects that a certain communication line in the upstream communication lines has a fault, the FPGA informs the CPU to switch the communication line with the fault to a standby communication line PCIE _ CBL _ PP _ RDRV _ MX _ J1_ SPR; when the FPGA detects that one of the downlink communication lines fails, the FPGA informs the CPU to switch the failed communication line to the standby communication line PCIE _ CBL _ PP _ RDRV _ MX _ J1_ SPR. Obviously, with the wiring system of the server provided in this embodiment, when a communication line between the CPU and the PCIE Switch fails, the failed communication line can be switched to the standby communication line, so that a safety problem of the server due to the failure of the communication line is avoided, and thus, the safety of the server in the operation process can be further improved.
Correspondingly, the embodiment of the invention also discloses a server, which comprises the wiring system of the server disclosed as the above.
The server provided by the embodiment of the invention has the beneficial effects of the wiring system of the server disclosed by the embodiment of the invention.
The embodiments are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same or similar parts among the embodiments are referred to each other. Finally, it should also be noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The wiring system of the server and the server provided by the invention are described in detail above, and a specific example is applied in the description to explain the principle and the implementation of the invention, and the description of the above embodiment is only used to help understanding the method of the invention and the core idea thereof; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.

Claims (9)

1. A wiring system for a server, comprising:
the multiplexer is used for establishing communication connection with a CPU (central processing unit) and a target terminal in a target server and expanding a communication line between the CPU and the target terminal to obtain a standby communication line;
the SMBus IO expander is connected with the multiplexer and used for controlling a target output signal of the multiplexer;
and the programmable logic device is connected with the SMBus IO expander and the CPU and used for monitoring a communication line between the CPU and the target terminal according to the target output signal and informing the SMBus IO expander to switch the target communication line to the standby communication line when detecting that the target communication line between the CPU and the target terminal has a fault.
2. Wiring system according to claim 1, characterised in that the multiplexer is in particular CBTL 01023.
3. Wiring system according to claim 1, characterized in that the SMBus IO extender is in particular PCA 9555.
4. Wiring system according to claim 1, characterized in that the SMBus IO extender is in particular PCA 9554.
5. Wiring system according to any of claims 1 to 4, characterized in that the programmable logic device is embodied as an FPGA.
6. The wiring system of claim 5, wherein the FPGA further comprises:
and the display is used for displaying the operation information of the multiplexer.
7. The wiring system of claim 6, wherein the FPGA further comprises:
a memory for storing the operation information.
8. The wiring system of claim 5, wherein the FPGA further comprises:
and the alarm is used for prompting the fault information of the target communication line.
9. A server, characterized by comprising a wiring system of a server according to any one of claims 1 to 8.
CN201911207097.2A 2019-11-29 2019-11-29 Wiring system of server and server Pending CN110990307A (en)

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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5537238A (en) * 1995-04-24 1996-07-16 International Business Machines Corporation Method and apparatus for making wavelength adjustments in a wavelength division multiplex system
CN101854566A (en) * 2009-04-02 2010-10-06 华为技术有限公司 Passive optical network protection method and active/standby switch device and system
CN101938660A (en) * 2009-06-30 2011-01-05 中兴通讯股份有限公司 Service quality detection-based hot backup multiplexing method and system
CN104135433A (en) * 2008-12-05 2014-11-05 思科技术公司 Failover and failback of communication between a router and a network switch
CN108182163A (en) * 2018-01-02 2018-06-19 郑州云海信息技术有限公司 A kind of computing board grade hot plug control device and control method
CN109542735A (en) * 2018-12-18 2019-03-29 山东超越数控电子股份有限公司 A kind of server state monitoring system

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5537238A (en) * 1995-04-24 1996-07-16 International Business Machines Corporation Method and apparatus for making wavelength adjustments in a wavelength division multiplex system
CN104135433A (en) * 2008-12-05 2014-11-05 思科技术公司 Failover and failback of communication between a router and a network switch
CN101854566A (en) * 2009-04-02 2010-10-06 华为技术有限公司 Passive optical network protection method and active/standby switch device and system
CN101938660A (en) * 2009-06-30 2011-01-05 中兴通讯股份有限公司 Service quality detection-based hot backup multiplexing method and system
CN108182163A (en) * 2018-01-02 2018-06-19 郑州云海信息技术有限公司 A kind of computing board grade hot plug control device and control method
CN109542735A (en) * 2018-12-18 2019-03-29 山东超越数控电子股份有限公司 A kind of server state monitoring system

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