CN110957279A - 半导体器件及其形成方法 - Google Patents

半导体器件及其形成方法 Download PDF

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Publication number
CN110957279A
CN110957279A CN201910909760.7A CN201910909760A CN110957279A CN 110957279 A CN110957279 A CN 110957279A CN 201910909760 A CN201910909760 A CN 201910909760A CN 110957279 A CN110957279 A CN 110957279A
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die
connectors
plan
seal rings
semiconductor device
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CN201910909760.7A
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CN110957279B (zh
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刘浩君
萧景文
许国经
李明机
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Abstract

提供了半导体器件及其形成方法。半导体器件包括：管芯结构，包括多个管芯区和多个第一密封环。多个第一密封环中的每一个围绕多个管芯区的相应管芯区。半导体器件还包括围绕多个第一密封环的第二密封环以及接合到管芯结构的多个连接件。多个连接件中的每一个具有细长的平面图形状。多个连接件中的每一个的细长平面图形状的长轴朝向管芯结构的中心定向。

Description

半导体器件及其形成方法
技术领域
本发明的实施例涉及半导体器件及其形成方法。
背景技术
半导体器件用于各种电子应用中，例如个人计算机、手机、数码相机和其他电子器件。通常通过在半导体衬底上顺序沉积绝缘或介电层、导电层和半导体材料层，以及使用光刻图案化各个材料层以在其上形成电路部件和元件来制造半导体器件。
半导体工业通过不断减小最小部件尺寸继续改善各种电子元件(例如，晶体管、二极管、电阻器、电容器等)的集成密度，这允许将更多部件集成到给定区域中。在一些应用中，这些较小的电子部件还需要比传统封装件使用更小面积或更小高度的更小封装件。
因此，新的封装技术已经开始被开发。这些用于半导体器件的相对新型封装技术面临制造挑战。
发明内容
本发明的实施例提供了一种半导体器件，包括：管芯结构，包括多个管芯区；多个第一密封环，所述多个第一密封环中的每一个围绕所述多个管芯区的相应管芯区；第二密封环，围绕所述多个第一密封环；以及多个连接件，接合到所述管芯结构，所述多个连接件中的每一个具有细长的平面图形状，所述多个连接件中的每一个的细长平面图形状的长轴朝向所述管芯结构的中心定向。
本发明的另一实施例提供了一种半导体器件，包括：管芯结构，包括第一区域和第二区域，所述第一区域包括多个第一管芯区，所述第二区域包括多个第二管芯区；多个第一密封环，所述多个第一密封环中的每一个围绕所述多个第一管芯区和所述多个第二管芯区的相应管芯区；第二密封环，围绕所述第一区域和所述第二区域；以及多个连接件，接合到所述管芯结构，所述多个连接件中的每一个具有细长的平面图形状，沿着所述多个连接件中的每一个的细长平面图形状的长轴延伸的线与所述管芯结构的中心相交。
本发明的又一实施例提供了一种形成半导体器件的方法，包括：在晶圆中形成多个单元区，所述多个单元区中的每一个包括多个管芯区；在所述晶圆中形成多个第一密封环，所述多个第一密封环中的每一个围绕所述多个管芯区的相应管芯区；在所述晶圆中形成多个第二密封环，所述多个第二密封环中的每一个围绕所述多个单元区的相应单元区；以及在所述晶圆上形成多个连接件，所述多个连接件中的每一个具有细长的平面图形状，所述多个连接件中的每一个的细长平面图形状的长轴朝向所述多个单元区的相应单元区的中心定向。
附图说明
当结合附图进行阅读时，从以下详细描述可最佳理解本发明的各个方面。应该强调，根据工业中的标准实践，各个部件未按比例绘制并且仅用于说明的目的。实际上，为了清楚的讨论，各个部件的尺寸可以任意地增大或减小。
图1A和图1B示出了根据一些实施例的晶圆的俯视图和截面图。
图2至图7示出了根据一些实施例的连接件的形成中的中间阶段的截面图。
图8示出了根据一些实施例的管芯结构的俯视图。
图9A和图9B示出了根据一些实施例的封装件的俯视图和截面图。
图10和图11示出了根据一些实施例的封装件和接合结构的形成中的中间阶段的截面图。
图12A和图12B示出了根据一些实施例的晶圆的俯视图和截面图。
图13示出了根据一些实施例的管芯结构的俯视图。
图14A和图14B示出了根据一些实施例的封装件的俯视图和截面图。
图15示出了根据一些实施例的管芯结构的俯视图。
图16A和图16B示出了根据一些实施例的封装件的俯视图和截面图。
图17A和图17B示出了根据一些实施例的封装件的俯视图和截面图。
图18A和图18B示出了根据一些实施例的封装件的俯视图和截面图。
图19是示出根据一些实施例的形成管芯结构的方法的流程图。
具体实施方式
以下公开内容提供了许多用于实现本发明的不同特征不同的实施例或实例。下面描述了组件和布置的具体实施例或实例以简化本发明。当然这些仅是实例而不旨在限制。例如，元件的尺寸不限于所公开的范围或值，但可能依赖于工艺条件和/或器件所需的性能。此外，在以下描述中，在第二部件上方或者上形成第一部件可以包括第一部件和第二部件直接接触形成的实施例，并且也可以包括在第一部件和第二部件之间可以形成额外的部件，从而使得第一部件和第二部件可以不直接接触的实施例。为了简单和清楚的目的，各个部件可以以不同的比例任意地绘制。
此外，为了便于描述，本文中可以使用诸如“在…下方”、“在…下面”、“下部”、“在…上面”、“上部”等的空间关系术语，以描述如图中所示的一个元件或部件与另一元件或部件的关系。除了图中所示的方位外，空间关系术语旨在包括器件在使用或操作工艺中的不同方位。装置可以以其它方式定位(旋转90度或在其它方位)，并且在本文中使用的空间关系描述符可以同样地作相应地解释。
将关于特定上下文中的实施例来描述实施例，即，在集成电路封装件中使用的接合结构(诸如焊盘上凸块结构)及其形成方法。然而，其他实施例也可以应用于其他电连接的部件，包括但不限于叠层封装组件、管芯到管芯组件、晶圆到晶圆组件、管芯到衬底组件、组装中封装、处理衬底、插入器等或安装输入部件、板、管芯或其他部件或用于任何类型的集成电路或电子部件的连接封装或安装的组合。
本文描述的各个实施例允许形成用于将多管芯结构接合到衬底的连接件或接合结构，使得接合结构具有沿着从多管芯结构或衬底的中心发出的线对准的细长形状。本文描述的各种实施例还允许在多管芯结构中形成密封环结构。本文描述的各种实施例还允许减少施加在多管芯结构的各个层(例如，低k介电层)上的应力，该应力由于多管芯结构和衬底之间的热膨胀系数(CTE)不匹配而产生。此外，还减小了施加在接合结构上的应力，这改善了接合结构的电学和机械性能。
图1A和图1B示出了根据一些实施例的晶圆100的俯视图和截面图。图1A示出了晶圆100的俯视图，而图1B示出了沿着图1A中所示的线BB的晶圆100的截面图。在一些实施例中，晶圆100包括由划线103(也称为切割线或切割道)分开的单元区101。如下面更详细地描述的，晶圆100将沿着划线103切割以形成单独的管芯结构(例如图8中所示的管芯结构801)。在一些实施例中，每个单元区101是包括多个管芯区的多管芯结构，例如管芯区105、107、109和111。管芯区105、107、109和111中的每一个可以包括集成电路器件，例如逻辑器件、存储器器件(例如，SRAM)、RF器件、输入/输出(I/O)器件、片上系统(SoC)器件、它们的组合或其他合适类型的器件。
在一些实施例中，晶圆100包括衬底113和位于衬底113上的一个或多个有源和/或无源器件115。在一些实施例中，衬底113可以由硅形成，但是它也可以由其他III族、IV族和/或V族元素形成，例如硅、锗、镓、砷及它们的组合。衬底113也可以是绝缘体上硅(SOI)的形式。SOI衬底可以包括在绝缘层(例如，掩埋氧化物等)上形成的半导体材料层(例如，硅、锗等)，绝缘层形成在硅衬底上。另外，可以使用的其他衬底包括多层衬底、梯度衬底、混合取向衬底、它们的任何组合等。在一些实施例中，一个或多个有源和/或无源器件115可以包括各种n型金属氧化物半导体(NMOS)和/或p型金属氧化物半导体(PMOS)器件，例如晶体管、电容器、电阻器、二极管、光电二极管、保险丝等。
在衬底113和一个或多个有源和/或无源器件115上形成介电层117。介电层117可以包括层间电介质(ILD)/金属间介电层(IMD)。ILD/IMD可以通过本领域已知的任何合适的方法(例如旋涂法、化学气相沉积(CVD)、等离子体增强CVD(PECVD)、它们的组合等)由例如低K介电材料形成，例如磷硅酸盐玻璃(PSG)、硼磷硅酸盐玻璃(BPSG)、FSG、SiOxCy、旋涂玻璃、旋涂聚合物、硅碳材料、它们的化合物、它们的复合物、它们的组合等。介电层117可以包括导电互连结构119。在一些实施例中，互连结构119可以包括导线121和导电通孔123。在一些实施例中，可以使用例如镶嵌工艺、双镶嵌工艺等在介电层117形成互连结构119。在一些实施例中，互连结构119可包括铜、铜合金、银、金、钨、钽、铝等。互连结构119将衬底113上的一个或多个有源和/或无源器件115电互连，以在管芯区105、107、109和111内形成功能电路。
介电层106还可以包括延伸穿过介电层117的密封环部分125A和125B。密封环部分125A可以设置在管芯区105、107、109和111的边缘区处，并且在平面图中，密封环部分125A可以环绕或围绕管芯区105、107、109和111的内部部分。密封环部分125B可以设置在单元区101的边缘区，并且在平面图中，密封环部分125B可以环绕或围绕单元区101的内部部分。每个密封环部分125B可以环绕或围绕相应的密封环部分125A。在一些实施例中，密封环部分125A和125B可以包括导线121和导电通孔123，并且可以使用与互连结构119类似的材料和工艺形成。例如，用于形成互连结构119的相同工艺可以同时形成密封环部分125A和125B。在一些实施例中，密封环部分125A和125B可以彼此电隔离。在一些实施例中，密封环部分125A和125B可以与互连结构119电隔离。
在一些实施例中，在介电层117、互连结构119和密封环部分125A和125B上形成钝化层127。在一些实施例中，钝化层127可包括一层或多层不可光图案化的介电材料，例如氮化硅、氧化硅、磷硅酸盐玻璃(PSG)、硼硅酸盐玻璃(BSG)、硼掺杂的磷硅酸盐玻璃(BPSG)、它们的组合等，并且可以使用CVD、物理气相沉积(PVD)、原子层沉积(ALD)、旋涂工艺、它们的组合等形成。在其他实施例中，钝化层127可以包括一层或多层可光图案化的绝缘材料，例如聚苯并恶唑(PBO)、聚酰亚胺(PI)、苯并环丁烯(BCB)等，并且可以使用旋涂工艺等形成。可以使用与光刻胶材料类似的光刻方法来图案化这种可光图案化的介电材料。
在形成钝化层127之后，在钝化层上形成导电焊盘129A、129B和129C。导电焊盘129A物理连接到相应的密封环部分125A。导电焊盘129B物理连接到相应的密封环部分125B。导电焊盘129C物理连接到相应的互连结构119。在一些实施例中，导电焊盘129A、129B和129C包括导电材料，例如铝、铜、钨、银、金、它们的组合等。在一些实施例中，可以使用合适的光刻和蚀刻方法图案化钝化层127，以暴露互连结构119和密封环部分125A和125B。使用例如PVD、ALD、电化学镀、化学镀、它们的组合等在钝化层127上方和在互连结构119和密封环部分125A和125B的暴露部分上方形成合适的导电材料。随后，图案化导电材料以形成导电焊盘129A、129B和129C。在一些实施例中，可以使用合适的光刻和蚀刻方法来图案化导电材料。每个导电焊盘129A可以环绕或围绕管芯区105、107、109和111中的相应一个的内部部分。每个导电焊盘129B可以环绕或围绕相应的一个单元区101的内部部分。
密封环部分125A和导电焊盘129A形成围绕管芯区105、107、109和111中的相应一个的内部部分的密封环131A。密封环部分125B和导电焊盘129B形成环绕相应的一个单元区101的内部部分的密封环131B。每个密封环131B环绕相应的密封环131A。在一些实施例中，密封环131A和131B可以彼此电隔离。在一些实施例中，密封环131A和131B可以与互连结构119电隔离。在一些实施例中，密封环131A和131B可以具有基本相似的结构。在其他实施例中，密封环131A和131B可以具有不同的结构。
在形成导电焊盘129A、129B和129C之后，在导电焊盘129A、129B和129C上形成钝化层133，并且在钝化层133上形成缓冲层135。钝化层133可以使用与钝化层127类似的材料和方法形成，并且在此不再重复描述。在一些实施例中，钝化层133和钝化层127包括相同的材料。在其他实施例中，钝化层133和钝化层127包括不同的材料。在一些实施例中，缓冲层135可包括一层或多层可光图案化的绝缘材料，例如聚苯并恶唑(PBO)、聚酰亚胺(PI)、苯并环丁烯(BCB)、它们的组合等，并且可以使用旋涂工艺等形成。在一些实施例中，缓冲层135部分地(如图1B中的缓冲层135的实线部分所示)或完全(如图1B中的缓冲层135的虚线部分所示)覆盖密封环131A，同时暴露密封环131B。
在形成缓冲层135之后，在相应的导电焊盘129C上形成连接件137。在一些实施例中，每个连接件137延伸穿过缓冲层135和钝化层133并且物理地接触相应的一个导电焊盘129C。在一些实施例中，每个连接件137包括凸块下金属(UBM)层139、位于UBM层139上方的导电柱141以及位于导电柱141上方的焊料层143。在一些实施例中，UBM层139包括扩散阻挡层和晶种层(未单独示出)。扩散阻挡层可以由氮化钽、氮化钛、钽、钛、它们的组合等形成。晶种层可以是形成在扩散阻挡层上的铜晶种层。铜晶种层可以由铜或包括银、铬、镍、锡、金及它们的组合的铜合金中的一种形成。在一些实施例中，UBM层139包括由Ti形成的扩散阻挡层和由Cu形成的晶种层。导电柱141包括导电材料，例如铜、钨、铝、银、金、它们的组合等。在一些实施例中，焊料层143包括合适的焊料材料。焊料材料可以是铅基焊料(例如PbSn组合物)、包括InSb的无铅焊料、锡、银和铜(“SAC”)组合物以及具有共同熔点并且在电气应用中形成导电焊料连接的其他共晶材料。对于无铅焊料，可以使用不同组成的SAC焊料，例如SAC 105(Sn 98.5％，Ag 1.0％，Cu 0.5％)、SAC 305和SAC405。无铅焊料还包括SnCu化合物(不使用银(Ag))和SnAg化合物(不使用铜(Cu))。
进一步参考图1A，在一些实施例中，连接件137具有细长的平面图形状。细长的平面图形状可以是卵形、椭圆形、跑道形等。连接件137布置成使得沿着每个连接件137的细长平面图形状的长轴延伸的线145与单元区101中的相应一个的中心147相交。如图1A所示的连接件137的数量和位置仅作为示例提供。在其他实施例中，连接件137的数量和位置可以根据所得封装器件的设计要求而变化。在一些实施例中，中心147可以是由密封环131B环绕的区域的中心。
图2至图7示出了根据一些实施例的连接件137(参见图1A和图1B)的形成中的中间阶段的截面图。关于连接件137之一描述了形成方法，因为连接件137的其余部分也在相同的形成工艺期间以类似的方式形成。参照图2，在导电焊盘129C上形成钝化层133之后，在钝化层133中形成开口201，以暴露导电焊盘129C的一部分。在钝化层133包括不可光图案化的介电材料的一些实施例中，可以使用合适的光刻和蚀刻方法图案化钝化层133。在形成开口201之后，在钝化层上和开口201中形成缓冲层135。图案化缓冲层135以去除开口201中的缓冲层135的一部分以暴露导电焊盘129C。在一些实施例中，可以使用合适的光刻技术图案化缓冲层135。在图案化缓冲层135之后，UBM层139毯式沉积在缓冲层135上和开口201中。在一些实施例中，UBM层139的各个层可以通过ALD、PVD、溅射、它们的组合等形成。
参考图3，在UBM层139上形成图案化掩模301。在一些实施例中，图案化掩模301包括光刻胶材料或任何可光图案化的材料。在一些实施例中，使用合适的光刻技术图案化图案化掩模301的材料以形成开口303，从而形成图案化掩模301。开口303暴露形成在开口201中的导电焊盘129C上的UBM层139的一部分。
参考图4，导电柱1401形成在由开口201和303形成的组合开口中(参见图3)。在一些实施例中，使用电化学镀工艺、化学镀工艺、ALD、PVD、它们的组合等用合适的导电材料填充组合开口。在一些实施例中，导电柱141部分地填充组合开口，并且组合开口的剩余部分填充有焊料材料以在导电柱141上方形成焊料层143。在一些实施例中，焊料材料可以使用蒸发、电化学镀工艺、化学镀工艺、印刷、焊料转移、它们的组合等形成。
参考图5，在形成导电柱141和焊料层143之后，去除图案化掩模301(参见图4)。在一些实施例中，可以使用例如灰化工艺以及之后的湿清洁工艺来去除包括光刻胶材料的图案化掩模301。
参考图6，在去除图案化掩模301(参见图4)之后，使用例如一个或多个合适的蚀刻工艺去除UBM层139的暴露部分。
参照图7，在去除UBM层139的暴露部分之后，对焊料层143执行回流工艺以将焊料层143的焊料材料再成形为期望的形状。
进一步参考图1A和图1B、图2至图7，在晶圆100上形成连接件137之后，沿相邻密封环131B之间的划线103分割单元区101，以形成单独的管芯结构，例如图8中示出的管芯结构801。分割工艺可以包括锯切工艺、蚀刻工艺、激光烧蚀工艺、它们的组合等。密封环131B在分割期间保护单元区101的各种部件，并且可以减少或防止缺陷的形成(例如，分层、破裂等)。参照图8，由于管芯结构801相应于相应的单元区101(参见图1A)，因此连接件137相对于管芯结构801的中心803定向，中心803与相应单元区101的中心147重合。在管芯结构801具有矩形平面图形状的一些实施例中，管芯结构801在平面图中具有第一宽度W1和第二宽度W2。在一些实施例中，管芯结构801的第一宽度W1可以大于、等于或小于管芯结构801的第二宽度W2。在一些实施例中，管芯结构801的第一宽度W1可以小于约26毫米，例如约26毫米。在一些实施例中，管芯结构801的第二宽度W2可小于约32mm，例如约32mm。在一些实施例中，密封环131B在平面图中具有第一宽度W3和第二宽度W4。在一些实施例中，密封环131B的第一宽度W3可以大于、等于或小于密封环131B的第二宽度W4。在一些实施例中，第一宽度W3可以等于第二宽度W4并且可以等于约21.6μm。在一些实施例中，密封环131A在平面图中具有第一宽度W5和第二宽度W6。在一些实施例中，密封环131A的第一宽度W5可以大于、等于或小于密封环131A的第二宽度W6。在一些实施例中，第一宽度W5可以等于第二宽度W6并且可以等于约21.6μm。连接件137在平面图中具有沿短轴的第一宽度W7和沿长轴的第二宽度W8。在一些实施例中，连接件137的第一宽度W7小于连接件137的第二宽度W8。在一些实施例中，连接件137的第一宽度W7在约30μm和约210μm之间。在一些实施例中，连接件137的第二宽度W8在约40μm和约270μm之间。在一些实施例中，比率W7/W8为约0.75至约0.80。
图9A和图9B示出了根据一些实施例的封装件900的俯视图和截面图。封装件900包括使用接合结构903附接到衬底901的管芯结构801。底部填充材料905形成在管芯结构801和衬底901之间并且围绕接合结构903。底部填充材料905可以例如是液体环氧树脂、可变形凝胶、硅橡胶等，并且分配在结构之间，然后固化硬化。此外，该底部填充材料905可用于减少对接合结构903的损坏并且保护接合结构903。下面参考图10和图11说明用于将管芯结构801接合到衬底901并用于形成接合结构903的工艺步骤，此时提供了详细描述。在一些实施例中，衬底901可以包括类似于上面参考图1A和图1B描述的衬底113的半导体晶圆的一部分，并且这里不再重复描述。在一些实施例中，衬底901还包括无源器件(例如电阻器、电容器、电感器等)或有源器件(例如晶体管)。在一些实施例中，衬底901包括另外的集成电路。衬底901还可以包括衬底通孔(TSV)并且可以是内插器。在一些实施例中，衬底901可以是封装衬底、封装管芯、管芯结构等。在一些实施例中，衬底901还包括连接件907，连接件907可用于将封装件900机械和电连接到外部组件，例如管芯结构、印刷电路板、另一封装件等。在一些实施例中，连接件907可以是焊球、受控塌陷芯片连接(C4)凸块、球栅阵列(BGA)球、微凸块、化学镀镍-化学镀钯浸金技术(ENEPIG)形成的凸块等。
图10和图11示出了根据一些实施例的封装件900和接合结构903(参见图9A和图9B)的形成中的中间阶段的截面图。图10和图11示出了衬底901和管芯结构801的部分的放大视图，其在接合工艺完成之后将成为封装件900的一部分909(参见图9B)。图10示出了在执行接合工艺以形成封装件900之前的管芯结构801和衬底901的相对位置。衬底901可以包括插入在钝化层1003和1005之间的导电焊盘，例如导电焊盘1001。在一些实施例中，钝化层1003和1005可以使用与上面参考图1A和图1B描述的钝化层127类似的材料和方法形成，并且这里不再重复描述。导电焊盘1001可以使用与上面参考图1A和图1B描述的导电焊盘129C类似的材料和方法形成，并且这里不再重复描述。导电焊盘1001被钝化层1005部分地覆盖。在导电焊盘1001上形成焊料层1007，以填充形成在钝化层1005中的开口，用于随后与管芯结构801的相应的连接件137的焊料层143或导电柱141接合(如果省略焊料层143)。可以使用与上面参考图1A、图1B、图4至图7描述的焊料层143类似的材料和方法来形成焊料层1007，并且这里不再重复描述。
参照图11，使焊料层143和1007(参见图10)物理接触并且执行回流工艺以将焊料层143和1007合并成公共焊料层1101，公共焊料层1101将导电焊盘1001接合到导电柱141。UBM层139、导电柱141和焊料层1101形成接合结构903。
进一步参考图9A、图9B、图10和图11，由于管芯结构801和衬底901中的材料之间的不同热膨胀系数(CTE)，它们的相对位置可以在执行热处理(例如上述回流工艺)期间或之后移位。在一些实施例中，相对位置的移位可能导致管芯结构801的连接件137与衬底901的相应焊料层1007之间的未对准，并且降低接合结构903的电气和机械功能。在一些实施例中，相对位置的移位在相对于管芯结构801和衬底901的中心的边缘处更加突出。为了避免管芯结构801的连接件137与衬底901的相应焊料层1007之间的未对准，连接件137布置成使得每个连接件137的细长平面图形状的长轴基本上指向管芯结构801的中心803，以最大化连接件137和相应焊料层1007之间的接合面积。在一些实施例中，管芯结构801的连接件137布置成使得每个连接件137的细长平面图形状的长轴基本上进一步指向衬底901的中心。在这样的实施例中，衬底901的中心在平面图中与管芯结构801的中心803重合。连接件137的这种布置和形状以及因此接合结构903的这种布置和形状减小了接合结构903上的应力。此外，由于在接合工艺(例如，回流工艺)期间管芯结构801和衬底901之间的CTE不匹配而产生的施加在管芯结构801的各个层(例如，图1B中所示的介电层117)上的应力可以减小，这可以防止管芯结构801的各层的破裂或分层。
图12A和图12B示出了根据一些实施例的晶圆1200的俯视图和截面图。图12A示出了晶圆1200的俯视图，而图12B示出了沿着图12A中所示的线BB的晶圆1200的截面图。在一些实施例中，晶圆1200类似于晶圆100，相同的部件由相同的附图标号标记，并且这里不再重复相同部件的描述。在一些实施例中，晶圆1200包括由划线103分开的单元区101。在一些实施例中，晶圆1200可以使用与上面参考图1A、图1B、图2至图7描述的晶圆100类似的材料和方法形成，并且这里不再重复描述。在一些实施例中，密封环131B形成为使得每个密封环131B围绕两个相邻的单元区101以形成双单元区1201。在一些实施例中，连接件137形成在双单元区1201上方，使得沿着每个连接件137的细长平面图形状的长轴延伸的线1203与双单元区1201中的相应一个的中心1205相交。在一些实施例中，中心1205可以是由密封环131B围绕的区域的中心。如图12A所示的连接件137的数量和位置仅作为示例提供。在其他实施例中，连接件137的数量和位置可以根据所得封装器件的设计要求而变化。
进一步参考图12A和图12B，在晶圆1200上形成连接件137之后，沿着相邻密封环131B之间的划线103分割双单元区1201，以形成单独的管芯结构，例如图13中所示的管芯结构1301。分割工艺可以包括锯切工艺、蚀刻工艺、激光烧蚀工艺、它们的组合等。密封环131B在分割期间保护双单元区1201的各种部件，并且可以减少或防止缺陷的形成(例如，分层、破裂等)。参照图13，由于管芯结构1301相应于相应的双单元区1201(参见图12A)，因此连接件137相对于管芯结构1301的中心1303定向，中心1303与相应的双单元区1201的中心1205重合。在管芯结构1301具有矩形平面图形状的一些实施例中，管芯结构1301在平面图中具有第一宽度W9和第二宽度W10。在一些实施例中，管芯结构1301的第一宽度W9可以大于、等于或小于管芯结构1301的第二宽度W10。在一些实施例中，管芯结构1301的第一宽度W9在约26mm和约286mm之间。在一些实施例中，管芯结构1301的第二宽度W10在约32mm和约288mm之间。管芯结构1301也可以称为2x中间掩模结构，而管芯结构801(参见图8)也可以称为1x中间掩模结构。
图14A和图14B示出了根据一些实施例的封装件1400的俯视图和截面图。封装件1400类似于图9A和图9B中所示的封装件900，相同的部件由相同的附图标号标记，并且这里不再重复相同部件的描述。封装件1400包括使用接合结构903附接到衬底901的管芯结构1301。在一些实施例中，可以使用上面参考图10和图11描述的工艺步骤将管芯结构1301接合到衬底901，并且在这里不再重复描述。在一些实施例中，管芯结构1301的中心1303可以在平面图中与衬底901的中心重合。
参考图1A、图1B和图15，在一些实施例中，省略了密封环131B的形成。在这样的实施例中，在晶圆100上形成连接件137之后，沿相邻密封环131A之间的区域分割管芯区105、107、109、111以形成单独的管芯结构，例如图15所示的管芯结构1501、1503、1505和1507。分割工艺可以包括锯切工艺、蚀刻工艺、激光烧蚀工艺、它们的组合等。密封环131A在分割期间保护管芯区105、107、109、111的各种部件，并且可以减少或防止缺陷的形成(例如，分层、破裂等)。管芯结构1501相应于管芯区105，管芯结构1503相应于管芯区107，管芯结构1505相应于管芯区109，管芯结构1507相应于管芯区111。
图16A和图16B示出了根据一些实施例的封装件1600的俯视图和截面图。图16A示出了封装件1600的俯视图，而图16B示出了沿图16A中所示的线BB的封装件1600的截面图。封装件1600类似于图9A和图9B中所示的封装件900，其中相同的部件由相同的附图标号标记，并且这里不再重复相同部件的描述。封装件1600包括使用接合结构903附接到衬底901的管芯结构1501、1503、1505和1507。底部填充材料905形成在管芯结构1501、1503、1505和1507与衬底901之间以及接合结构903周围。在一些实施例中，可以使用上面参考图10和图11描述的工艺步骤将管芯结构1501、1503、1505和1507接合到衬底901，并且这里不再重复描述。在一些实施例中，管芯结构1501、1503、1505和1507布置在衬底901上，使得沿着每个连接件137的细长平面图形状的长轴延伸的线1601与衬底901的中心1603相交。
图17A和图17B示出了根据一些实施例的封装件1700的俯视图和截面图。图17A示出了封装件1700的俯视图，而图17B示出了沿图17A中所示的线BB的封装件1700的截面图。封装件1700类似于图9A和图9B中所示的封装件900，其中相同的部件由相同的附图标号标记，并且这里不再重复相同部件的描述。除了管芯结构801之外，封装件1700还包括使用接合结构1703附接到衬底901的器件1701。器件1701可以是分立无源器件(DPD)、表面安装器件(SMD)、它们的组合等。器件1701可以包括一个或多个无源器件，例如电阻器、电容器、电感器、熔丝、它们的组合等。在一些实施例中，可以使用与上面参考图10和图11描述的接合结构903类似的材料和方法来形成接合结构1703，并且这里不再重复描述。在其他实施例中，接合结构1703可以是焊球、C4凸块、BGA球、微凸块、ENEPIG形成的凸块等。在一些实施例中，管芯结构801布置在衬底901上，使得沿着每个连接件137的细长平面图形状的长轴延伸的线1601与衬底901的中心1603相交。
图18A和图18B示出了根据一些实施例的封装件1800的俯视图和截面图。图18A示出了封装件1800的俯视图，而图18B示出了沿图18A中所示的线BB的封装件1800的截面图。封装件1800类似于图14A、图14B、图17A和图17B中所示的封装件1400和1700，其中相同的部件由相同的附图标号标记，并且这里不再重复相同部件的描述。与封装件1700不同，封装件1800包括管芯结构1301而不是管芯结构801。在一些实施例中，管芯结构1301布置在衬底901上，使得每个连接件137的细长平面图形状的长轴延伸的线1601与衬底901的中心1603相交。
图19是示出根据一些实施例的形成管芯结构的方法1900的流程图。方法1900从步骤1901开始，其中在晶圆(例如图1A和图1B中所示的晶圆100)中形成多个管芯区(诸如图1A中所示的管芯区105、107、109和111)，如上面参考图1A和图1B所述。在步骤1903中，如上参考图1A和图1B所述，在晶圆中形成多个第一密封环(例如图1A和图1B中所示的密封环131A)和第二密封环(例如图1A和图1B中所示的密封环131B)。在一些实施例中，多个第一密封环中的每一个围绕相应的一个管芯区。在一些实施例中，第二密封环围绕多个第一密封环。在一些实施例中，多个第一密封环和第二密封环通过相同的工艺同时形成。在这样的实施例中，可以使用相同的掩模(或多个掩模)同时对多个第一密封环的部件和第二密封环的部件进行图案化。在替代实施例中，多个第一密封环和第二密封环通过不同的工艺形成。在这样的实施例中，可以在不同的时间使用不同的掩模在形成第二密封环之前或之后形成多个第一密封环。在其他替代实施例中，可以省略第二密封环的形成。在步骤1905中，如上面参考图1A、图1B和图2至图7所述，在晶圆上形成连接件(例如图1A和图1B中所示的连接件137)。在步骤1907中，将晶圆分割成多个管芯结构(例如图8中所示的管芯结构801)，如上面参考图1A、图1B和图8所述。
根据一个实施例，一种器件包括：管芯结构，包括多个管芯区；多个第一密封环，多个第一密封环中的每一个围绕多个管芯区的相应管芯区；第二密封环，围绕多个第一密封环；以及多个连接件，接合到管芯结构，多个连接件中的每一个具有细长的平面图形状，多个连接件中的每一个的细长平面图形状的长轴朝向管芯结构的中心定向。在一个实施例中，该器件还包括附接到多个连接件的衬底。在一个实施例中，管芯结构的中心在平面图中与衬底的中心重合。在一个实施例中，管芯结构的中心与由第二密封环围绕的区域的中心重合。在一个实施例中，多个连接件中的每一个包括：导电柱；和位于导电柱上的焊料层。在一个实施例中，多个管芯区中的第一管芯区在平面图中具有第一面积，多个管芯区中的第二管芯区在平面图中具有第二面积，并且第二面积不同于第一面积。在一个实施例中，细长的平面图形状是卵形、椭圆形或跑道形。
根据另一实施例，一种器件，包括：管芯结构，包括第一区域和第二区域，所述第一区域包括多个第一管芯区，所述第二区域包括多个第二管芯区；多个第一密封环，多个第一密封环中的每一个围绕多个第一管芯区和多个第二管芯区的相应管芯区；第二密封环，围绕第一区域和第二区域；以及多个连接件，接合到管芯结构，多个连接件中的每一个具有细长的平面图形状，沿着多个连接件中的每一个的细长平面图形状的长轴延伸的线与管芯结构的中心相交。在一个实施例中，第一区域和第二区域在平面图中具有相同的面积。在一个实施例中，第二密封环围绕多个第一密封环。在一个实施例中，多个第一管芯区中的管芯区的数量与多个第二管芯区中的管芯区的数量相同。在一个实施例中，该器件还包括物理附接到多个连接件的衬底。在一个实施例中，管芯结构的中心在平面图中与衬底的中心重合。在一个实施例中，管芯结构的中心与由第二密封环围绕的区域的中心重合。
根据又一实施例，一种方法包括：在晶圆中形成多个单元区，所述多个单元区中的每一个包括多个管芯区；在晶圆中形成多个第一密封环，多个第一密封环中的每一个围绕多个管芯区的相应管芯区；在晶圆中形成多个第二密封环，多个第二密封环中的每一个围绕多个单元区的相应单元区；以及在所述晶圆上形成多个连接件，所述多个连接件中的每一个具有细长的平面图形状，所述多个连接件中的每一个的细长平面图形状的长轴朝向多个单元区的相应单元区的中心定向。在一个实施例中，该方法还包括分割晶圆以形成多个管芯区。在一个实施例中，分割晶圆包括沿着设置在相邻的第二密封环之间的晶圆的区域进行锯切。在一个实施例中，多个管芯区中的每一个包括多个单元区中的相应单元区。在一个实施例中，多个管芯区中的每一个包括多个单元区中的相应的一对单元区。在一个实施例中，该方法还包括在晶圆中形成多个互连结构，其中，多个互连结构、多个第一密封环和多个第二密封环通过相同的工艺同时形成。
还可以包括其他部件和工艺。例如，可以包括测试结构以帮助3D封装或3DIC器件的验证测试。测试结构可以包括例如在再分布层中或在衬底上形成的允许3D封装或3DIC的测试、探针和/或探针卡的使用等的测试焊盘。验证测试可以在中间结构以及最终结构上执行。另外，本文公开的结构和方法可以与测试方法结合使用，测试方法结合已知良好管芯的中间验证以增加产量并降低成本。
上面概述了若干实施例的特征，使得本领域人员可以更好地理解本发明的方面。本领域人员应该理解，它们可以容易地使用本发明作为基础来设计或修改用于实施与本文所介绍实施例相同的目的和/或实现相同优势的其它工艺和结构。本领域技术人员也应该意识到，这种等同构造并且不背离本发明的精神和范围，并且在不背离本发明的精神和范围的情况下，本文中它们可以做出多种变化、替换以及改变。

Claims (10)

1.一种半导体器件，包括：
管芯结构，包括多个管芯区；
多个第一密封环，所述多个第一密封环中的每一个围绕所述多个管芯区的相应管芯区；
第二密封环，围绕所述多个第一密封环；以及
多个连接件，接合到所述管芯结构，所述多个连接件中的每一个具有细长的平面图形状，所述多个连接件中的每一个的细长平面图形状的长轴朝向所述管芯结构的中心定向。
2.根据权利要求1所述的半导体器件，还包括附接到所述多个连接件的衬底。
3.根据权利要求2所述的半导体器件，其中，所述管芯结构的中心在平面图中与所述衬底的中心重合。
4.根据权利要求1所述的半导体器件，其中，所述管芯结构的中心与由所述第二密封环围绕的区域的中心重合。
5.根据权利要求1所述的半导体器件，其中，所述多个连接件中的每一个包括：
导电柱；和
焊料层，位于所述导电柱上。
6.根据权利要求1所述的半导体器件，其中，所述多个管芯区中的第一管芯区在平面图中具有第一面积，其中，所述多个管芯区中的第二管芯区在平面图中具有第二面积，并且其中，所述第二面积不同于所述第一面积。
7.根据权利要求1所述的半导体器件，其中，所述细长的平面图形状是卵形、椭圆形或跑道形。
8.一种半导体器件，包括：
管芯结构，包括第一区域和第二区域，所述第一区域包括多个第一管芯区，所述第二区域包括多个第二管芯区；
多个第一密封环，所述多个第一密封环中的每一个围绕所述多个第一管芯区和所述多个第二管芯区的相应管芯区；
第二密封环，围绕所述第一区域和所述第二区域；以及
多个连接件，接合到所述管芯结构，所述多个连接件中的每一个具有细长的平面图形状，沿着所述多个连接件中的每一个的细长平面图形状的长轴延伸的线与所述管芯结构的中心相交。
9.根据权利要求8所述的半导体器件，其中，所述第一区域和所述第二区域在平面图中具有相同的面积。
10.一种形成半导体器件的方法，包括：
在晶圆中形成多个单元区，所述多个单元区中的每一个包括多个管芯区；
在所述晶圆中形成多个第一密封环，所述多个第一密封环中的每一个围绕所述多个管芯区的相应管芯区；
在所述晶圆中形成多个第二密封环，所述多个第二密封环中的每一个围绕所述多个单元区的相应单元区；以及
在所述晶圆上形成多个连接件，所述多个连接件中的每一个具有细长的平面图形状，所述多个连接件中的每一个的细长平面图形状的长轴朝向所述多个单元区的相应单元区的中心定向。
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