CN110914749A - Photosensitive circuit, preparation method of photosensitive circuit and display device - Google Patents
Photosensitive circuit, preparation method of photosensitive circuit and display device Download PDFInfo
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- CN110914749A CN110914749A CN201780093255.9A CN201780093255A CN110914749A CN 110914749 A CN110914749 A CN 110914749A CN 201780093255 A CN201780093255 A CN 201780093255A CN 110914749 A CN110914749 A CN 110914749A
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
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Abstract
A photosensitive circuit (10), a preparation method of the photosensitive circuit (10) and a display device are provided. The photosensitive circuit (10) comprises a first thin film transistor (Tr) and a second thin film transistor (Tp), a drain electrode (100) of the second thin film transistor is electrically connected with a source electrode (110, 191) of the first thin film transistor, the first thin film transistor comprises a first active layer (120), the second thin film transistor comprises a second active layer (130), the first active layer (120) comprises a first semiconductor part (121), the second active layer (130) comprises a second semiconductor part (131), the first and second semiconductor parts (131) are arranged at the same layer and at intervals, the first active layer (120) comprises a third semiconductor part (122), the third semiconductor part (122) is arranged on the first semiconductor part (121), the second active layer (130) comprises a fourth semiconductor part (132), the fourth semiconductor part (132) is arranged on the second semiconductor part (131), the third and fourth semiconductor parts (132) are arranged at the same layer and at intervals, the first semiconductor section (121) is adjacent to the gate electrode (140) of the first thin film transistor, the fourth semiconductor section (132) is adjacent to the gate electrode (150) of the second thin film transistor, the density of defect states of the third semiconductor section (122) is higher than the density of defect states of the first semiconductor section (121), and the density of defect states of the fourth semiconductor section (132) is higher than the density of defect states of the second semiconductor section (131).
Description
The invention relates to the field of photosensitive circuits, in particular to a photosensitive circuit, a preparation method of the photosensitive circuit and a display device.
In recent years, thin film transistors have been increasingly emphasized because of their advantages such as high mobility, good light transmittance, stable thin film structure, low manufacturing temperature, and low cost. The development of thin film transistors is mainly aimed at flat panel displays, flexible electronic devices, transparent electronic devices, liquid crystal displays, organic light emitting diodes, sensors, and the like. However, when the thin film transistor is applied to a photosensitive circuit, the photosensitive circuit has a poor photosensitivity.
Disclosure of Invention
The embodiment of the invention provides a photosensitive circuit. The photosensitive circuit comprises a first thin film transistor and a second thin film transistor, wherein the drain electrode of the second thin film transistor is electrically connected with the source electrode of the first thin film transistor, the first thin film transistor comprises a first active layer, the second thin film transistor comprises a second active layer, the first active layer comprises a first semiconductor part, the second active layer comprises a second semiconductor part, the second semiconductor part and the first semiconductor part are positioned on the same layer and are arranged at intervals, the first active layer further comprises a third semiconductor part, the third semiconductor part is arranged on the first semiconductor part, the second active layer further comprises a fourth semiconductor part, the fourth semiconductor part is arranged on the second semiconductor part, the fourth semiconductor part and the third semiconductor part are positioned on the same layer and are arranged at intervals, the first semiconductor part is adjacent to the grid electrode of the first thin film transistor compared with the third semiconductor part, the fourth semiconductor portion is closer to the gate electrode of the second thin film transistor than the second semiconductor portion, the third semiconductor portion has a higher density of defect states than the first semiconductor portion, the fourth semiconductor portion has a higher density of defect states than the second semiconductor portion, and the first active layer and the second active layer are both oxide semiconductor layers.
Compared with the prior art, the photosensitive circuit of the invention is provided with two thin film transistors, the density of the defect states of the third semiconductor part in the first thin film transistor is greater than that of the defect states of the first semiconductor part, and the first semiconductor part is arranged adjacent to the first grid electrode of the first thin film transistor compared with the third semiconductor part. When the first thin film transistor is in operation, as the first semiconductor part is arranged adjacent to the first gate of the first thin film transistor compared with the third semiconductor part, most of carriers in a channel layer formed by the first semiconductor part and the third semiconductor part flow through the first semiconductor part, and the density of defect states of the first semiconductor part is low, so that the first thin film transistor has high electron mobility and good threshold voltage stability. The fourth semiconductor portion of the second thin film transistor has a density of defect states greater than a density of defect states of the second semiconductor portion, and the fourth semiconductor portion is disposed adjacent to the second gate of the second thin film transistor as compared to the second semiconductor portion. When the second thin film transistor is in operation, as the fourth semiconductor portion is disposed adjacent to the second gate of the second thin film transistor compared to the second semiconductor portion, most of carriers in a channel layer formed by the second semiconductor portion and the fourth semiconductor portion flow through the fourth semiconductor portion, and the density of defect states of the fourth semiconductor portion is high, so that the second thin film transistor has low electron mobility and low threshold voltage stability. When the thin film transistor manufactured by the preparation method is applied to a photosensitive circuit, the light sensitivity of the photosensitive circuit can be improved.
An embodiment of the present invention further provides a display device, where the display device includes the photosensitive circuit according to any one of the foregoing embodiments.
The embodiment of the invention also provides a preparation method of the photosensitive circuit, the photosensitive circuit comprises a first thin film transistor and a second thin film transistor, the drain electrode of the second thin film transistor is electrically connected with the source electrode of the first thin film transistor, and the preparation method of the photosensitive circuit comprises the following steps:
providing a substrate;
forming first semiconductor parts with first density of defect states and second semiconductor parts with second density of defect states, which are arranged at intervals, on the same side of the substrate;
forming a third semiconductor portion having a third density of defect states corresponding to the first semiconductor portion, and forming a fourth semiconductor portion having a fourth density of defect states corresponding to the second semiconductor portion, wherein the third density is higher than the first density, and the fourth density is higher than the second density; the third semiconductor portion and the first semiconductor portion constitute an active layer of the first thin film transistor, the fourth semiconductor portion and the second semiconductor portion constitute an active layer of the second thin film transistor, the first semiconductor portion is closer to a gate electrode of the first thin film transistor than the third semiconductor portion, the fourth semiconductor portion is closer to the gate electrode of the second thin film transistor than the second semiconductor portion, and the active layer of the first thin film transistor and the active layer of the second thin film transistor are both oxide semiconductor layers.
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.
Fig. 1 is a schematic circuit structure diagram of a photosensitive circuit provided by the present invention.
Fig. 2 is a schematic structural diagram of a photosensitive circuit according to a first embodiment of the invention.
Fig. 3 is an enlarged schematic view of a portion I of the light sensing circuit according to the first embodiment of the invention.
Fig. 4 is an enlarged schematic view of a portion II of the light sensing circuit according to the first embodiment of the invention.
Fig. 5 is a schematic structural diagram of a photosensitive circuit according to a second embodiment of the invention.
Fig. 6 is an enlarged schematic view of a portion III of a photosensitive circuit according to a second embodiment of the present invention.
Fig. 7 is an enlarged schematic view of a portion IV of the photosensitive circuit according to the second embodiment of the present invention.
Fig. 8 is a flowchart of a method for manufacturing a photo sensor circuit according to a preferred embodiment of the invention.
Fig. 9 to 13 are flow charts corresponding to respective steps of a method for manufacturing a light sensing circuit according to an embodiment of the present invention.
Fig. 14 to fig. 15 are flow charts corresponding to some steps of a manufacturing method of a light sensing circuit according to a second embodiment of the present invention.
Fig. 16 is a schematic structural diagram of a display device according to a preferred embodiment of the invention.
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1, fig. 2, fig. 3 and fig. 4, fig. 1 is a schematic circuit structure diagram of a photosensitive circuit according to the present invention. Fig. 2 is a schematic structural diagram of a photosensitive circuit according to a first embodiment of the invention. Fig. 3 is an enlarged schematic view of a portion I of the light sensing circuit according to the first embodiment of the invention. Fig. 4 is an enlarged schematic view of a portion II of the light sensing circuit according to the first embodiment of the invention. The light sensing circuit 10 includes a first thin film transistor Tr and a second thin film transistor Tp, and a second drain electrode 100 of the second thin film transistor Tp is electrically connected to a first source electrode 110 of the first thin film transistor Tr. The first thin film transistor Tr includes a first active layer 120, and the second thin film transistor Tp includes a second active layer 130. The first active layer 120 includes a first semiconductor portion 121, and the second active layer 130 includes a second semiconductor portion 131. The second semiconductor portion 131 and the first semiconductor portion 121 are disposed at the same layer and spaced apart from each other. The first active layer 120 further includes a third semiconductor portion 122, and the third semiconductor portion 122 is disposed on the first semiconductor portion 121. The second active layer 130 further includes a fourth semiconductor portion 132, and the fourth semiconductor portion 132 is disposed on the second semiconductor portion 131. The fourth semiconductor section 132 is located at the same layer as the third semiconductor section 122 and spaced apart from the same layer. The first semiconductor section 121 is adjacent to the first gate electrode 140 of the first thin film transistor Tr than the third semiconductor section 122, and the fourth semiconductor section 132 is adjacent to the second gate electrode 150 of the second thin film transistor Tp than the second semiconductor section 131. The density of the defect states of the third semiconductor portion 122 is higher than the density of the defect states of the first semiconductor portion 121, and the density of the defect states of the fourth semiconductor portion 132 is higher than the density of the defect states of the second semiconductor portion 131. Wherein the first active layer 120 and the second active layer 130 are both oxide semiconductor layers. The first thin film transistor Tr has a bottom-gate structure, and the second thin film transistor Tp has a top-gate structure.
The first active layer 120 and the second active layer 130 are both Oxide semiconductor layers, for example, the first active layer 120 and the second active layer 130 may be, but not limited to, Indium Gallium Zinc Oxide (IGZO) or the like.
The first semiconductor portion 121 and the second semiconductor portion 131 are formed in the same process, and the third semiconductor portion 122 and the fourth semiconductor portion 132 are formed in the same process.
Specifically, the first semiconductor section 121 and the second semiconductor section 131 may be formed of the same semiconductor layer by etching, and have the same physical properties. For example, the first semiconductor portion 121 and the second semiconductor portion 131 have the same defect state density, so that the first semiconductor portion 121 and the second semiconductor portion 131 have the same electron mobility, the same photo-sensitive property, and the like. Similarly, the third semiconductor section 122 and the fourth semiconductor section 132 may be formed of the same semiconductor layer by etching treatment, and have the same physical properties. For example, the third semiconductor portion 122 and the fourth semiconductor portion 132 have the same defect state density, so that the third semiconductor portion 122 and the fourth semiconductor portion 132 have the same electron mobility and the same photo sensitivity.
In this embodiment, the density of the defect states of the first semiconductor portion 121 is the same as the density of the defect states of the second semiconductor portion 131, and the density of the defect states of the third semiconductor portion 122 is the same as the density of the defect states of the fourth semiconductor portion 132. The first semiconductor portion 121 and the second semiconductor portion 131 are formed of the same semiconductor layer by etching, and have the same defect state density. Similarly, the third semiconductor section 122 and the fourth semiconductor section 132 are formed of the same semiconductor layer by etching treatment, and have the same defect state density.
It is understood that in other embodiments, the first semiconductor portion 121 and the third semiconductor portion 122 are a unitary structure, and the defect state density of the first semiconductor portion 121 increases linearly from the surface 1221 far away from the third semiconductor portion 122 to the surface 1221 near the third semiconductor portion 122. The defect state density of the third semiconductor section 122 increases linearly from the surface 1211 adjacent to the first semiconductor section 121 to the surface 1211 distant from the first semiconductor section 121. The defect state density of the first semiconductor portion 121 increases linearly from the surface 1221 far away from the third semiconductor portion 122 to the surface 1211 near to the third semiconductor portion 122, so that the defect state density of the first semiconductor portion 121 is adjustable, and the light sensitivity of the light sensing circuit 10 is improved.
Specifically, the first semiconductor section 121 and the third semiconductor section 122 may be integrated or may be two independent structures. The defect state density of the first semiconductor portion 121 gradually increases from a surface adjacent to the first gate electrode 140 to a surface away from the first gate electrode 140. The defect state density of the third semiconductor portion 122 gradually increases from the surface adjacent to the first gate 140 to the surface distant from the first gate 140, and it is satisfied that the defect state density of the first semiconductor portion 121 is smaller than the defect state density of the third semiconductor portion 122. In this embodiment, the defect state density of the first semiconductor portion 121 and the third semiconductor portion 122 can be set in a manner that the defect state density of the first semiconductor portion 121 and the third semiconductor portion 122 can be adjusted at the same time, so as to improve the light sensitivity of the light sensing circuit 10.
In this embodiment, the second semiconductor portion 131 and the fourth semiconductor portion 132 are integrated, and the defect state density of the second semiconductor portion 131 increases linearly from a surface 1321 far away from the fourth semiconductor portion 132 to a surface 1321 near the fourth semiconductor portion 132. The defect state density of the fourth semiconductor section 132 increases linearly from the surface 1311 adjacent to the second semiconductor section 131 to the surface 1311 distant from the second semiconductor section 131. In this embodiment, the defect state density of the second semiconductor portion 131 linearly increases from the surface 1321 far away from the fourth semiconductor portion 132 to the surface 1321 near the fourth semiconductor portion 132, so that the defect state density of the second semiconductor portion 131 is adjustable, and the light sensitivity of the light sensing circuit 10 is improved.
Specifically, the second semiconductor portion 131 and the fourth semiconductor portion 132 may be integrated, or may be two independent structures, and the defect state density of the second semiconductor portion 131 gradually increases from a position away from the second gate 150 to a position closer to the second gate 150. The defect state density of the fourth semiconductor portion 132 gradually increases from a direction away from the second gate 150 to a direction closer to the second gate 150, and the defect state density of the second semiconductor portion 131 is smaller than the defect state density of the fourth semiconductor portion 132.
In this embodiment, the first thin film transistor Tr and the second thin film transistor Tp are disposed on the same substrate 160, the first thin film transistor Tr further includes a first gate electrode 140, a first drain electrode 191, and a first source electrode 110, and the second thin film transistor Tp further includes a second gate electrode 150, a second source electrode 192, and a second drain electrode 100. The first gate electrode 140 is disposed on a surface of the substrate 160. A first gate insulating layer 180 covers the first gate 140. The first semiconductor portion 121 and the second semiconductor portion 131 are disposed on the first gate insulating layer 180 at an interval, and the first semiconductor portion 121 is disposed corresponding to the first gate electrode 140. The first drain electrode 191 and the first source electrode 110 are disposed to cover both ends of the third semiconductor portion 122 at an interval. The second source 192 and the second drain 100 respectively cover two ends of the fourth semiconductor portion 132 and are spaced apart from each other, and the second drain 100 is connected to the first source 110. A second gate insulating layer 200 covers the first drain 191, the first source 110, the second drain 100, and the second source 192. The second gate 150 is disposed on the second gate insulating layer 200 and corresponds to a gap between the second source 192 and the second drain 100.
Wherein a passivation layer 170 covers the second gate 150. Wherein the first gate electrode 140 is disposed on the surface of the substrate 160 through a buffer layer (not shown). The buffer layer serves to buffer damage of the substrate 160 caused during the preparation of each film layer. The material of the first gate insulating layer 180 and the second gate insulating layer 200 may be, but is not limited to, silicon oxide or silicon nitride.
The operating principle of the inventive light sensing circuit 10 is described as follows. The threshold voltage Vth of the thin film transistor is shifted by a voltage (positive or negative) applied to the gate of the thin film transistor or light irradiation. The time of applying a voltage to the gate of the thin film transistor, the wavelength and intensity of the irradiation light, affect the shift of the threshold voltage Vth of the thin film transistor.
The gate of the thin film transistor is positively biased to increase the threshold voltage Vth of the thin film transistor, and the gate of the thin film transistor is negatively biased to decrease the threshold voltage Vth of the thin film transistor. And the light irradiation causes the threshold voltage Vth of the thin film transistor to decrease. When the gate of the thin film transistor is loaded with a positive bias voltage and acts simultaneously with the illumination (PBIS), the illumination can offset the increase of the threshold voltage of the thin film transistor caused by the loading of the gate of the thin film transistor with the positive bias voltage to a certain extent. The greater the intensity of illumination, the less speed the PBIS causes the increase in the thin film transistors. When the gate of the thin film transistor is applied with a negative bias voltage simultaneously with light irradiation (NBIS), the greater the intensity of light irradiation, the greater the speed at which the threshold voltage Vth of the thin film transistor decreases. Therefore, when the voltage applied to the thin film transistor is constant, the change speed of the threshold voltage Vth of the thin film transistor can represent the change in the light intensity.
In the light receiving circuit 10 of the present invention, NBIS is applied to the second thin film transistor Tp; only a gate voltage is applied to the first thin film transistor Tr, and no light (NBS) is applied. Under the action of light irradiation, the negative shift of the threshold voltage of the second thin film transistor Tp is larger than that of the first thin film transistor Tr in the same time, so that the amount of resistance reduction of the second thin film transistor Tp is larger, thereby causing the voltage of the node Vn connecting the first source electrode 110 of the first thin film transistor Tr and the second drain electrode 100 of the second thin film transistor Tp to change. From the change in voltage of the node Vn, the intensity of illumination can be determined. Due to the shift of the threshold voltage, the resistance of the second thin film transistor Tp is much smaller than that of the first thin film transistor Tr, the voltage of the node Vn changes from high level to low level, and the time taken for the process of this transition is inversely related to the intensity of the illumination. That is, the greater the illumination intensity, the shorter the time taken for the process of this transition; the smaller the illumination intensity, the longer it takes for the process of this transition. Thereafter, PBIS is applied to the second thin film transistor Tp to shift the threshold voltage Vth thereof in the forward direction until the voltage of the node Vn changes from the low level to the high level, so that the threshold voltage Vth of the second thin film transistor Tp is restored to the initial state. The stability of the threshold voltage Vth of the first thin film transistor Tr is better when the first thin film transistor Tr is under the action of gate bias; however, the stability of the threshold voltage Vth of the second thin film transistor Tp may be suitably inferior to provide the light sensitivity of the light sensing circuit 10.
In the present invention, the density of the defect states of the third semiconductor portion 122 in the first thin film transistor Tr is greater than the density of the defect states of the first semiconductor portion 121, and the first semiconductor portion 121 is disposed adjacent to the first gate electrode 140 of the first thin film transistor Tr than the third semiconductor portion 122. When the first thin film transistor Tr is in operation, since the first semiconductor portion 121 is disposed adjacent to the first gate electrode 140 of the first thin film transistor Tr compared to the third semiconductor portion 122, most of carriers in a channel layer formed by the first semiconductor portion 121 and the third semiconductor portion 122 flow through the first semiconductor portion 121, and the density of defect states of the first semiconductor portion 121 is low, so that the first thin film transistor Tr has high electron mobility and good threshold voltage stability.
The density of the defect states of the fourth semiconductor section 132 in the second thin film transistor Tp is greater than the density of the defect states of the second semiconductor section 131, and the fourth semiconductor section 132 is disposed adjacent to the second gate electrode 150 of the second thin film transistor Tp compared to the second semiconductor section 131. When the second thin film transistor Tp is in operation, since the fourth semiconductor portion 132 is disposed adjacent to the second gate 150 of the second thin film transistor Tp compared to the second semiconductor portion 131, most of the carriers in the channel layer formed by the second semiconductor portion 131 and the fourth semiconductor portion 132 flow through the fourth semiconductor portion 132, and the density of the defect states of the fourth semiconductor portion 132 is large, so that the second thin film transistor Tp has a low electron mobility, a low threshold voltage stability, and a high photo sensitivity.
Compared to the prior art, the light sensing circuit 10 of the present invention has two thin film transistors, and the second drain 100 of the second thin film transistor Tp is electrically connected to the first source 110 of the first thin film transistor Tr, the density of the defect states of the third semiconductor portion 122 in the first thin film transistor Tr is greater than the density of the defect states of the first semiconductor portion 121, and the first semiconductor portion 121 is disposed adjacent to the first gate 140 of the first thin film transistor Tr than the third semiconductor portion 122. When the first thin film transistor Tr is in operation, since the first semiconductor portion 121 is disposed adjacent to the first gate electrode 140 of the first thin film transistor Tr compared to the third semiconductor portion 122, most of carriers in a channel layer formed by the first semiconductor portion 121 and the third semiconductor portion 122 flow through the first semiconductor portion 121, and the density of defect states of the first semiconductor portion 121 is low, so that the first thin film transistor Tr has high electron mobility and good threshold voltage stability. The density of the defect states of the fourth semiconductor section 132 in the second thin film transistor Tp is greater than the density of the defect states of the second semiconductor section 131, and the fourth semiconductor section 132 is disposed adjacent to the second gate electrode 150 of the second thin film transistor Tp compared to the second semiconductor section 131. When the second thin film transistor Tp is in operation, since the fourth semiconductor portion 132 is disposed adjacent to the second gate 150 of the second thin film transistor Tp compared to the second semiconductor portion 131, most of the carriers in the channel layer formed by the second semiconductor portion 131 and the fourth semiconductor portion 132 flow through the fourth semiconductor portion 132, and the density of the defect states of the fourth semiconductor portion 132 is high, so that the second thin film transistor Tp has low electron mobility and low threshold voltage stability. When the thin film transistor manufactured by the manufacturing method is applied to the light sensing circuit 10, the light sensitivity of the light sensing circuit 10 can be improved.
Referring to fig. 1, fig. 5, fig. 6 and fig. 7, fig. 1 is a schematic circuit structure diagram of the light sensing circuit according to the present invention. Fig. 5 is a schematic structural diagram of a photosensitive circuit according to a second embodiment of the invention. Fig. 6 is an enlarged schematic view of a portion III of a photosensitive circuit according to a second embodiment of the present invention. Fig. 7 is an enlarged schematic view of a portion IV of the photosensitive circuit according to the second embodiment of the present invention. In this embodiment, the first thin film transistor Tr and the second thin film transistor Tp are disposed on the same substrate 160, and the first thin film transistor Tr further includes a first gate electrode 140, a first drain electrode 191, and a first source electrode 110. The second thin film transistor Tp further includes a second gate electrode 150, a second source electrode 192, and a second drain electrode 100. The first gate electrode 140 is disposed on a surface of the substrate 160. A first gate insulating layer 180 covers the first gate 140. The first semiconductor portion 121 and the second semiconductor portion 131 are disposed on the first gate insulating layer 180 at an interval, and the first semiconductor portion 121 is disposed corresponding to the first gate electrode 140. The etching stopper layer 210 covers the third semiconductor portion 122 and the fourth semiconductor portion 132, the etching stopper layer 210 is provided with a first through hole 211, a second through hole 212, a third through hole 213, and a fourth through hole 214, the first through hole 211 and the second through hole 212 are respectively disposed corresponding to two ends of the third semiconductor portion 122, and the third through hole 213 and the fourth through hole 214 are respectively disposed corresponding to two ends of the fourth semiconductor portion 132. The first source electrode 110, the first drain electrode 191, the second source electrode 192, the second drain electrode 100, and the second gate electrode 150 are disposed on the etch stopper 210. The etching barrier layer 210 functions to prevent an etching liquid used in the process of forming the first source electrode 110, the first drain electrode 191, the second source electrode 192, and the second drain electrode 100 by etching from damaging the first gate insulating layer 180 covering under the etching barrier layer 210. The etch stopper layer 210 may function as an etch stopper to protect the structure of the first gate insulating layer 180 from being damaged. The first drain electrode 191 is connected to one end of the third semiconductor portion 122 through the first via hole 211. The first source electrode 110 is connected to the other end of the third semiconductor portion 122 through the second via hole 212, and the first source electrode 110 and the first drain electrode 191 are spaced apart from each other. The second drain 100 is connected to the first source 110. The second drain electrode 100 is connected to one end of the fourth semiconductor portion 132 through the third via hole 213. The second source 192 is connected to the other end of the fourth semiconductor portion 132 through the fourth via 214, and the second source 192 and the second drain 100 are spaced apart from each other. The second gate 150 is disposed at a gap between the second source 192 and the second drain 100 and is disposed insulated from the second source 192 and the second drain 100.
Wherein a passivation layer 170 covers the second gate 150. Wherein the first gate electrode 140 is disposed on the surface of the substrate 160 through a buffer layer.
Compared to the prior art, the light sensing circuit 10 of the present invention is provided with two thin film transistors, and the second drain electrode 100 of the second thin film transistor Tp is electrically connected to the first source electrode 110 of the first thin film transistor Tr, the first thin film transistor Tr includes the first active layer 120, the second thin film transistor Tp includes the second active layer 130, the first active layer 120 includes the first semiconductor portion 121, the second active layer 130 includes the second semiconductor portion 131, the second semiconductor portion 131 and the first semiconductor portion 121 are located at the same layer and spaced apart, the first active layer 120 further includes the third semiconductor portion 122, the third semiconductor portion 122 is located on the first semiconductor portion 121, the second active layer 130 further includes the fourth semiconductor portion 132, the fourth semiconductor portion 132 is located on the second semiconductor portion 131, the fourth semiconductor portion 132 is located at the same layer and spaced apart from the third semiconductor portion 122, the density of the defect state of the third semiconductor portion 122 is higher than the density of the defect state of the first semiconductor portion 121, the density of defect states of the fourth semiconductor portion 132 is higher than that of the second semiconductor portion 131, so that the thin film transistor manufactured by the method has higher electron mobility and lower contact resistance, and when the thin film transistor manufactured by the manufacturing method is applied to the photosensitive circuit 10, the photosensitivity of the photosensitive circuit 10 can be improved.
Referring to fig. 1 and 8 together, fig. 8 is a flowchart of a method for manufacturing a photosensitive circuit according to a preferred embodiment of the present invention. The photosensitive circuit 10 includes a first thin film transistor Tr and a second thin film transistor Tp, a second drain 100 of the second thin film transistor Tp is electrically connected to a first source 110 of the first thin film transistor Tr, and the preparation method of the photosensitive circuit includes:
s100: a substrate 160 is provided. The substrate 160 is a transparent substrate, such as a glass substrate, a plastic substrate, or a flexible substrate.
S102: the first semiconductor portions 121 having a first density of defect states and the second semiconductor portions 131 having a second density of defect states are formed on the same side of the substrate 160 at intervals.
S104: the third semiconductor section 122 having a third density of defect states is formed corresponding to the first semiconductor section 121, and the fourth semiconductor section 132 having a fourth density of defect states is formed corresponding to the second semiconductor section 131. The third semiconductor section 122 covers the first semiconductor section 121, and the fourth semiconductor section 132 covers the second semiconductor section 131.
Further, the first semiconductor portion 121, the second semiconductor portion 131, the third semiconductor portion 122, and the fourth semiconductor portion 132 may be prepared by: providing a first semiconductor layer and a second semiconductor layer; etching the first semiconductor layer and the second semiconductor layer to obtain the first semiconductor portion 121, the second semiconductor portion 131, the third semiconductor portion 122, and the fourth semiconductor portion 132. The third semiconductor section 122 covers the first semiconductor section 121, and the fourth semiconductor section 132 covers the second semiconductor section 131.
Further, the method for manufacturing the first semiconductor portion 121, the second semiconductor portion 131, the third semiconductor portion 122, and the fourth semiconductor portion 132 may further include: providing a first semiconductor layer; etching the first semiconductor layer to obtain the first semiconductor portion 121 and the second semiconductor portion 131; providing a second semiconductor layer; etching the second semiconductor layer to obtain the third semiconductor portion 122 and the fourth semiconductor portion 132. The third semiconductor section 122 covers the first semiconductor section 121, and the fourth semiconductor section 132 covers the second semiconductor section 131.
Wherein the third density is greater than the first density and the fourth density is greater than the second density; the third semiconductor portion 122 and the first semiconductor portion 121 constitute a first active layer 120 of the first thin film transistor Tr, the fourth semiconductor portion 132 and the second semiconductor portion 131 constitute a second active layer 130 of the second thin film transistor Tp, the first semiconductor portion 121 is adjacent to the first gate electrode 140 of the first thin film transistor Tr than the third semiconductor portion 122, the fourth semiconductor portion 132 is adjacent to the second gate electrode 150 of the second thin film transistor Tp than the second semiconductor portion 131, and both the first active layer 120 of the first thin film transistor Tr and the second active layer 130 of the second thin film transistor Tp are oxide semiconductor layers.
Specifically, the defect state density of the first semiconductor portion 121 gradually increases from the position close to the first gate 140 to the position away from the first gate 140, and the defect state density of the third semiconductor portion 122 gradually increases from the position close to the first gate 140 to the position away from the first gate 140, and the defect state density of the first semiconductor portion 121 is smaller than the defect state density of the third semiconductor portion 122.
Specifically, the defect state density of the second semiconductor portion 131 gradually increases from the position far from the second gate 150 to the position close to the second gate 150, and the defect state density of the fourth semiconductor portion 132 gradually increases from the position far from the second gate 150 to the position close to the second gate 150, and the defect state density of the second semiconductor portion 131 is smaller than the defect state density of the fourth semiconductor portion 132.
The steps of forming the first semiconductor portion 121 having the first density of defect states and the second semiconductor portion 131 having the second density of defect states at intervals on the same side of the substrate 160, and the steps of forming the third semiconductor portion 122 having the third density of defect states corresponding to the first semiconductor portion 121 and forming the fourth semiconductor portion 132 having the fourth density of defect states corresponding to the second semiconductor portion 131 include:
s200: a first semiconductor layer is formed on the same side of the substrate 160. Please refer to fig. 9.
S202: and forming a second semiconductor layer on the first semiconductor layer.
Wherein the second semiconductor layer covers the first semiconductor layer.
S204: the first semiconductor layer and the second semiconductor layer are patterned to form first semiconductor portions 121 and second semiconductor portions 131 arranged at intervals, third semiconductor portions 122 arranged on the first semiconductor portions 121, and fourth semiconductor portions 132 arranged on the second semiconductor portions 131.
Wherein the patterning includes, but is not limited to, an etching process, the third semiconductor portion 122 covers the first semiconductor portion 121, and the fourth semiconductor portion 132 covers the second semiconductor portion 131.
Wherein the step of forming the first semiconductor layer on the same side of the substrate 160 includes:
s300: the first target is placed in a vacuum sputtering chamber. Please refer to fig. 10.
S302: and vacuumizing the vacuum sputtering chamber.
S304: providing a first gas to the vacuum sputtering chamber, wherein the first gas comprises oxygen and argon, and the content of the oxygen in the first gas is a first oxygen partial pressure.
S306: and forming a first semiconductor layer in the first gas atmosphere.
The step of "forming a second semiconductor layer on the first semiconductor layer" includes:
s400: and providing a second gas to the vacuum sputtering chamber, wherein the second gas comprises oxygen and argon, and the content of the oxygen in the second gas is a second oxygen partial pressure. Please refer to fig. 11.
Wherein the second oxygen partial pressure is less than the first oxygen partial pressure.
S402: and forming a second semiconductor layer in the second gas atmosphere.
Wherein the step of "forming a first semiconductor layer in the first gas atmosphere" includes:
s404: and gradually reducing the content of oxygen in the first gas when forming the first semiconductor layer in the first gas atmosphere to form the first semiconductor layer.
Wherein the step of "forming a second semiconductor layer in the second gas atmosphere" includes:
s406: and gradually reducing the content of oxygen in the second gas when forming the second semiconductor layer in the second gas atmosphere to form the second semiconductor layer.
In this embodiment, the first thin film transistor Tr further includes a first gate electrode 140, a first drain electrode 191, and a first source electrode 110, the second thin film transistor Tp further includes a second gate electrode 150, a second source electrode 192, and a second drain electrode 100, and the method for manufacturing a photosensitive circuit further includes:
s500: a first gate electrode 140 disposed at one side of the substrate 160 is formed. Please refer to fig. 12.
Wherein the first gate electrode 140 is disposed on the surface of the substrate 160 through a buffer layer (not shown). The buffer layer serves to buffer damage to the substrate 160 during the fabrication of the respective film layers.
S502: a first gate insulating layer 180 is formed covering the first gate electrode 140.
The step of forming the first semiconductor portions 121 having the first density of defect states and the second semiconductor portions 131 having the second density of defect states at intervals on the same side of the substrate 160 includes:
forming a first semiconductor portion 121 and a second semiconductor portion 131 which are provided on the first gate insulating layer 180 and spaced apart from each other;
after the step of forming the third semiconductor portion 122 having the third density of defect states corresponding to the first semiconductor portion 121 and the fourth semiconductor portion 132 having the fourth density of defect states corresponding to the second semiconductor portion 131, the method for manufacturing a photosensitive circuit further includes:
s600: the first drain electrode 191 and the first source electrode 110 are formed at both ends of the third semiconductor portion 122, wherein the first drain electrode 191 and the first source electrode 110 are spaced apart from each other. Please refer to fig. 13.
S602: the second drain electrode 100 and the second source electrode 192 are formed at both ends of the fourth semiconductor portion 132, wherein the second drain electrode 100 and the second source electrode 192 are spaced apart from each other, and the second drain electrode 100 is connected to the first source electrode 110.
S604: a second gate insulating layer 200 is formed to cover the first drain electrode 191, the first source electrode 110, the second drain electrode 100, and the second source electrode 192.
S606: a second gate 150 disposed on the second gate insulating layer 200 and corresponding to a gap between the second source 192 and the second drain 100 is formed.
Compared to the prior art, the light sensing circuit 10 of the present invention is provided with two thin film transistors, and the second drain electrode 100 of the second thin film transistor Tp is electrically connected to the first source electrode 110 of the first thin film transistor Tr, the first thin film transistor Tr includes the first active layer 120, the second thin film transistor Tp includes the second active layer 130, the first active layer 120 includes the first semiconductor portion 121, the second active layer 130 includes the second semiconductor portion 131, the second semiconductor portion 131 and the first semiconductor portion 121 are located at the same layer and spaced apart, the first active layer 120 further includes the third semiconductor portion 122, the third semiconductor portion 122 is located on the first semiconductor portion 121, the second active layer 130 further includes the fourth semiconductor portion 132, the fourth semiconductor portion 132 is located on the second semiconductor portion 131, the fourth semiconductor portion 132 is located at the same layer and spaced apart from the third semiconductor portion 122, the density of the defect state of the third semiconductor portion 122 is higher than the density of the defect state of the first semiconductor portion 121, the density of defect states of the fourth semiconductor portion 132 is higher than that of the second semiconductor portion 131, so that the thin film transistor manufactured by the method has higher electron mobility and lower contact resistance, and when the thin film transistor manufactured by the manufacturing method is applied to the photosensitive circuit 10, the photosensitivity of the photosensitive circuit 10 can be improved.
In another embodiment, the first thin film transistor Tr includes a first gate 140, a first drain 191 and a first source 110, the second thin film transistor Tp includes a second gate 150, a second source 192 and a second drain 100, and the method further includes, between the step of providing the substrate 160 and the step of forming the first semiconductor section 121 having the first density of defect states and the second semiconductor section 131 having the second density of defect states spaced apart on the same side of the substrate 160, the step of:
s700: a first gate electrode 140 disposed at one side of the substrate 160 is formed. Please refer to fig. 14.
S702: a first gate insulating layer 180 is formed covering the first gate electrode 140.
The step of forming the first semiconductor portions 121 having the first density of defect states and the second semiconductor portions 131 having the second density of defect states at intervals on the same side of the substrate 160 includes:
forming a first semiconductor portion 121 and a second semiconductor portion 131 which are provided on the first gate insulating layer 180 and spaced apart from each other;
after the step of forming the third semiconductor portion 122 having the third density of defect states corresponding to the first semiconductor portion 121 and the fourth semiconductor portion 132 having the fourth density of defect states corresponding to the second semiconductor portion 131, the method for manufacturing a photosensitive circuit further includes:
s800: forming an etch stop layer 210 covering the third semiconductor portion 122 and the fourth semiconductor portion 132; a first through hole 211 is formed in the etch stop layer 210 at two ends corresponding to the third semiconductor portion 122, and a third through hole 213 and a fourth through hole 214 are formed in the second through hole 212 at two ends corresponding to the fourth semiconductor portion 132. Please refer to fig. 15.
S802: a full metal layer is formed on the etch stop layer 210.
S804: the metal layer is patterned to form a first source 110 and a first drain 191 corresponding to two ends of the third semiconductor portion 122, and a second source 192, a second drain 100 and a second gate 150 corresponding to the fourth semiconductor portion 132.
The first drain 191 is connected to one end of the third semiconductor portion 122 through the first through hole 211, the first source 110 is connected to the other end of the third semiconductor portion 122 through the second through hole 212, the first source 110 and the first drain 191 are spaced apart from each other, the second drain 100 is connected to the first source 110, the second drain 100 is connected to one end of the fourth semiconductor portion 132 through the third through hole 213, the second source 192 is connected to the other end of the fourth semiconductor portion 132 through the fourth through hole 214, the second source 192 and the second drain 100 are spaced apart from each other, the second gate 150 corresponds to a gap between the second source 192 and the second drain 100, and the second gate 150 is insulated from the second source 192 and the second drain 100.
The preparation method of the photosensitive circuit further comprises the following steps: a passivation layer 170 is formed covering the second gate electrode 150.
Wherein, between the step of providing the substrate 160 and the step of forming the first gate disposed at one side of the substrate 160, the method for manufacturing a photosensitive circuit further comprises: a buffer layer is formed on the surface of the substrate 160.
The step of forming the first gate electrode 140 disposed at one side of the substrate 160 includes: a first gate electrode 140 is formed on the buffer layer.
Referring to fig. 16, fig. 16 is a schematic structural diagram of a display device 1 according to a preferred embodiment of the invention. The display device includes a light sensing circuit 10, and the light sensing circuit 10 please refer to the description of the light sensing circuit 10, which is not described herein again. The display device 1 may be, but not limited to, a flexible electronic book, a flexible smart Phone (e.g., an Android Phone, an iOS Phone, a Windows Phone, etc.), a flexible tablet computer, a flexible palm computer, a flexible notebook computer, a Mobile Internet device (MID, Mobile Internet Devices), a wearable device, or the like.
Compared with the prior art, the display device of the invention adopts the photosensitive circuit, the density of the defect state of the third semiconductor part 122 is higher than that of the defect state of the first semiconductor part 121, the density of the defect state of the fourth semiconductor part 132 is higher than that of the defect state of the second semiconductor part 131, the thin film transistor prepared by the method has higher electron mobility and lower contact resistance, and when the thin film transistor prepared by the preparation method is applied to the photosensitive circuit, the photosensitivity of the photosensitive circuit can be improved, and the display quality of the display device 10 is further improved.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily made by those skilled in the art within the technical scope of the present invention will be covered by the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (19)
- A photosensitive circuit, comprising a first thin film transistor and a second thin film transistor, wherein the drain of the second thin film transistor is electrically connected to the source of the first thin film transistor, the first thin film transistor comprises a first active layer, the second thin film transistor comprises a second active layer, the first active layer comprises a first semiconductor portion, the second active layer comprises a second semiconductor portion, the second semiconductor portion and the first semiconductor portion are positioned on the same layer and spaced apart from each other, the first active layer further comprises a third semiconductor portion, the third semiconductor portion is positioned on the first semiconductor portion, the second active layer further comprises a fourth semiconductor portion, the fourth semiconductor portion is positioned on the second semiconductor portion, the fourth semiconductor portion and the third semiconductor portion are positioned on the same layer and spaced apart from each other, the first semiconductor portion is adjacent to a gate electrode of the first thin film transistor compared with the third semiconductor portion, the fourth semiconductor portion is adjacent to a gate electrode of the second thin film transistor compared with the second semiconductor portion, a density of defect states of the third semiconductor portion is higher than a density of defect states of the first semiconductor portion, a density of defect states of the fourth semiconductor portion is higher than a density of defect states of the second semiconductor portion, and the first active layer and the second active layer are both oxide semiconductor layers.
- The photosensitive circuit according to claim 1, wherein the first semiconductor portion and the second semiconductor portion are formed in the same process, and wherein the third semiconductor portion and the fourth semiconductor portion are formed in the same process.
- The photosensitive circuit according to claim 2, wherein a density of defect states of the first semiconductor portion is the same as a density of defect states of the second semiconductor portion, and a density of defect states of the third semiconductor portion is the same as a density of defect states of the fourth semiconductor portion.
- The photosensitive circuit according to claim 1, wherein the first semiconductor section and the third semiconductor section are of an integral structure, and a defect state density of the first semiconductor section increases linearly from a surface distant from the third semiconductor section to a surface adjacent to the third semiconductor section; the third semiconductor portion has a defect state density that increases linearly from a surface adjacent to the first semiconductor portion to a surface distant from the first semiconductor portion.
- The photosensitive circuit according to any one of claims 1 to 4, wherein the second semiconductor section and the fourth semiconductor section are of an integral structure, and a defect state density of the second semiconductor section linearly increases from a surface distant from the fourth semiconductor section to a surface adjacent to the fourth semiconductor section; the fourth semiconductor portion has a defect state density that increases linearly from a surface adjacent to the second semiconductor portion to a surface distant from the second semiconductor portion.
- The photosensitive circuit according to claim 1, wherein the first thin film transistor and the second thin film transistor are disposed on the same substrate, the first thin film transistor further comprising a first gate, a first drain, and a first source, the second thin film transistor further comprising a second gate, a second source, and a second drain; the first grid is arranged on the surface of the substrate; a first gate insulating layer covering the first gate; the first semiconductor part and the second semiconductor part are arranged on the first grid insulating layer at intervals, and the first semiconductor part is arranged corresponding to the first grid; the first drain electrode and the first source electrode are respectively covered at two ends of the third semiconductor part and are arranged at intervals; the second source and the second drain respectively cover two ends of the fourth semiconductor part and are arranged at intervals, and the second drain is connected with the first source; a second gate insulating layer covering the first drain, the first source, the second drain and the second source; the second gate is disposed on the second gate insulating layer and corresponds to a gap between the second source and the second drain.
- The photosensitive circuit according to claim 1, wherein the first thin film transistor and the second thin film transistor are disposed on the same substrate, the first thin film transistor further comprising a first gate, a first drain, and a first source, the second thin film transistor further comprising a second gate, a second source, and a second drain; the first grid is arranged on the surface of the substrate; a first gate insulating layer covering the first gate; the first semiconductor part and the second semiconductor part are arranged on the first grid insulating layer at intervals, and the first semiconductor part is arranged corresponding to the first grid; the etching barrier layer covers the third semiconductor part and the fourth semiconductor part, the etching barrier layer is provided with a first through hole, a second through hole, a third through hole and a fourth through hole, the first through hole and the second through hole are respectively arranged corresponding to two ends of the third semiconductor part, the third through hole and the fourth through hole are respectively arranged corresponding to two ends of the fourth semiconductor part, the first source electrode, the first drain electrode, the second source electrode, the second drain electrode and the second grid electrode are arranged on the etching barrier layer, the first drain electrode is connected with one end of the third semiconductor part through the first through hole, the first source electrode is connected with the other end of the third semiconductor part through the second through hole, the first source electrode and the first drain electrode are arranged at intervals, the second drain electrode is connected with the first source electrode, and the second drain electrode is connected with one end of the fourth semiconductor part through the third through hole, the second source electrode is connected to the other end of the fourth semiconductor portion through the fourth via, the second source electrode and the second drain electrode are arranged at an interval, and the second gate electrode is arranged in a gap between the second source electrode and the second drain electrode and insulated from the second source electrode and the second drain electrode.
- The photosensitive circuit of claim 6 or 7, wherein a passivation layer covers the second gate.
- The light sensing circuit of claim 6 or 7, wherein the first gate is disposed on the surface of the substrate through a buffer layer.
- A display device comprising the light sensing circuit according to any one of claims 1 to 9.
- A preparation method of a photosensitive circuit is characterized in that the photosensitive circuit comprises a first thin film transistor and a second thin film transistor, the drain electrode of the second thin film transistor is electrically connected with the source electrode of the first thin film transistor, and the preparation method of the photosensitive circuit comprises the following steps:providing a substrate;forming first semiconductor parts with first density of defect states and second semiconductor parts with second density of defect states, which are arranged at intervals, on the same side of the substrate;forming a third semiconductor portion having a third density of defect states corresponding to the first semiconductor portion, and forming a fourth semiconductor portion having a fourth density of defect states corresponding to the second semiconductor portion, wherein the third density is higher than the first density, and the fourth density is higher than the second density; the third semiconductor portion and the first semiconductor portion constitute an active layer of the first thin film transistor, the fourth semiconductor portion and the second semiconductor portion constitute an active layer of the second thin film transistor, the first semiconductor portion is closer to a gate electrode of the first thin film transistor than the third semiconductor portion, the fourth semiconductor portion is closer to the gate electrode of the second thin film transistor than the second semiconductor portion, and the active layer of the first thin film transistor and the active layer of the second thin film transistor are both oxide semiconductor layers.
- The method of manufacturing a photosensitive circuit according to claim 11, wherein the step of forming the first semiconductor portion having the first density of defect states and the second semiconductor portion having the second density of defect states at intervals on the same side of the substrate and the step of forming the third semiconductor portion having the third density of defect states corresponding to the first semiconductor portion and the step of forming the fourth semiconductor portion having the fourth density of defect states corresponding to the second semiconductor portion include:forming a first semiconductor layer on the same side of the substrate;forming a second semiconductor layer on the first semiconductor layer;the first semiconductor layer and the second semiconductor layer are patterned to form a first semiconductor section and a second semiconductor section disposed at an interval, a third semiconductor section disposed on the first semiconductor section, and a fourth semiconductor section disposed on the second semiconductor section.
- The method of manufacturing a photosensitive circuit according to claim 12, wherein the step of "forming a first semiconductor layer on the same side of the substrate" includes:putting the first target material into a vacuum sputtering chamber;vacuumizing the vacuum sputtering chamber;providing a first gas to the vacuum sputtering chamber, wherein the first gas comprises oxygen and argon, and the content of the oxygen in the first gas is a first oxygen partial pressure;forming a first semiconductor layer in the first gas atmosphere;the step of "forming a second semiconductor layer on the first semiconductor layer" includes:providing a second gas to the vacuum sputtering chamber, wherein the second gas comprises oxygen and argon, and the content of the oxygen in the second gas is a second oxygen partial pressure, wherein the second oxygen partial pressure is smaller than the first oxygen partial pressure;and forming a second semiconductor layer in the second gas atmosphere.
- The method of manufacturing a photosensitive circuit according to claim 13, wherein said step of "forming a first semiconductor layer in said first gas atmosphere" includes:and gradually reducing the content of oxygen in the first gas when forming the first semiconductor layer in the first gas atmosphere to form the first semiconductor layer.
- The method of manufacturing a photosensitive circuit according to claim 13, wherein the step of "forming a second semiconductor layer in the second gas atmosphere" includes:and gradually reducing the content of oxygen in the second gas when forming the second semiconductor layer in the second gas atmosphere to form the second semiconductor layer.
- The method of manufacturing a photosensitive circuit according to claim 11, wherein the first thin film transistor further includes a first gate electrode, a first drain electrode, and a first source electrode, and the second thin film transistor further includes a second gate electrode, a second source electrode, and a second drain electrode, and wherein the method of manufacturing a photosensitive circuit further includes:forming a first gate electrode disposed at one side of the substrate;forming a first gate insulating layer covering the first gate;the step of forming the first semiconductor portion having the first density of defect states and the second semiconductor portion having the second density of defect states at intervals on the same side of the substrate includes:forming a first semiconductor portion and a second semiconductor portion which are provided on the first gate insulating layer and are provided at an interval;after the step of forming the third semiconductor portion having the third density of defect states corresponding to the first semiconductor portion and the fourth semiconductor portion having the fourth density of defect states corresponding to the second semiconductor portion, the method for manufacturing a photosensitive circuit further includes:forming the first drain electrode and the first source electrode at both ends of the third semiconductor section, wherein the first drain electrode and the first source electrode are spaced apart;forming a second drain electrode and a second source electrode at both ends of the fourth semiconductor section, wherein the second drain electrode and the second source electrode are spaced apart from each other, and the second drain electrode is connected to the first source electrode;forming a second gate insulating layer covering the first drain electrode, the first source electrode, the second drain electrode, and the second source electrode;and forming a second gate electrode disposed on the second gate insulating layer and corresponding to a gap between the second source electrode and the second drain electrode.
- The method of manufacturing a photosensitive circuit according to claim 11, wherein the first thin film transistor includes a first gate electrode, a first drain electrode, and a first source electrode, the second thin film transistor includes a second gate electrode, a second source electrode, and a second drain electrode, and the method of manufacturing a photosensitive circuit further includes:forming a first gate electrode disposed at one side of the substrate;forming a first gate insulating layer covering the first gate;the step of forming the first semiconductor portion having the first density of defect states and the second semiconductor portion having the second density of defect states at intervals on the same side of the substrate includes:forming a first semiconductor portion and a second semiconductor portion which are provided on the first gate insulating layer and are provided at an interval;after the step of forming the third semiconductor portion having the third density of defect states corresponding to the first semiconductor portion and the fourth semiconductor portion having the fourth density of defect states corresponding to the second semiconductor portion, the method for manufacturing a photosensitive circuit further includes:forming an etch stop layer covering the third semiconductor portion and the fourth semiconductor portion;forming a first through hole and a second through hole on the etching barrier layer corresponding to two ends of the third semiconductor part, and forming a third through hole and a fourth through hole corresponding to two ends of the fourth semiconductor part;forming a whole metal layer on the etching barrier layer;patterning the metal layer to form a first source electrode and a first drain electrode corresponding to two ends of the third semiconductor portion, and a second source electrode, a second drain electrode and a second gate electrode corresponding to the fourth semiconductor portion, wherein the first drain electrode is connected to one end of the third semiconductor portion through the first via, the first source electrode is connected to the other end of the third semiconductor portion through the second via, the first source electrode and the first drain electrode are disposed at an interval, the second drain electrode is connected to the first source electrode, the second drain electrode is connected to one end of the fourth semiconductor portion through the third via, the second source electrode is connected to the other end of the fourth semiconductor portion through the fourth via, the second source electrode and the second drain electrode are disposed at an interval, and the second gate electrode corresponds to a gap between the second source electrode and the second drain electrode, and the second grid is insulated from the second source and the second drain.
- The method of manufacturing a photosensitive circuit according to claim 16 or 17, further comprising:and forming a passivation layer covering the second grid electrode.
- The method for manufacturing a photosensitive circuit according to claim 16 or 17, wherein between the step of "providing a substrate" and the step of "forming a first gate electrode provided on one side of the substrate", the method for manufacturing a photosensitive circuit further comprises: :forming a buffer layer on the surface of the substrate;the step of forming a first gate electrode disposed at one side of the substrate includes:and forming a first grid electrode on the buffer layer.
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|---|---|---|---|---|
| CN103489920A (en) * | 2013-09-26 | 2014-01-01 | 京东方科技集团股份有限公司 | Thin film transistor, preparation method of thin film transistor, array substrate and display device |
| KR20140071259A (en) * | 2012-12-03 | 2014-06-11 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Semiconductor device and manufacturing method thereof |
| CN103996716A (en) * | 2014-04-25 | 2014-08-20 | 京东方科技集团股份有限公司 | Poly-silicon thin film transistor and preparation method thereof, and array substrate |
| US20150077162A1 (en) * | 2013-09-13 | 2015-03-19 | Semiconductor Energy Laboratory Co., Ltd. | Transistor, clocked inverter circuit, sequential circuit, and semiconductor device including sequential circuit |
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| EP2256762A1 (en) * | 2009-05-27 | 2010-12-01 | Honeywell International Inc. | Improved hole transfer polymer solar cell |
| KR20220069118A (en) * | 2014-07-15 | 2022-05-26 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Semiconductor device, manufacturing method thereof, and display device including the semiconductor device |
| CN105826412B (en) * | 2016-03-25 | 2017-11-14 | 中兴能源（天津）有限公司 | A kind of solar cell and preparation method thereof |
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| KR20140071259A (en) * | 2012-12-03 | 2014-06-11 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Semiconductor device and manufacturing method thereof |
| US20150077162A1 (en) * | 2013-09-13 | 2015-03-19 | Semiconductor Energy Laboratory Co., Ltd. | Transistor, clocked inverter circuit, sequential circuit, and semiconductor device including sequential circuit |
| CN103489920A (en) * | 2013-09-26 | 2014-01-01 | 京东方科技集团股份有限公司 | Thin film transistor, preparation method of thin film transistor, array substrate and display device |
| CN103996716A (en) * | 2014-04-25 | 2014-08-20 | 京东方科技集团股份有限公司 | Poly-silicon thin film transistor and preparation method thereof, and array substrate |
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