WO2019080060A1

WO2019080060A1 - Photosensitive circuit, method for preparing photosensitive circuit, and display apparatus

Info

Publication number: WO2019080060A1
Application number: PCT/CN2017/107874
Authority: WO
Inventors: 陈小明; 赵云飞; 李明亮; 刘佳豪
Original assignee: 深圳市柔宇科技有限公司
Priority date: 2017-10-26
Filing date: 2017-10-26
Publication date: 2019-05-02
Also published as: CN110914749B; CN110914749A

Abstract

A photosensitive circuit (10), a method for preparing a photosensitive circuit (10), and a display apparatus. The photosensitive circuit (10) comprises a first thin-film transistor (Tr) and a second thin-film transistor (Tp), wherein a drain electrode (100) of the second thin-film transistor is electrically connected to a source electrode (110, 191) of the first thin-film transistor; the first thin-film transistor comprises a first active layer (120); the second thin-film transistor comprises a second active layer (130); the first active layer (120) comprises a first semiconductor portion (121); the second active layer (130) comprises a second semiconductor portion (131); the first semiconductor portion and the second semiconductor portion (131) are arranged on the same layer and at intervals; the first active layer (120) comprises a third semiconductor portion (122); the third semiconductor portion (122) is arranged on the first semiconductor portion (121); the second active layer (130) comprises a fourth semiconductor portion (132); the fourth semiconductor portion (132) is arranged on the second semiconductor portion (131); the third semiconductor portion and the fourth semiconductor portion (132) are arranged on the same layer and at intervals; the first semiconductor portion (121) is adjacent to a gate electrode (140) of the first thin-film transistor; the fourth semiconductor portion (132) is adjacent to a gate electrode (150) of the second thin-film transistor; the density of a defect state of the third semiconductor portion (122) is higher than the density of a defect state of the first semiconductor portion (121); and the density of a defect state of the fourth semiconductor portion (132) is higher than the density of a defect state of the second semiconductor portion (131).

Description

Photosensitive circuit, photosensitive circuit preparation method and display device

Technical field

The invention relates to the field of photosensitive circuits, and in particular to a photosensitive circuit, a photosensitive circuit preparation method and a display device.

Background technique

In recent years, thin film transistors have received more and more attention because of their high mobility, good light transmission, stable film structure, low preparation temperature and low cost. The main goal of the development of thin film transistors is for flat panel displays, flexible electronic devices, transparent electronic devices, liquid crystal displays, organic light emitting diodes, and sensors. However, when a thin film transistor is applied to a photosensitive circuit, it causes a problem that the light sensitivity of the photosensitive circuit is not strong.

Summary of the invention

Embodiments of the present invention provide a photosensitive circuit. The photosensitive circuit includes a first thin film transistor and a second thin film transistor, a drain of the second thin film transistor is electrically connected to a source of the first thin film transistor, and the first thin film transistor includes a first active layer, The second thin film transistor includes a second active layer, the first active layer includes a first semiconductor portion, the second active layer includes a second semiconductor portion, the second semiconductor portion, and the first semiconductor The portions are located at the same layer and spaced apart, the first active layer further includes a third semiconductor portion, the third semiconductor portion is disposed on the first semiconductor portion, and the second active layer further includes a fourth semiconductor a fourth semiconductor portion disposed on the second semiconductor portion, the fourth semiconductor portion and the third semiconductor portion being disposed in a same layer and spaced apart from each other, wherein the first semiconductor portion is compared to the first semiconductor portion The third semiconductor portion is adjacent to a gate of the first thin film transistor, and the fourth semiconductor portion is adjacent to a gate of the second thin film transistor, and the third semiconductor portion has a higher density of a defect state to a density of a defect state of the first semiconductor portion, a density of a defect state of the fourth semiconductor portion being higher than a density of a defect state of the second semiconductor portion, wherein the first active layer and the second The active layers are all oxide semiconductor layers.

Compared with the prior art, the photosensitive circuit of the present invention is provided with two thin film transistors, the density of the defect state of the third semiconductor portion in the first thin film transistor is greater than the density of the defect state of the first semiconductor portion, and The first semiconductor portion is adjacent to the third semiconductor portion adjacent to the first thin film transistor A gate setting. When the first thin film transistor is in operation, the first semiconductor portion is disposed adjacent to the first semiconductor portion of the first thin film transistor, and the first semiconductor portion is opposite to the third semiconductor portion. Most of the carriers in the communication layer formed by the third semiconductor portion flow through the first semiconductor portion, and the density of the defect state of the first semiconductor portion is small, so that the first thin film transistor has a higher High electron mobility, good threshold voltage stability. a density of a defect state of the fourth semiconductor portion in the second thin film transistor is greater than a density of a defect state of the second semiconductor portion, and the fourth semiconductor portion is adjacent to the second semiconductor portion The second gate of the second thin film transistor is disposed. When the second thin film transistor is in operation, the second semiconductor portion is disposed adjacent to the second semiconductor portion of the second thin film transistor, the second semiconductor portion and the second semiconductor portion Most of the carriers in the communication layer formed by the fourth semiconductor portion flow through the fourth semiconductor portion, and the density of the defect state of the fourth semiconductor portion is large, so that the second thin film transistor has a higher Low electron mobility and low threshold voltage stability. When a thin film transistor fabricated by such a preparation method is applied to a photosensitive circuit, the light sensitivity of the photosensitive circuit can be improved.

The embodiment of the invention further provides a display device, wherein the display device comprises the photosensitive circuit according to any of the above embodiments.

The embodiment of the present invention further provides a method for fabricating a photosensitive circuit, wherein the photosensitive circuit includes a first thin film transistor and a second thin film transistor, and a drain of the second thin film transistor is electrically connected to a source of the first thin film transistor. The method for preparing the photosensitive circuit comprises:

Providing a substrate;

Forming, on the same side of the substrate, a first semiconductor portion having a defect density of a first density and a second semiconductor portion having a density of defects having a second density;

Forming, by the first semiconductor portion, a third semiconductor portion having a defect density of a third density, and forming, by the second semiconductor portion, a fourth semiconductor portion having a defect density of a fourth density, wherein the third density is greater than The first density, the fourth density is greater than the second density; the third semiconductor portion and the first semiconductor portion constitute an active layer of the first thin film transistor, the fourth semiconductor portion and The second semiconductor portion constitutes an active layer of the second thin film transistor, the first semiconductor portion is adjacent to a gate of the first thin film transistor, and the fourth semiconductor portion is opposite to the third semiconductor portion The active layer of the first thin film transistor and the active layer of the second thin film transistor are both oxide semiconductor layers compared to the second semiconductor portion adjacent to the gate of the second thin film transistor.

DRAWINGS

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings to be used in the embodiments will be briefly described below. Obviously, the drawings in the following description are only some of the present invention. For the embodiments, those skilled in the art can obtain other drawings according to the drawings without any creative work.

FIG. 1 is a schematic diagram showing the circuit structure of a photosensitive circuit provided by the present invention.

2 is a schematic structural view of a photosensitive circuit according to Embodiment 1 of the present invention.

Fig. 3 is an enlarged schematic view showing a portion I of the photosensitive circuit of the first embodiment of the present invention.

4 is an enlarged schematic view showing a portion II of the photosensitive circuit of the first embodiment of the present invention.

FIG. 5 is a schematic structural diagram of a photosensitive circuit according to a second embodiment of the present invention.

Fig. 6 is an enlarged schematic view showing a portion III of the photosensitive circuit of the second embodiment of the present invention.

Fig. 7 is an enlarged schematic view showing the IV portion of the photosensitive circuit of the second embodiment of the present invention.

FIG. 8 is a flow chart of a method for fabricating a photosensitive circuit according to a preferred embodiment of the present invention.

9 to FIG. 13 are flowcharts corresponding to respective steps of a method for fabricating a photosensitive circuit according to a first embodiment of the present invention.

14 to FIG. 15 are flowcharts corresponding to partial steps of a method for fabricating a photosensitive circuit according to a second embodiment of the present invention.

FIG. 16 is a schematic structural diagram of a display device according to a preferred embodiment of the present invention.

Detailed ways

The technical solutions in the embodiments of the present invention are clearly and completely described in the following with reference to the accompanying drawings in the embodiments of the present invention. It is obvious that the described embodiments are only a part of the embodiments of the present invention, but not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative efforts are within the scope of the present invention.

Please refer to FIG. 1, FIG. 2, FIG. 3 and FIG. 4. FIG. 1 is a schematic diagram showing the circuit structure of a photosensitive circuit provided by the present invention. 2 is a schematic structural view of a photosensitive circuit according to Embodiment 1 of the present invention. Fig. 3 is an enlarged schematic view showing a portion I of the photosensitive circuit of the first embodiment of the present invention. 4 is an enlarged schematic view showing a portion II of the photosensitive circuit of the first embodiment of the present invention. The photosensitive circuit 10 includes a first thin film transistor Tr and a second thin film transistor Tp, and a second drain 100 of the second thin film transistor Tp is electrically connected to the first thin film transistor Tr A source 110. The first thin film transistor Tr includes a first active layer 120, and the second thin film transistor Tp includes a second active layer 130. The first active layer 120 includes a first semiconductor portion 121 , and the second active layer 130 includes a second semiconductor portion 131 . The second semiconductor portion 131 and the first semiconductor portion 121 are located in the same layer and are spaced apart. The first active layer 120 further includes a third semiconductor portion 122 disposed on the first semiconductor portion 121. The second active layer 130 further includes a fourth semiconductor portion 132 disposed on the second semiconductor portion 131. The fourth semiconductor portion 132 is located on the same layer as the third semiconductor portion 122 and is spaced apart. The first semiconductor portion 121 is adjacent to the first semiconductor gate 122 of the first thin film transistor Tr, and the fourth semiconductor portion 132 is adjacent to the second semiconductor portion 131. The second gate 150 of the second thin film transistor Tp. The density of the defect state of the third semiconductor portion 122 is higher than the density of the defect state of the first semiconductor portion 121, and the density of the defect state of the fourth semiconductor portion 132 is higher than that of the second semiconductor portion 131 The density of the state. The first active layer 120 and the second active layer 130 are both oxide semiconductor layers. The first thin film transistor Tr is a bottom gate structure, and the second thin film transistor Tp is a top gate structure.

The first active layer 120 and the second active layer 130 are both oxide semiconductor layers. For example, the first active layer 120 and the second active layer 130 may be It is not limited to Indium Gallium Zinc Oxide (IGZO).

The first semiconductor portion 121 and the second semiconductor portion 131 are formed in the same process, and the third semiconductor portion 122 and the fourth semiconductor portion 132 are formed in the same process.

Specifically, the first semiconductor portion 121 and the second semiconductor portion 131 may be formed by etching treatment of the same semiconductor layer, and have the same physical characteristics. For example, the first semiconductor portion 121 and the second semiconductor portion 131 have the same defect state density, such that the first semiconductor portion 121 and the second semiconductor portion 131 have the same electron mobility, the same Light sensitive characteristics, etc. Similarly, the third semiconductor portion 122 and the fourth semiconductor portion 132 may be formed by etching treatment on the same semiconductor layer, and have the same physical characteristics. For example, the third semiconductor portion 122 and the fourth semiconductor portion 132 have the same defect state density, so that the third semiconductor portion 122 and the fourth semiconductor portion 132 have the same electron mobility, the same Light sensitive properties.

In this embodiment, the density of the defect state of the first semiconductor portion 121 is the same as the density of the defect state of the second semiconductor portion 131, and the density of the defect state of the third semiconductor portion 122 is the same as the fourth The density of the defect state of the semiconductor portion 132 is the same. The first semiconductor portion 121 and the second semiconductor portion 131 are formed by etching treatment on the same semiconductor layer, and have the same defect state density. Similarly, the third semiconductor portion 122 and the fourth semiconductor portion 132 are formed by etching treatment of the same semiconductor layer, and have the same defect state density.

In other embodiments, the first semiconductor portion 121 and the third semiconductor portion 122 are integrated, and the defect state density of the first semiconductor portion 121 is away from the third semiconductor portion 122. The surface 1221 linearly increases toward the surface 1221 adjacent to the third semiconductor portion 122. The defect state density of the third semiconductor portion 122 linearly increases from the surface 1211 adjacent to the first semiconductor portion 121 toward the surface 1211 away from the first semiconductor portion 121. The defect state density of the first semiconductor portion 121 linearly increases from the surface 1221 away from the third semiconductor 122 toward the surface 1211 adjacent to the third semiconductor portion 122, thereby causing the defect state of the first semiconductor portion 121 The density is adjustable to enhance the light sensitivity of the photosensitive circuit 10.

Specifically, the first semiconductor portion 121 and the third semiconductor portion 122 may have an integrated structure, or may have two independent structures. The defect state density of the first semiconductor portion 121 gradually increases from a surface adjacent to the first gate 140 toward a surface away from the first gate 140. The defect state density of the third semiconductor portion 122 gradually increases from a surface adjacent to the first gate 140 toward a surface away from the first gate 140, and satisfies a defect state density of the first semiconductor portion 121 It is smaller than the defect state density of the third semiconductor portion 122. In this embodiment, the defect state densities of the first semiconductor portion 121 and the third semiconductor 122 are set in such a manner that the defect state densities of the first semiconductor portion 121 and the third semiconductor 122 are simultaneously adjustable. The light sensitive performance of the photosensitive circuit 10 is improved.

In the embodiment, the second semiconductor portion 131 and the fourth semiconductor portion 132 are integrated, and the defect state density of the second semiconductor portion 131 is adjacent to the surface 1321 away from the fourth semiconductor portion 132. The surface 1321 of the fourth semiconductor portion 132 linearly increases. The defect state density of the fourth semiconductor portion 132 linearly increases from the surface 1311 adjacent to the second semiconductor portion 131 toward the surface 1311 away from the second semiconductor portion 131. In this embodiment, the defect state density of the second semiconductor portion 131 linearly increases from the surface 1321 away from the fourth semiconductor portion 132 toward the surface 1321 adjacent to the fourth semiconductor portion 132, thereby causing the second The density of the defect state of the semiconductor portion 131 is adjustable to enhance the light sensitivity of the photosensitive circuit 10.

Specifically, the second semiconductor portion 131 and the fourth semiconductor portion 132 may be integrated junctions The structure may also be two independent structures, and the defect state density of the second semiconductor portion 131 gradually increases from a direction away from the second gate 150 toward the second gate 150. The defect state density of the fourth semiconductor portion 132 gradually increases from a direction away from the second gate 150 toward the second gate 150, and satisfies the defect state density of the second semiconductor portion 131 being smaller than The defect state density of the fourth semiconductor portion 132 is described.

In this embodiment, the first thin film transistor Tr and the second thin film transistor Tp are disposed on the same substrate 160. The first thin film transistor Tr further includes a first gate 140, a first drain 191, and a first a source 110, the second thin film transistor Tp further includes a second gate 150, a second source 192, and a second drain 100. The first gate 140 is disposed on a surface of the substrate 160. The first gate insulating layer 180 covers the first gate 140. The first semiconductor portion 121 and the second semiconductor portion 131 are spaced apart from each other on the first gate insulating layer 180 , and the first semiconductor portion 121 is disposed corresponding to the first gate 140 . The first drain electrode 191 and the first source electrode 110 respectively cover the two ends of the third semiconductor portion 122 and are spaced apart. The second source 192 and the second drain 100 respectively cover the two ends of the fourth semiconductor portion 132 and are spaced apart from each other, and the second drain 100 is connected to the first source 110. The second gate insulating layer 200 covers the first drain 191, the first source 110, the second drain 100, and the second source 192. The second gate 150 is disposed on the second gate insulating layer 200 and corresponding to a gap between the second source 192 and the second drain 100.

A passivation layer 170 covers the second gate 150. The first gate 140 is disposed on a surface of the substrate 160 through a buffer layer (not shown). The buffer layer functions to buffer damage to the substrate 160 during preparation of the various layers of the substrate. The material of the first gate insulating layer 180 and the second gate insulating layer 200 may be, but not limited to, silicon oxide or silicon nitride.

The principle of operation of the photosensitive circuit 10 of the present invention is as follows. The threshold voltage Vth of the thin film transistor is affected by the voltage applied to the gate of the thin film transistor (positive voltage or negative voltage) and light. The time at which the voltage of the gate of the thin film transistor is applied, the wavelength and intensity of the illuminating light affect the drift of the threshold voltage Vth of the thin film transistor.

The gate-loaded positive bias of the thin film transistor causes the threshold voltage Vth of the thin film transistor to increase, and the gate-loaded negative bias of the thin film transistor causes the threshold voltage Vth of the thin film transistor to decrease. The illumination causes the threshold voltage Vth of the thin film transistor to decrease. When the gate of the thin film transistor is loaded with a positive bias and light simultaneously With (PBIS), the illumination will offset to some extent the increase in the threshold voltage of the thin film transistor caused by the gate-loaded positive bias of the thin film transistor. The greater the illumination intensity, the smaller the increase in the speed of the thin film transistor caused by PBIS. When the gate of the thin film transistor is loaded with a negative bias and a simultaneous light effect (NBIS), the greater the illumination intensity, the greater the rate at which the threshold voltage Vth of the thin film transistor decreases. Therefore, in the case where the voltage applied to the thin film transistor is constant, the rate of change of the threshold voltage Vth of the thin film transistor can reflect the change in the illumination intensity.

In the photosensitive circuit 10 of the present invention, NBIS is applied to the second thin film transistor Tp; only a gate voltage is applied to the first thin film transistor Tr, and no light (NBS) is applied. Under the action of illumination, the negative shift of the threshold voltage of the second thin film transistor Tp is greater than that of the first thin film transistor Tr in the same time, so the resistance of the second thin film transistor Tp is reduced. The amount is larger such that the voltage of the node Vn to which the first source 110 of the first thin film transistor Tr is connected to the second drain 100 of the second thin film transistor Tp changes. The intensity of the illumination can be determined based on the change in the voltage of the node Vn. Due to the shift of the threshold voltage, the resistance of the second thin film transistor Tp is much smaller than the resistance of the first thin film transistor Tr, then the voltage of the node Vn changes from a high level to a low level. And the time spent on this transformation process is inversely related to the intensity of the light. That is, the greater the illumination intensity, the shorter the time it takes for this transition process; the smaller the illumination intensity, the longer the process of this transition takes. Thereafter, PBIS is applied to the second thin film transistor Tp to cause the threshold voltage Vth to drift forward until the voltage of the node Vn changes from a low level to a high level, so that the threshold voltage of the second thin film transistor Tp Vth returns to the initial state. The first thin film transistor Tr has a higher stability of the threshold voltage Vth under the action of the gate bias; and the stability of the threshold voltage Vth of the second thin film transistor Tp may be appropriately poor, The light sensitivity of the photosensitive circuit 10 is provided.

In the present invention, the density of the defect state of the third semiconductor portion 122 in the first thin film transistor Tr is greater than the density of the defect state of the first semiconductor portion 121, and the first semiconductor portion 121 is compared with the The third semiconductor portion 122 is disposed adjacent to the first gate 140 of the first thin film transistor Tr. When the first thin film transistor Tr is in operation, since the first semiconductor portion 121 is disposed adjacent to the first gate 140 of the first thin film transistor Tr compared to the third semiconductor portion 122, the first Most of the carriers in the communication layer formed by the semiconductor portion 121 and the third semiconductor portion 122 flow through the first semiconductor portion 121, and the density of the defect state of the first semiconductor portion 121 is small, thereby The first thin film transistor Tr is made to have higher electron mobility and better threshold voltage stability.

The density of the defect state of the fourth semiconductor portion 132 in the second thin film transistor Tp is greater than the density of the defect state of the second semiconductor portion 131, and the fourth semiconductor portion 132 is compared to the second semiconductor portion 131 is disposed adjacent to the second gate 150 of the second thin film transistor Tp. When the second thin film transistor Tp is in operation, since the fourth semiconductor portion 132 is disposed adjacent to the second semiconductor portion 131 adjacent to the second gate 150 of the second thin film transistor Tp, the first Most of the carriers in the communication layer formed by the second semiconductor portion 131 and the fourth semiconductor portion 132 flow through the fourth semiconductor portion 132, and the density of the defect state of the fourth semiconductor portion 132 is large, thereby The second thin film transistor Tp is made to have lower electron mobility, lower threshold voltage stability, that is, higher light sensitivity.

Compared with the prior art, the photosensitive circuit 10 of the present invention is provided with two thin film transistors, and the second drain 100 of the second thin film transistor Tp is electrically connected to the first source 110 of the first thin film transistor Tr, the first The density of the defect state of the third semiconductor portion 122 in the thin film transistor Tr is greater than the density of the defect state of the first semiconductor portion 121, and the first semiconductor portion 121 is adjacent to the third semiconductor portion 122 The first gate 140 of the first thin film transistor Tr is disposed. When the first thin film transistor Tr is in operation, since the first semiconductor portion 121 is disposed adjacent to the first gate 140 of the first thin film transistor Tr compared to the third semiconductor portion 122, the first Most of the carriers in the communication layer formed by the semiconductor portion 121 and the third semiconductor portion 122 flow through the first semiconductor portion 121, and the density of the defect state of the first semiconductor portion 121 is small, thereby The first thin film transistor Tr is made to have higher electron mobility and better threshold voltage stability. The density of the defect state of the fourth semiconductor portion 132 in the second thin film transistor Tp is greater than the density of the defect state of the second semiconductor portion 131, and the fourth semiconductor portion 132 is compared to the second semiconductor portion 131 is disposed adjacent to the second gate 150 of the second thin film transistor Tp. When the second thin film transistor Tp is in operation, since the fourth semiconductor portion 132 is disposed adjacent to the second semiconductor portion 131 adjacent to the second gate 150 of the second thin film transistor Tp, the first Most of the carriers in the communication layer formed by the second semiconductor portion 131 and the fourth semiconductor portion 132 flow through the fourth semiconductor portion 132, and the density of the defect state of the fourth semiconductor portion 132 is large, thereby The second thin film transistor Tp is made to have lower electron mobility and lower threshold voltage stability. When the thin film transistor fabricated by this preparation method is applied to the photosensitive circuit 10, the light sensitivity of the photosensitive circuit 10 can be improved.

Please refer to FIG. 1 , FIG. 5 , FIG. 6 and FIG. 7 . FIG. 1 is a schematic diagram of the circuit structure of the photosensitive circuit provided by the present invention. FIG. 5 is a schematic structural diagram of a photosensitive circuit according to a second embodiment of the present invention. Figure 6 shows the invention An enlarged schematic view of a portion III of the photosensitive circuit of the second embodiment. Fig. 7 is an enlarged schematic view showing the IV portion of the photosensitive circuit of the second embodiment of the present invention. In this embodiment, the first thin film transistor Tr and the second thin film transistor Tp are disposed on the same substrate 160. The first thin film transistor Tr further includes a first gate 140, a first drain 191, and a first A source 110. The second thin film transistor Tp further includes a second gate 150, a second source 192, and a second drain 100. The first gate 140 is disposed on a surface of the substrate 160. The first gate insulating layer 180 covers the first gate 140. The first semiconductor portion 121 and the second semiconductor portion 131 are spaced apart from each other on the first gate insulating layer 180 , and the first semiconductor portion 121 is disposed corresponding to the first gate 140 . The etch barrier layer 210 covers the third semiconductor portion 122 and the fourth semiconductor portion 132. The etch barrier layer 210 defines a first via hole 211, a second via hole 212, a third via hole 213, and a portion The first through hole 211 and the second through hole 212 are respectively disposed at two ends of the third semiconductor portion 122, and the third through hole 213 and the fourth through hole 214 respectively correspond to Both ends of the fourth semiconductor portion 132 are provided. The first source 110 , the first drain 191 , the second source 192 , the second drain 100 , and the second gate 150 are disposed on the etch stop layer 210 . The function of the etch stop layer 210 is to prevent the etchant pair used in the process of etching the first source 110, the first drain 191, the second source 192, and the second drain 100 to be covered. The first gate insulating layer 180 under the etch barrier layer 210 causes damage. The etch stop layer 210 may function to block the etchant and protect the structure of the first gate insulating layer 180 from being damaged. The first drain 191 is connected to one end of the third semiconductor portion 122 through the first via hole 211. The first source 110 is connected to the other end of the third semiconductor portion 122 through the second via 212, and the first source 110 is spaced apart from the first drain 191. The second drain 100 is connected to the first source 110. The second drain 100 is connected to one end of the fourth semiconductor portion 132 through the third via hole 213. The second source 192 is connected to the other end of the fourth semiconductor portion 132 through the fourth through hole 214 , and the second source 192 is spaced apart from the second drain 100 . The second gate 150 is disposed at a gap between the second source 192 and the second drain 100 and is insulated from the second source 192 and the second drain 100.

A passivation layer 170 covers the second gate 150. The first gate 140 is disposed on a surface of the substrate 160 through a buffer layer.

Compared with the prior art, the photosensitive circuit 10 of the present invention is provided with two thin film transistors, and the second drain 100 of the second thin film transistor Tp is electrically connected to the first source 110 of the first thin film transistor Tr, first The thin film transistor Tr includes a first active layer 120, the second thin film transistor Tp includes a second active layer 130, the first active layer 120 includes a first semiconductor portion 121, and the second active layer 130 includes a second semiconductor portion 131. The second semiconductor portion 131 and the first semiconductor portion 121 are located at the same layer and spaced apart. The first active layer 120 further includes a third semiconductor portion 122. The third semiconductor portion 122 is disposed on the first semiconductor portion 121, and the second active portion The layer 130 further includes a fourth semiconductor portion 132 disposed on the second semiconductor portion 131. The fourth semiconductor portion 132 is disposed in the same layer and spaced apart from the third semiconductor portion 122, and the defect state of the third semiconductor portion 122 The density of the defect state of the first semiconductor portion 121 is higher than the density of the defect state of the fourth semiconductor portion 132, and the density of the defect state of the second semiconductor portion 131 is higher. The thin film transistor prepared by this method has a larger density. Electron mobility, lower contact resistance, when the thin film transistor fabricated by this preparation method is applied to the photosensitive circuit 10, the light sensitivity of the photosensitive circuit 10 can be improved.

The invention also provides a method for preparing a photosensitive circuit. Please refer to FIG. 1 and FIG. 8 together. FIG. 8 is a flow chart of a method for preparing a photosensitive circuit according to a preferred embodiment of the present invention. The photosensitive circuit 10 includes a first thin film transistor Tr and a second thin film transistor Tp, and a second drain 100 of the second thin film transistor Tp is electrically connected to the first source 110 of the first thin film transistor Tr, and the photosensitive Circuit preparation methods include:

S100: Providing a substrate 160. The substrate 160 is a transparent substrate, such as a glass substrate, a plastic substrate, or the like, and may be a flexible substrate.

S102: forming, on the same side of the substrate 160, a first semiconductor portion 121 having a defect state density of a first density and a second semiconductor portion 131 having a second density of defects.

S104: forming a third semiconductor portion 122 having a defect density of a third density corresponding to the first semiconductor portion 121, and forming a fourth semiconductor portion 132 having a fourth density of defects in the second semiconductor portion 131. The third semiconductor portion 122 covers the first semiconductor portion 121, and the fourth semiconductor portion 132 covers the second semiconductor portion 131.

Further, the first semiconductor portion 121, the second semiconductor portion 131, the third semiconductor portion 122, and the fourth semiconductor portion 132 may be prepared by providing a first semiconductor layer and a second semiconductor Etching the first semiconductor layer and the second semiconductor layer to obtain the first semiconductor portion 121, the second semiconductor portion 131, the third semiconductor portion 122, and the fourth Semiconductor portion 132. The third semiconductor portion 122 covers the first semiconductor portion 121, and the fourth semiconductor portion 132 covers the second semiconductor portion 131.

Further, the first semiconductor portion 121, the second semiconductor portion 131, and the third half The method of manufacturing the conductor portion 122 and the fourth semiconductor portion 132 may further include: providing a first semiconductor layer; performing an etching process on the first semiconductor layer to obtain the first semiconductor portion 121 and the second semiconductor a portion 131; providing a second semiconductor layer; and etching the second semiconductor layer to obtain the third semiconductor portion 122 and the fourth semiconductor portion 132. The third semiconductor portion 122 covers the first semiconductor portion 121, and the fourth semiconductor portion 132 covers the second semiconductor portion 131.

Wherein the third density is greater than the first density, and the fourth density is greater than the second density; the third semiconductor portion 122 and the first semiconductor portion 121 constitute the first thin film transistor Tr The first active layer 120, the fourth semiconductor portion 132 and the second semiconductor portion 131 constitute a second active layer 130 of the second thin film transistor Tp, the first semiconductor portion 121 being compared to the The third semiconductor portion 122 is adjacent to the first gate 140 of the first thin film transistor Tr, and the fourth semiconductor portion 132 is adjacent to the second gate of the second thin film transistor Tp compared to the second semiconductor portion 131 150. The first active layer 120 of the first thin film transistor Tr and the second active layer 130 of the second thin film transistor Tp are both oxide semiconductor layers.

Specifically, the defect state density of the first semiconductor portion 121 gradually increases from a direction toward the first gate 140 away from the first gate 140, and the defect state density of the third semiconductor portion 122 is from The first gate 140 is gradually increased in a direction away from the first gate 140, and the defect state density of the first semiconductor portion 121 is smaller than the defect state density of the third semiconductor portion 122.

Specifically, the defect state density of the second semiconductor portion 131 gradually increases from a direction away from the second gate 150 toward the second gate 150, and the defect state density of the fourth semiconductor portion 132 is The distance from the second gate 150 toward the second gate 150 is gradually increased, and the defect state density of the second semiconductor portion 131 is satisfied to be smaller than the defect state density of the fourth semiconductor portion 132.

The step of forming a first semiconductor portion 121 having a defect density at a first density on the same side of the substrate 160 and a second semiconductor portion 131 having a density of a second density at a second density Corresponding to the forming, by the first semiconductor portion 121, the third semiconductor portion 122 having the third density of the defect state density, and forming the fourth semiconductor portion 132 having the density of the defect state corresponding to the second semiconductor portion 131, the step includes:

S200: forming a first semiconductor layer on the same side of the substrate 160. Please refer to Figure 9.

S202: forming a second semiconductor layer on the first semiconductor layer.

Wherein the second semiconductor layer covers the first semiconductor layer.

S204: patterning the first semiconductor layer and the second semiconductor layer to form a first semiconductor portion 121 and a second semiconductor portion 131 disposed at intervals, and a third semiconductor disposed on the first semiconductor portion 121 a portion 122 and a fourth semiconductor portion 132 disposed on the second semiconductor portion 131.

The patterning includes, but is not limited to, an etching process, the third semiconductor portion 122 covers the first semiconductor portion 121, and the fourth semiconductor portion 132 covers the second semiconductor portion 131.

Wherein, the step of “forming a first semiconductor layer on the same side of the substrate 160” includes:

S300: The first target is placed in a vacuum sputtering chamber. Please refer to Figure 10.

S302: Vacuuming the vacuum sputtering chamber.

S304: supplying a first gas to the vacuum sputtering chamber, the first gas comprising oxygen and argon, and the content of the oxygen in the first gas is a first partial pressure of oxygen.

S306: forming a first semiconductor layer in the first gas atmosphere.

The step of "forming a second semiconductor layer on the first semiconductor layer" includes:

S400: supplying a second gas to the vacuum sputtering chamber, the second gas comprising oxygen and argon, and the content of the oxygen in the second gas is a second partial pressure of oxygen. Please refer to Figure 11.

Wherein the second partial pressure of oxygen is less than the first partial pressure of oxygen.

S402: Forming a second semiconductor layer in the second gas atmosphere.

Wherein, the step of “forming a first semiconductor layer in the first gas atmosphere” includes:

S404: gradually reducing the content of oxygen in the first gas when the first semiconductor layer is formed in the first gas atmosphere to form a first semiconductor layer.

Wherein the step of “forming a second semiconductor layer in the second gas atmosphere” comprises:

S406: gradually reducing the content of oxygen in the second gas when the second semiconductor layer is formed in the second gas atmosphere to form a second semiconductor layer.

In this embodiment, the first thin film transistor Tr further includes a first gate 140, a first drain 191, and a first source 110, and the second thin film transistor Tp further includes a second gate 150 and a second The source electrode 192 and the second drain electrode 100, in the step of "providing the substrate 160" and the step "forming a first semiconductor portion 121 having a first density of defect states at intervals on the same side of the substrate 160 and The second semiconductor portion 131" having a density of the defect state is a second density. The method for preparing the photosensitive circuit further includes:

S500: forming a first gate 140 disposed on one side of the substrate 160. Please refer to Figure 12.

The first gate 140 is disposed on the surface of the substrate 160 through a buffer layer (not shown). surface. The buffer layer functions to buffer damage to the substrate 160 during the preparation of the various film layers.

S502: Form a first gate insulating layer 180 covering the first gate 140.

The step of “forming the first semiconductor portion 121 having the defect density of the first density and the second semiconductor portion having the density of the second defect” on the same side of the substrate 160 includes:

Forming the first semiconductor portion 121 and the second semiconductor portion 131 disposed on the first gate insulating layer 180 and spaced apart;

In the step of forming a third semiconductor portion 122 having a defect density of a third density corresponding to the first semiconductor portion 121, a fourth semiconductor portion 132 having a defect density of a fourth density is formed corresponding to the second semiconductor portion 131. After the photosensitive circuit preparation method further includes:

S600: forming the first drain 191 and the first source 110 at two ends of the third semiconductor portion 122, wherein the first drain 191 and the first source 110 are spaced apart. Please refer to Figure 13.

S602: forming the second drain 100 and the second source 192 at two ends of the fourth semiconductor portion 132, wherein the second drain 100 and the second source 192 are spaced apart, And the second drain 100 is connected to the first source 110.

S604: Form a second gate insulating layer 200 covering the first drain 191, the first source 110, the second drain 100, and the second source 192.

S606: forming a second gate 150 disposed on the second gate insulating layer 200 and disposed corresponding to a gap between the second source 192 and the second drain 100.

Compared with the prior art, the photosensitive circuit 10 of the present invention is provided with two thin film transistors, and the second drain 100 of the second thin film transistor Tp is electrically connected to the first source 110 of the first thin film transistor Tr, the first thin film transistor Tr includes a first active layer 120, the second thin film transistor Tp includes a second active layer 130, the first active layer 120 includes a first semiconductor portion 121, and the second active layer 130 includes a second semiconductor portion 131, a second The semiconductor portion 131 and the first semiconductor portion 121 are located at the same layer and spaced apart. The first active layer 120 further includes a third semiconductor portion 122. The third semiconductor portion 122 is disposed on the first semiconductor portion 121, and the second active layer 130 is disposed. Further including a fourth semiconductor portion 132 disposed on the second semiconductor portion 131, the fourth semiconductor portion 132 and the third semiconductor portion 122 are disposed in the same layer and spaced apart, and the density of the defect state of the third semiconductor portion 122 Higher than the density of the defect state of the first semiconductor portion 121, the density of the defect state of the fourth semiconductor portion 132 is higher than the density of the defect state of the second semiconductor portion 131, prepared by this method The thin film transistor has a larger electron mobility and a lower contact resistance, and when the thin film transistor fabricated by this preparation method is applied to the photosensitive circuit 10, the light sensitivity of the photosensitive circuit 10 can be improved.

In another embodiment, the first thin film transistor Tr includes a first gate 140, a first drain 191, and a first source 110, and the second thin film transistor Tp includes a second gate 150, a second The source electrode 192 and the second drain electrode 100, in the step of "providing the substrate 160" and the step "forming a first semiconductor portion 121 having a first density of defect states at intervals on the same side of the substrate 160 and The second semiconductor portion 131" having a density of the defect state is a second density. The method for preparing the photosensitive circuit further includes:

S700: forming a first gate 140 disposed on one side of the substrate 160. Please refer to Figure 14.

S702: Form a first gate insulating layer 180 covering the first gate 140.

S800: forming an etch stop layer 210 covering the third semiconductor portion 122 and the fourth semiconductor portion 132; opening a first pass on the etch stop layer 210 corresponding to the two ends of the third semiconductor portion 122 The hole 211 and the second through hole 212 define a third through hole 213 and a fourth through hole 214 corresponding to both ends of the fourth semiconductor portion 132 . Please refer to Figure 15.

S802: forming a whole metal layer on the etch barrier layer 210.

S804: patterning the metal layer to form a first source 110 and a first drain 191 disposed corresponding to opposite ends of the third semiconductor portion 122, and a second source 192 disposed corresponding to the fourth semiconductor portion 132 The second drain 100 and the second gate 150.

The first drain electrode 191 is connected to one end of the third semiconductor portion 122 through the first through hole 211, and the first source electrode 110 is connected to the third semiconductor portion through the second through hole 212. The other end of the first source 110 is spaced apart from the first drain 191, the second drain 100 is connected to the first source 110, and the second drain 100 is The third through hole 213 is connected to one end of the fourth semiconductor portion 132, and the second source 192 is connected to the fourth half through the fourth through hole 214 The other end of the conductor portion 132, the second source 192 is spaced apart from the second drain 100, and the second gate 150 corresponds to between the second source 192 and the second drain 100 And a second gate 150 is insulated from the second source 192 and the second drain 100.

The method for fabricating the photosensitive circuit further includes: forming a passivation layer 170 covering the second gate 150.

Wherein, in the step of "providing the substrate 160" and the step of "forming a first gate disposed on one side of the substrate 160", the method for fabricating the photosensitive circuit further comprises: on the substrate 160 The surface forms a buffer layer.

The step of "forming the first gate 140 disposed on one side of the substrate 160" includes forming a first gate 140 on the buffer layer.

The present invention also provides a display device 1. Referring to FIG. 16, FIG. 16 is a schematic structural diagram of a display device according to a preferred embodiment of the present invention. The display device includes a photosensitive circuit 10, and the photosensitive circuit 10 is described in the foregoing description of the photosensitive circuit 10, and details are not described herein again. The display device 1 can be, but is not limited to, a flexible e-book, a flexible smart phone (such as an Android mobile phone, an iOS mobile phone, a Windows Phone mobile phone, etc.), a flexible tablet computer, a flexible palm computer, a flexible notebook computer, and a mobile Internet device (MID, Mobile Internet Devices) or wearable devices.

Compared with the prior art, the display device of the present invention employs the above-described photosensitive circuit, and the density of the defect state of the third semiconductor portion 122 is higher than the density of the defect state of the first semiconductor portion 121, and the defect state of the fourth semiconductor portion 132 The density of the thin film transistor prepared by this method is higher than that of the defect state of the second semiconductor portion 131, and the thin film transistor prepared by the method has a larger electron mobility and a lower contact resistance. In the case of the photosensitive circuit, the light sensitivity of the photosensitive circuit can be improved, and the display quality of the display device 10 can be improved.

It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to be limiting; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand The scope of the protection is not limited thereto, and any changes or substitutions that can be easily conceived within the scope of the present invention are intended to be included within the scope of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

A photosensitive circuit, comprising: a first thin film transistor and a second thin film transistor, wherein a drain of the second thin film transistor is electrically connected to a source of the first thin film transistor, the first thin film The transistor includes a first active layer, the second thin film transistor includes a second active layer, the first active layer includes a first semiconductor portion, and the second active layer includes a second semiconductor portion, the first The second semiconductor portion and the first semiconductor portion are located at the same layer and spaced apart, the first active layer further includes a third semiconductor portion, and the third semiconductor portion is disposed on the first semiconductor portion, the first The second active layer further includes a fourth semiconductor portion disposed on the second semiconductor portion, the fourth semiconductor portion and the third semiconductor portion being disposed in the same layer and spaced apart, the first a semiconductor portion is adjacent to a gate of the first thin film transistor than the third semiconductor portion, and the fourth semiconductor portion is adjacent to a gate of the second thin film transistor than the second semiconductor portion three The density of the defect state of the conductor portion is higher than the density of the defect state of the first semiconductor portion, and the density of the defect state of the fourth semiconductor portion is higher than the density of the defect state of the second semiconductor portion, wherein The first active layer and the second active layer are both oxide semiconductor layers.
The photosensitive circuit according to claim 1, wherein said first semiconductor portion and said second semiconductor portion are formed in the same process, and said third semiconductor portion and said fourth semiconductor portion are in the same process form.
The photosensitive circuit according to claim 2, wherein a density of a defect state of said first semiconductor portion is the same as a density of a defect state of said second semiconductor portion, and a density of a defect state of said third semiconductor portion The density of the defect state of the fourth semiconductor portion is the same.
The photosensitive circuit according to claim 1, wherein the first semiconductor portion and the third semiconductor portion are in an integrated structure, and a defect state density of the first semiconductor portion is away from the third semiconductor portion The surface linearly increases toward a surface adjacent to the third semiconductor portion; a defect state density of the third semiconductor portion linearly increases from a surface adjacent to the first semiconductor portion toward a surface away from the first semiconductor portion.
The photosensitive circuit according to any one of claims 1 to 4, wherein the second semiconductor portion and the fourth semiconductor portion are integrated, and the defect state density of the second semiconductor portion is far from the a surface of the fourth semiconductor portion linearly increases toward a surface adjacent to the fourth semiconductor portion; a defect state density of the fourth semiconductor portion from a surface adjacent to the second semiconductor portion toward a surface away from the second semiconductor portion The surface increases linearly.
The photosensitive circuit of claim 1 , wherein the first thin film transistor and the second thin film transistor are disposed on a same substrate, the first thin film transistor further comprising a first gate and a first drain And the first source, the second thin film transistor further includes a second gate, a second source, and a second drain; the first gate is disposed on a surface of the substrate; the first gate insulating layer covers The first semiconductor portion and the second semiconductor portion are spaced apart from each other on the first gate insulating layer, and the first semiconductor portion is disposed corresponding to the first gate; The first drain and the first source respectively cover the two ends of the third semiconductor portion and are spaced apart; the second source and the second drain respectively cover the fourth semiconductor The second drain is connected to the first source; the second gate insulating layer covers the first drain, the first source, the second drain And the second source; the second gate is disposed on the second gate insulating layer and corresponds to a gap between the second source and the second drain is disposed.
The photosensitive circuit of claim 1 , wherein the first thin film transistor and the second thin film transistor are disposed on a same substrate, the first thin film transistor further comprising a first gate and a first drain And the first source, the second thin film transistor further includes a second gate, a second source, and a second drain; the first gate is disposed on a surface of the substrate; the first gate insulating layer covers The first semiconductor portion and the second semiconductor portion are spaced apart from each other on the first gate insulating layer, and the first semiconductor portion is disposed corresponding to the first gate; The etch barrier layer covers the third semiconductor portion and the fourth semiconductor portion, and the etch barrier layer is provided with a first through hole, a second through hole, a third through hole and a fourth through hole, the first The through hole and the second through hole are respectively disposed at two ends of the third semiconductor portion, and the third through hole and the fourth through hole are respectively disposed corresponding to both ends of the fourth semiconductor portion, the first a source, the first drain, the second source, the second drain, and the first a second gate is disposed on the etch barrier layer, the first drain is connected to one end of the third semiconductor portion through the first via hole, and the first source is connected through the second via hole The other end of the third semiconductor portion, and the first source is spaced apart from the first drain, the second drain is connected to the first source, and the second drain is a third via is connected to one end of the fourth semiconductor portion, the second source is connected to the other end of the fourth semiconductor portion through the fourth via, and the second source and the second The drain gate is disposed, and the second gate is disposed at a gap between the second source and the second drain and is insulated from the second source and the second drain.
A photosensitive circuit according to claim 6 or 7, wherein a passivation layer covers said second gate.
A photosensitive circuit according to claim 6 or 7, wherein said first gate electrode is provided on a surface of said substrate through a buffer layer.
A display device comprising the photosensitive circuit according to any one of claims 1 to 9.
A photosensitive circuit manufacturing method, wherein the photosensitive circuit comprises a first thin film transistor and a second thin film transistor, a drain of the second thin film transistor is electrically connected to a source of the first thin film transistor, and the photosensitive Circuit preparation methods include:

Providing a substrate;

Forming, on the same side of the substrate, a first semiconductor portion having a defect density of a first density and a second semiconductor portion having a density of defects having a second density;

Forming, by the first semiconductor portion, a third semiconductor portion having a defect density of a third density, and forming, by the second semiconductor portion, a fourth semiconductor portion having a defect density of a fourth density, wherein the third density is greater than The first density, the fourth density is greater than the second density; the third semiconductor portion and the first semiconductor portion constitute an active layer of the first thin film transistor, the fourth semiconductor portion and The second semiconductor portion constitutes an active layer of the second thin film transistor, the first semiconductor portion is adjacent to a gate of the first thin film transistor, and the fourth semiconductor portion is opposite to the third semiconductor portion The active layer of the first thin film transistor and the active layer of the second thin film transistor are both oxide semiconductor layers compared to the second semiconductor portion adjacent to the gate of the second thin film transistor.
The method of fabricating a photosensitive circuit according to claim 11, wherein said "the first semiconductor portion having a density of defect states at a first density is formed on the same side of said substrate, and the density of the defect states is a second density. a second semiconductor portion" step and the "corresponding to the first semiconductor portion forming a third semiconductor portion having a defect density of a third density, and forming a fourth density of the fourth semiconductor portion corresponding to the second semiconductor portion The Semiconductors step includes:

Forming a first semiconductor layer on the same side of the substrate;

Forming a second semiconductor layer on the first semiconductor layer;

Patterning the first semiconductor layer and the second semiconductor layer to form first semiconductor portions and second semiconductor portions spaced apart from each other, and a third semiconductor portion disposed on the first semiconductor portion A fourth semiconductor portion disposed on the second semiconductor portion.
A method of fabricating a photosensitive circuit according to claim 12, wherein said step of "forming a first semiconductor layer on the same side of said substrate" comprises:

Placing the first target into the vacuum sputtering chamber;

Vacuuming the vacuum sputtering chamber;

Providing a first gas to the vacuum sputtering chamber, the first gas comprising oxygen and argon, wherein the content of the oxygen in the first gas is a first partial pressure of oxygen;

Forming a first semiconductor layer in the first gas atmosphere;

The step of "forming a second semiconductor layer on the first semiconductor layer" includes:

Providing a second gas to the vacuum sputtering chamber, the second gas comprising oxygen and argon, wherein the content of the oxygen in the second gas is a second partial pressure of oxygen, wherein the second partial pressure of oxygen Less than the first partial pressure of oxygen;

A second semiconductor layer is formed in the second gas atmosphere.
A method of fabricating a photosensitive circuit according to claim 13, wherein said step of "forming a first semiconductor layer in said first gas atmosphere" comprises:

The content of oxygen in the first gas is gradually reduced when the first semiconductor layer is formed in the first gas atmosphere to form a first semiconductor layer.
A method of fabricating a photosensitive circuit according to claim 13, wherein said step of "forming a second semiconductor layer in said second gas atmosphere" comprises:

The content of oxygen in the second gas is gradually reduced when the second semiconductor layer is formed in the second gas atmosphere to form a second semiconductor layer.
The method of fabricating a photosensitive circuit according to claim 11, wherein the first thin film transistor further comprises a first gate, a first drain and a first source, and the second thin film transistor further comprises a second gate a first source, a second source, and a second drain, in the step of "providing a substrate" and the step of "forming a first semiconductor portion having a defect density of a first density at a first density on the same side of the substrate and a defect Between the second semiconductor portions having the second density of state density, the method for preparing the photosensitive circuit further comprises:

Forming a first gate disposed on one side of the substrate;

Forming a first gate insulating layer covering the first gate;

The step of forming a gap density of the first density formed on the same side of the substrate The first semiconductor portion and the second semiconductor portion having the second density of the defect state density include:

Forming a first semiconductor portion and a second semiconductor portion disposed on the first gate insulating layer and spaced apart;

After the step of “forming a third semiconductor portion having a defect state density of a third density corresponding to the first semiconductor portion, and forming a fourth semiconductor portion having a defect state density of a fourth density corresponding to the second semiconductor portion”, The method for preparing the photosensitive circuit further includes:

Forming the first drain and the first source at both ends of the third semiconductor portion, wherein the first drain and the first source are spaced apart;

Forming the second drain and the second source at both ends of the fourth semiconductor portion, wherein the second drain and the second source are spaced apart, and the second drain Connecting the first source;

Forming a second gate insulating layer covering the first drain, the first source, the second drain, and the second source;

Forming a second gate disposed on the second gate insulating layer and disposed corresponding to a gap between the second source and the second drain.
The method of fabricating a photosensitive circuit according to claim 11, wherein the first thin film transistor comprises a first gate, a first drain and a first source, and the second thin film transistor comprises a second gate, a second source and a second drain, in the step of "providing a substrate" and the step of "forming a first semiconductor portion having a defect density of a first density at a first density on the same side of the substrate and a density of defect states The method for fabricating the photosensitive circuit between the second semiconductor portions having the second density further includes:

Forming a first gate disposed on one side of the substrate;

Forming a first gate insulating layer covering the first gate;

The step of “forming a first semiconductor portion having a defect state density at a first density and a second semiconductor portion having a defect state density at a second density on the same side of the substrate” includes:

Forming a first semiconductor portion and a second semiconductor portion disposed on the first gate insulating layer and spaced apart;

After the step of “forming a third semiconductor portion having a defect state density of a third density corresponding to the first semiconductor portion, and forming a fourth semiconductor portion having a defect state density of a fourth density corresponding to the second semiconductor portion”, The method for preparing the photosensitive circuit further includes:

Forming an etch barrier layer covering the third semiconductor portion and the fourth semiconductor portion;

Opening a first through hole and a second through hole on the etch stop layer corresponding to the third semiconductor portion to open a third through hole and a fourth through hole at opposite ends of the fourth semiconductor portion;

Forming an entire metal layer on the etch barrier layer;

Patterning the metal layer to form a first source and a first drain corresponding to opposite ends of the third semiconductor portion, and a second source, a second drain, and a second corresponding to the fourth semiconductor portion a second gate, wherein the first drain is connected to one end of the third semiconductor portion through the first via, and the first source is connected to the third semiconductor through the second via The other end, and the first source is spaced apart from the first drain, the second drain is connected to the first source, and the second drain is connected to the third via One end of the fourth semiconductor portion, the second source is connected to the other end of the fourth semiconductor portion through the fourth via hole, and the second source is spaced apart from the second drain, the first The second gate corresponds to a gap between the second source and the second drain, and the second gate is insulated from the second source and the second drain.
The method of fabricating a photosensitive circuit according to claim 16 or 17, wherein the method for fabricating the photosensitive circuit further comprises:

A passivation layer covering the second gate is formed.
A method of fabricating a photosensitive circuit according to claim 16 or 17, wherein said step "providing a substrate" and said step "forming a first gate disposed on a side of said substrate" The method for preparing the photosensitive circuit further includes:

Forming a buffer layer on a surface of the substrate;

The step of "forming a first gate disposed on one side of the substrate" includes:

A first gate is formed on the buffer layer.