CN110912403B - Power conversion circuit and integrated circuit - Google Patents
Power conversion circuit and integrated circuit Download PDFInfo
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- CN110912403B CN110912403B CN201911259815.0A CN201911259815A CN110912403B CN 110912403 B CN110912403 B CN 110912403B CN 201911259815 A CN201911259815 A CN 201911259815A CN 110912403 B CN110912403 B CN 110912403B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
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Abstract
The application discloses power conversion circuit and integrated circuit, this power conversion circuit specifically include first resistance, first NMOS pipe, second NMOS pipe, oscillator and charge pump, and this circuit passes through power input end and receives the electric energy to utilize the source electrode of second NOMS pipe as power output end to load output voltage. In this circuit, because oscillator itself consumes current, the actual voltage value of VA is probably lower when GATE is unstable like this, and along with GATE becomes high, first NMOS pipe is opened gradually, and then for the oscillator power supply for VA risees, and then makes GATE higher. Therefore, the circuit can still work normally under the condition that the input voltage of the power input end is lower, and the purpose of power conversion can be achieved when the input voltage is lower.
Description
Technical Field
The present application relates to the field of power supply circuit technology, and more particularly, to a power conversion circuit and an integrated circuit.
Background
Power conversion circuits have a wide range of applications for converting a voltage to a voltage required by a target application, which may be low voltage to high voltage, high voltage to low voltage, or other more complex conversions. In an analog integrated circuit, when the variation range of an input voltage is large, it is necessary to convert the input voltage having a wide variation range into a voltage having a small variation range that can be accepted by an internal module.
In the current analog integrated circuits, it is often required to perform voltage conversion normally even when the input voltage is low, for example, lower than 1.8v, but the current power conversion circuits cannot meet the requirement.
Disclosure of Invention
In view of the above, the present application provides a power conversion circuit and an integrated circuit, which are used for performing power conversion when an input voltage is low.
In order to achieve the above purpose, the embodiments of the present application now propose the following solutions:
a power conversion circuit is applied to an integrated circuit and comprises a first resistor, a first NMOS (N-channel metal oxide semiconductor) tube, a second NMOS tube, an oscillator and a charge pump, wherein:
one end of the first resistor is electrically connected with a power supply input end, and the other end of the first resistor is electrically connected with the source electrode of the first NMOS tube, the voltage input end of the oscillator and the voltage input end of the charge pump respectively;
the signal output end of the oscillator is electrically connected with the charge pump;
the voltage output end of the charge pump is electrically connected with the grid electrode of the first NMOS tube;
the drain electrode of the first NMOS tube is electrically connected with the power input end, and the grid electrode of the first NMOS tube is electrically connected with the grid electrode of the second NMOS tube;
the drain electrode of the second NMOS tube is electrically connected with the power supply input end, and the source electrode of the second NMOS tube is the power supply output end of the power supply conversion circuit.
Optionally, the apparatus further comprises a voltage clamping circuit, wherein:
one end of the voltage clamping circuit is electrically connected with the voltage input end of the oscillator, and the other end of the voltage clamping circuit is grounded.
Optionally, the voltage clamping circuit includes a plurality of diodes connected in series in a forward direction.
Optionally, an anode of a first diode of the plurality of diodes is electrically connected to the voltage input terminal of the oscillator, and a cathode of a last diode of the plurality of diodes is grounded.
Optionally, the apparatus further includes a second resistor, wherein:
one end of the second resistor is connected with the source electrode of the first NMOS tube, and the other end of the second resistor is connected with the voltage input end of the oscillator.
Optionally, the apparatus further includes a first filter capacitor, wherein:
one end of the first filter capacitor is electrically connected with the voltage input end of the oscillator, and the other end of the first filter capacitor is grounded.
Optionally, the apparatus further includes a second filter capacitor, wherein:
one end of the second filter capacitor is electrically connected with the power output end, and the other end of the second filter capacitor is grounded.
Optionally, the voltage at the power input terminal is equal to or greater than 1.2 volts.
An integrated circuit, optionally provided with a power conversion circuit as described above.
Optionally, the integrated circuit is an analog integrated circuit
According to the technical scheme, the power conversion circuit specifically comprises a first resistor, a first NMOS (N-channel metal oxide semiconductor) tube, a second NMOS tube, an oscillator and a charge pump, receives electric energy through a power input end, and outputs voltage to a load by using a source electrode of the second NOMS tube as a power output end. In this circuit, because oscillator itself consumes current, the actual voltage value of VA is probably lower when GATE is unstable like this, and along with GATE becomes high, first NMOS pipe is opened gradually, and then for the oscillator power supply for VA risees, and then makes GATE higher. Therefore, the circuit can still work normally under the condition that the input voltage of the power input end is lower, and the purpose of power conversion can be achieved when the input voltage is lower.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a circuit diagram of a power conversion circuit according to an embodiment of the present application;
fig. 2 is a circuit diagram of another power conversion circuit according to an embodiment of the present application;
FIG. 3 is a circuit diagram of another power conversion circuit according to an embodiment of the present application;
FIG. 4 is a circuit diagram of another power conversion circuit according to an embodiment of the present application;
FIG. 5 is a comparison graph of the conversion effect of VCC at 1.2V-2.1V input according to the embodiment of the application;
fig. 6 is a comparison of simulation results of VCC in the embodiment of the present application at 1.2V input.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Example one
Fig. 1 is a circuit diagram of a power conversion circuit according to an embodiment of the present application.
As shown in fig. 1, the power conversion circuit of the present embodiment can be applied to an integrated circuit such as an analog integrated circuit, and includes a first resistor R1, a first NMOS transistor M1, a second NMOS transistor M2, an oscillator OSC, and a charge pump CP.
One end of the first resistor is electrically connected with the power supply input end VCC, and the other end of the first resistor is electrically connected with the source electrode of the first NMOS tube, the voltage input end of the oscillator and the voltage input end of the charge pump respectively. The power supply input terminal supplies current to the oscillator through the first resistor at the initial start-up stage of the circuit. The voltage at the voltage input of the oscillator and the charge pump is indicated by VA.
The signal output end of the oscillator is electrically connected with the charge pump, and the voltage output end of the charge pump is electrically connected with the grid electrode of the first NMOS tube. The charge pump receives the signal output by the oscillator to realize voltage output higher than the input voltage.
The drain electrode of the first NMOS tube is electrically connected with the power input end, the grid electrode of the first NMOS tube is electrically connected with the grid electrode of the second NMOS tube, and the voltage on the connecting line of the two grid electrodes is Vgate. The drain of the second NMOS transistor is electrically connected to the power input terminal, and the source thereof is the power output terminal of the power conversion circuit, and is configured to output the converted output voltage VO to the LOAD.
It can be seen from the foregoing technical solutions that, the present embodiment provides a power conversion circuit, which is applied to an analog integrated circuit, and specifically includes a first resistor, a first NMOS transistor, a second NMOS transistor, an oscillator, and a charge pump, where the circuit receives electric energy through a power input terminal, and outputs voltage to a load by using a source of the second NMOS transistor as a power output terminal. Since the oscillator itself consumes current, the actual voltage value of VA may be lower when Vgate is not stable, and as GATE becomes higher, the first NMOS transistor is gradually turned on and supplies power to the oscillator, so that VA increases, and GATE becomes higher. Therefore, the circuit can still normally work under the condition that the input voltage of the power input end VCC is lower, and the purpose of power supply conversion can be achieved when the input voltage is lower.
In addition, in an embodiment of the present application, the voltage clamp circuit further includes a voltage clamp circuit, as shown in fig. 2, the voltage clamp circuit includes a plurality of diodes D1, D2, and D3 connected in a forward direction, an anode of the first diode D1 is electrically connected to the voltage input terminal of the oscillator, and a cathode of the last diode D3 is grounded. Through the voltage clamping effect of the voltage clamping circuit, when the input voltage of the power input end is higher, the voltage VA of the voltage input ends of the oscillator and the charge pump is ensured to be clamped on the voltage drop of the three diodes, so that the GATE voltage is ensured not to be too high, and the output voltage of the power output end can be avoided being too high.
When the input voltage of the power supply input end is lower, for example, when VCC is about 1.2V, D1-D3 do not have a clamping condition, the initial voltage of VA is VCC, the oscillator is started, the charge pump is started, and thus the output of the charge pump is 2 times of VA voltage.
In another embodiment of the present application, as shown in fig. 3, the NMOS transistor further includes a second resistor R2 connected between the source of the first NMOS transistor and the voltage input terminal of the oscillator. This second resistance can play the current-limiting effect, when VCC is higher promptly, prevents that first NOMS pipe from pouring into great current to the VA node.
In another embodiment of the present application, a first filter capacitor C1, a second filter capacitor C2, or a first filter capacitor C1 and a second filter capacitor C2 may be further included, where the first filter capacitor C1 filters an input voltage of the oscillator, and the second filter capacitor C2 is used for filtering an output voltage of the power output terminal, so as to avoid interference of harmful fringes.
As shown in fig. 4, one end of the first filter capacitor is connected to the voltage input end of the oscillator, and the other end is grounded; one end of the second filter capacitor is connected with the power output end, and the other end of the second filter capacitor is grounded.
The following is the effect of simulating the technical scheme of the application:
as shown in fig. 5, the horizontal axis is VCC voltage input, the dotted line is the output voltage VO for different VCCs in the present technical solution, and the solid line is the output voltage VO for different VCCs in the conventional technical solution. It can be seen that the technical scheme of the present invention can output a more stable output voltage VO when VCC is 1.2V, whereas the conventional scheme can not obtain a more stable output voltage VO until VCC is greater than 1.8V. Compared with the traditional scheme, the technical scheme of the application can realize power supply conversion between 1.2V and 1.8V (including two end points), so that the application range is expanded.
In addition, as shown in fig. 6, the horizontal axis represents time, and the starting process is simulated. It can be seen that the conventional scheme has no output even when VCC is lower than 1.2V, but the present invention can still work normally when VCC is 1.2V. The solid line a is the conventional output and the dashed line B is the inventive output.
Example two
The present embodiment provides an integrated circuit, in which the power conversion circuit provided in the above embodiment is disposed, and specifically includes a first resistor, a first NMOS transistor, a second NMOS transistor, an oscillator, and a charge pump, where the circuit receives power through a power input terminal, and outputs a voltage to a load by using a source of the second NMOS transistor as a power output terminal. Because the oscillator consumes current, the actual voltage value of VA may be lower when GATE is unstable like this, and as GATE becomes higher, first NMOS pipe is opened gradually for the oscillator power supply, makes VA rise, and then makes GATE higher. Therefore, the circuit can still work normally under the condition that the input voltage of the power input end is lower, and the purpose of power conversion can be achieved when the input voltage is lower.
The integrated circuit is embodied as an analog integrated circuit or a digital integrated circuit.
The embodiments in the present specification are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.
While preferred embodiments of the present application have been described, additional variations and modifications of these embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including the preferred embodiment and all such alterations and modifications as fall within the true scope of the embodiments of the application.
Finally, it should also be noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or terminal that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or terminal. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or terminal that comprises the element.
The technical solutions provided by the present application are introduced in detail, and specific examples are applied in the description to explain the principles and embodiments of the present application, and the descriptions of the above examples are only used to help understanding the method and the core ideas of the present application; meanwhile, for a person skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.
Claims (10)
1. The utility model provides a power supply conversion circuit which is characterized in that, is applied to integrated circuit, power supply conversion circuit includes first resistance, first NMOS pipe, second NMOS pipe, oscillator and charge pump, wherein:
one end of the first resistor is electrically connected with a power supply input end, and the other end of the first resistor is electrically connected with the source electrode of the first NMOS tube, the voltage input end of the oscillator and the voltage input end of the charge pump respectively;
the signal output end of the oscillator is electrically connected with the charge pump;
the voltage output end of the charge pump is electrically connected with the grid electrode of the first NMOS tube;
the drain electrode of the first NMOS tube is electrically connected with the power input end, and the grid electrode of the first NMOS tube is electrically connected with the grid electrode of the second NMOS tube;
the drain electrode of the second NMOS tube is electrically connected with the power supply input end, and the source electrode of the second NMOS tube is the power supply output end of the power supply conversion circuit.
2. The power conversion circuit of claim 1, further comprising a voltage clamp circuit, wherein:
one end of the voltage clamping circuit is electrically connected with the voltage input end of the oscillator, and the other end of the voltage clamping circuit is grounded.
3. The power conversion circuit of claim 2, wherein the voltage clamping circuit comprises a plurality of diodes connected in series in a sequential forward direction.
4. The power conversion circuit of claim 3, wherein an anode of a first diode of the plurality of diodes is electrically connected to the voltage input of the oscillator and a cathode of a last of the diodes is grounded.
5. The power conversion circuit of claim 1, further comprising a second resistor, wherein:
one end of the second resistor is connected with the source electrode of the first NMOS tube, and the other end of the second resistor is connected with the voltage input end of the oscillator.
6. The power conversion circuit of claim 1, further comprising a first filter capacitor, wherein:
one end of the first filter capacitor is electrically connected with the voltage input end of the oscillator, and the other end of the first filter capacitor is grounded.
7. The power conversion circuit of claim 1, further comprising a second filter capacitor, wherein:
one end of the second filter capacitor is electrically connected with the power output end, and the other end of the second filter capacitor is grounded.
8. The power conversion circuit of claim 1, wherein the voltage at the power input is equal to or greater than 1.2 volts.
9. An integrated circuit provided with a power conversion circuit according to any one of claims 1 to 8.
10. The integrated circuit of claim 9, wherein the integrated circuit is an analog integrated circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911259815.0A CN110912403B (en) | 2019-12-10 | 2019-12-10 | Power conversion circuit and integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911259815.0A CN110912403B (en) | 2019-12-10 | 2019-12-10 | Power conversion circuit and integrated circuit |
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| Publication Number | Publication Date |
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| CN110912403A CN110912403A (en) | 2020-03-24 |
| CN110912403B true CN110912403B (en) | 2021-02-19 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201911259815.0A Active CN110912403B (en) | 2019-12-10 | 2019-12-10 | Power conversion circuit and integrated circuit |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP2937990A1 (en) * | 2014-04-21 | 2015-10-28 | Delta Electronics, Inc. | Motor driving circuit |
| CN205490127U (en) * | 2016-01-30 | 2016-08-17 | 深圳南云微电子有限公司 | High -voltage startup circuit |
| CN107968566A (en) * | 2017-12-20 | 2018-04-27 | 上海艾为电子技术股份有限公司 | A kind of power-switching circuit |
-
2019
- 2019-12-10 CN CN201911259815.0A patent/CN110912403B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP2937990A1 (en) * | 2014-04-21 | 2015-10-28 | Delta Electronics, Inc. | Motor driving circuit |
| CN205490127U (en) * | 2016-01-30 | 2016-08-17 | 深圳南云微电子有限公司 | High -voltage startup circuit |
| CN107968566A (en) * | 2017-12-20 | 2018-04-27 | 上海艾为电子技术股份有限公司 | A kind of power-switching circuit |
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| Publication number | Publication date |
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| CN110912403A (en) | 2020-03-24 |
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