CN110911457A - Display panel and preparation method thereof - Google Patents
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- CN110911457A CN110911457A CN201911099014.2A CN201911099014A CN110911457A CN 110911457 A CN110911457 A CN 110911457A CN 201911099014 A CN201911099014 A CN 201911099014A CN 110911457 A CN110911457 A CN 110911457A
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/122—Pixel-defining structures or layers, e.g. banks
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K50/00—Organic light-emitting devices
- H10K50/80—Constructional details
- H10K50/805—Electrodes
- H10K50/82—Cathodes
- H10K50/824—Cathodes combined with auxiliary electrodes
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/1201—Manufacture or treatment
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Abstract
The invention provides a display panel and a preparation method thereof, wherein the display panel comprises: the structure of the first dam and the second dam is formed by the second electrode in the protruding area, namely the second electrode also forms a bump, the auxiliary electrode is directly connected with the dam structure of the second electrode in parallel, the resistance of the whole second electrode is reduced, and the IR voltage drop can be improved; and the bulges and the pixel limiting blocks are processed through a half-tone mask plate, so that the number of the mask plates can be reduced, and further, the cost can be reduced.
Description
Technical Field
The invention relates to the technical field of display, in particular to a display panel and a preparation method thereof.
Background
In large-size Organic Light-Emitting display (OLED), the display panel with top emission may cause uneven brightness due to IR voltage drop caused by thinner electrodes during operation, and the top emission display panel needs to use thinner electrodes, i.e. needs to use thinner electrodes.
Therefore, the invention provides a novel display panel structure and a preparation method thereof, which can solve the problem of voltage drop stabilization.
Disclosure of Invention
The invention aims to reduce the overall impedance and improve the IR drop by arranging a protrusion on a pixel limiting block, covering the protrusion by a second electrode, and connecting an auxiliary electrode with the second electrode.
In order to achieve the above object, the present invention provides a display panel, which includes a substrate having a display region and a non-display region; the buffer layer is arranged on one side of the substrate; the dielectric layer is arranged on one side of the buffer layer, which is far away from the substrate, and a plurality of thin film transistors are arranged in the dielectric layer; the first electrode is arranged on the dielectric layer and corresponds to the display area, and the first electrode is connected with the thin film transistor; the pixel limiting block is arranged on the dielectric layer and corresponds to the non-display area, and a bulge is arranged on the pixel limiting block; the organic functional layer is arranged on the pixel limiting block and the first electrode; the second electrode is arranged on the organic functional layer; the auxiliary electrode is arranged on the second electrode and corresponds to the bulge; and the color film substrate is arranged on the auxiliary electrode.
Further, the dielectric layer includes: the interlayer insulating layer is arranged on one side of the buffer layer, which is far away from the substrate; and the planarization layer is arranged on one side of the interlayer insulating layer, which is far away from the buffer layer.
Further, the thin film transistor includes: an active layer disposed in the interlayer insulating layer; a gate insulating layer disposed in the interlayer insulating layer and on the active layer; a gate electrode disposed in the interlayer insulating layer and on the gate insulating layer; and the source drain electrode layer is arranged in the planarization layer and is connected with the active layer.
Further, the color film substrate comprises a black matrix, and the black matrix corresponds to the auxiliary electrode.
Furthermore, the planarization layer is provided with a groove, the groove is recessed to the surface of the source/drain electrode layer, and the first electrode is connected with the source/drain electrode layer through the groove.
Further, the second electrode includes a first bank and a second bank, and the first bank and the second bank are disposed above the protrusion.
Further, a laminated structure of the auxiliary electrode including aluminum and molybdenum; and/or, a single layer structure of molybdenum; and/or a stacked structure of copper, the first transparent electrode, aluminum, and the second transparent electrode.
Further, the second electrode is integrally formed with the projection.
The invention also provides a preparation method of the display panel, which comprises the following steps: providing a substrate and a color film substrate, wherein the substrate is provided with a display area and a non-display area, and the color film substrate is provided with an auxiliary electrode with high resistance; forming a buffer layer on one side of the substrate; forming a dielectric layer on one side of the buffer layer far away from the substrate; depositing a first electrode on the dielectric layer and corresponding to the display area, wherein the first electrode is connected with the thin film transistor; forming a pixel limiting block on the dielectric layer and corresponding to the non-display region, wherein the pixel limiting block is provided with a bulge; depositing an organic functional layer on the pixel defining block and the first electrode; depositing a second electrode on the organic functional layer; and attaching one side of the color film substrate with the auxiliary electrode to the second electrode, wherein the auxiliary electrode is attached to the corresponding bulge.
Further, in the step of forming a plurality of pixel defining blocks on the dielectric layer, the method specifically includes: providing a mask plate, wherein the mask plate is provided with a full light transmission area, a light-tight area and a semi-light transmission area; depositing a negative photoresist on the dielectric layer and corresponding to the non-display region; the mask plate is arranged above the substrate, the full light-transmitting areas correspond to the bulges, the full light-transmitting areas are arranged between the semi-light-transmitting areas, and the non-light-transmitting areas correspond to the first electrodes; and after ultraviolet rays penetrate through the mask plate and are irradiated on the photoresist, dripping developing solution on the photoresist to form the pixel limiting block and the protrusion.
The invention has the beneficial effects that: the invention provides a display panel and a preparation method thereof.A bulge is arranged on a pixel limiting block, a second electrode covers the bulge and forms a structure of a first dam and a second dam, namely the second electrode also forms a bump corresponding to the bulge, and an auxiliary electrode is directly connected in parallel with the dam structure of the second electrode, so that the impedance of the whole second electrode is reduced, and the IR voltage drop can be improved; and the bulges and the pixel limiting blocks are processed through a half-tone mask plate, so that the number of the mask plates can be reduced, and further, the cost can be reduced.
Drawings
The invention is further described below with reference to the figures and examples.
Fig. 1 is a schematic structural diagram of a display panel according to the present invention;
fig. 2 is a schematic structural diagram of step S4) of the method for manufacturing a display panel according to the present invention;
fig. 3 is a schematic structural diagram of step S5) of the method for manufacturing a display panel according to the present invention;
fig. 4 is a schematic structural diagram of the display panel manufacturing method according to the present invention after step S5) is completed;
a display panel 100; a display area 110; a non-display area 120;
a substrate 101; a buffer layer 102; a dielectric layer 103;
a first electrode 104; a pixel defining block 105; organic functional layer 106
A second electrode 107; an auxiliary electrode 109; a color film substrate 108;
an interlayer insulating layer 1031; a planarization layer 1032; a thin film transistor 130;
an active layer 1301; a gate insulating layer 1302; a gate electrode 1303;
a source-drain electrode layer 1304; a protrusion 1051; a first dam 1071;
a second dike 1072.
Detailed Description
In order that the present invention may be better understood, the following examples are included to further illustrate the invention, but not to limit its scope.
The following description of the embodiments refers to the accompanying drawings for illustrating the specific embodiments in which the invention may be practiced. The directional terms used in the present invention, such as "up", "down", "front", "back", "left", "right", "top", "bottom", etc., refer to the directions of the attached drawings. Accordingly, the directional terms used are used for explanation and understanding of the present invention, and are not used for limiting the present invention.
The present invention provides a display panel including: the display device comprises a substrate, a buffer layer, a dielectric layer, a first electrode, a pixel limiting block, an organic functional layer, a second electrode, an auxiliary electrode and a color film substrate.
The substrate is provided with a display area and a non-display area; the buffer layer is arranged on one side of the substrate; the dielectric layer is arranged on one side of the buffer layer far away from the substrate, and a plurality of thin film transistors are arranged in the dielectric layer; the first electrode is arranged on the dielectric layer and corresponds to the display area, and the first electrode is connected with the thin film transistor; the pixel limiting block is arranged on the dielectric layer and corresponds to the non-display area, and a bulge is arranged on the pixel limiting block; the organic functional layer is arranged on the pixel limiting block and the first electrode; the second electrode is arranged on the organic functional layer; the auxiliary electrode is arranged on the second electrode and corresponds to the bulge; the color film substrate is arranged on the auxiliary electrode.
As shown in fig. 1, a display panel 100 according to an embodiment of the present invention includes: the display device comprises a substrate 101, a buffer layer 102, a dielectric layer 103, a first electrode 104, a pixel limiting block 105, an organic functional layer 106, a second electrode 107, an auxiliary electrode 109 and a color film substrate 108.
The substrate 101 has a display region 110 and a non-display region 120. The buffer layer 102 is disposed on one side of the substrate 101.
The dielectric layer 103 is disposed on a side of the buffer layer 102 away from the substrate 101, and the dielectric layer 103 has a plurality of thin film transistors 130 therein.
The dielectric layer 103 includes: an interlayer insulating layer 1031, and a planarization layer 1032.
The interlayer insulating layer 1031 is arranged on one side of the buffer layer 102 far away from the substrate 101; the planarization layer 1032 is disposed on a side of the interlayer insulating layer 1031 away from the buffer layer 102, and the planarization layer 1032 has a groove that is recessed to the surface of the source/drain electrode layer 1304.
The thin film transistor 130 includes: an active layer 1301, a gate insulating layer 1302, a gate electrode 1303, and a source-drain electrode layer 1304. The thin film transistor 130 includes a solid phase crystallization thin film transistor, a metal oxide thin film transistor, or a low temperature polysilicon thin film transistor.
The thin film transistor 130 may be a top gate or bottom gate structure, and the top gate structure is preferred in the present invention, and therefore, the structure of the device of the thin film transistor 130 is located as follows.
The active layer 1301 is provided in the interlayer insulating layer 1031. The gate insulating layer 1302 is disposed in the interlayer insulating layer 1031 and on the active layer 1301.
The gate 1303 is disposed in the interlayer insulating layer 1031 and on the gate insulating layer 1302; the source/drain electrode layer 1304 is disposed in the planarization layer 1032 and connected to the active layer 1301.
The first electrode 104 is disposed on the dielectric layer 103 and corresponds to the display region 110, the first electrode 104 is connected to the thin film transistor 130, and the first electrode 104 is an anode.
The first electrode 104 is connected to the source/drain electrode layer 1304. Specifically, the first electrode 104 is connected to the source/drain electrode layer 1304 through the groove.
The pixel defining block 105 is disposed on the dielectric layer 103 and corresponds to the non-display region 120, a protrusion 1051 is disposed on the pixel defining block 105, and the first electrode 104 is integrally formed with the protrusion 1051.
The shape of the protrusion 1051 includes a circle or a square.
The organic functional layer 106 is disposed on the pixel defining block 105 and the first electrode 104; the organic functional layer 106 includes single layer devices, double layer devices, triple layer devices, and multilayer devices.
A single layer device is thus directly connected to an organic layer which can emit light. In the structure, the efficiency and brightness of the device are low and the stability of the device is poor due to the unbalance of electron and hole injection and transmission.
The double-layer device is characterized in that a Hole Transport Layer (HTL) or an Electron Transport Layer (ETL) is added on two sides of a light-emitting layer on the basis of a single-layer device, so that the problem of unbalanced carrier injection of the single-layer device is solved, the voltage-current characteristic of the device is improved, and the light-emitting efficiency of the device is improved.
The three-layer device structure is the most widely used one, and is also the preferred structure in this embodiment, mainly by adding a Hole Transport Layer (HTL) or an Electron Transport Layer (ETL) on both sides of the light-emitting layer. This structure has an advantage of allowing excitons to be confined in the light-emitting layer, thereby improving the efficiency of the device.
The performance of the multilayer structure is a better structure, and the function of each layer can be well played. The light-emitting layer may also be composed of a multilayer structure, which may be optimized separately due to the mutual independence between the organic layers. Therefore, the structure can fully play the role of each organic layer, and greatly improves the flexibility of device design.
The second electrode 107 is arranged on the organic functional layer 106; the second electrode 107 is a cathode.
When the second electrode 107 is prepared, the second electrode 107 forms a first bank 1071 and a second bank 1072 in the region of the protrusion 1051 due to the presence of the protrusion 1051.
The auxiliary electrode 109 is disposed on the second electrode 107 and corresponds to the protrusion 1051, and specifically, is disposed on the first bank 1071 and the second bank 1072.
A laminated structure of the auxiliary electrode 109 including aluminum and molybdenum; and/or, a single layer structure of molybdenum; and/or a stacked structure of copper, the first transparent electrode, aluminum, and the second transparent electrode.
The metal in these structures has a lower resistance, so when the metal is connected in parallel with the second electrode 107 in the area of the protrusion 1051, the resistance of the second electrode 107 can be reduced as a whole, thereby improving the problem of solving the IR drop, and enabling the whole panel to display uniform and stable images without moire fringes.
The color filter substrate 108 is disposed on the auxiliary electrode 109. The color filter substrate 108 includes a black matrix 1081, and the black matrix 1081 corresponds to the auxiliary electrode 109.
Due to the black matrix 1081, the auxiliary electrode 109 can be made thicker, and the impedance of the whole auxiliary electrode is smaller.
The invention provides a display panel 100, through setting up the lobe 1051 in the pixel limiting block 105, and then in the said lobe area, the said second electrode 107 forms the structure of the first dyke 1071 and second dyke 1072, namely the second electrode 107 forms a bump too, the auxiliary electrode 109 connects with the dyke structure of the said second electrode 107 in parallel directly, has pulled down the resistance of the whole second electrode 107, can improve IR voltage drop.
The invention also provides a preparation method of the display panel, which comprises the following steps.
S1) as shown in fig. 2, a substrate 101 and a color filter substrate 108 are provided, where the substrate 101 has a display region 110 and a non-display region 120, and the color filter substrate 108 has a high-resistance auxiliary electrode 109.
S2) forming a buffer layer 102 on one side of the substrate 101.
S3) forming a dielectric layer 103 on the side of the buffer layer 102 away from the substrate 101.
S4) depositing a first electrode 104 on the dielectric layer 103 and corresponding to the display region 110, the first electrode 104 being connected to the thin film transistor 130.
S5) forming a pixel defining block 105 on the dielectric layer 103 and corresponding to the non-display region 120, the pixel defining block 105 having a protrusion 1051.
The step of forming the plurality of pixel defining blocks 105 on the dielectric layer 103 specifically includes.
S51) as shown in fig. 3, a mask having a fully transmissive region, an opaque region, and a semi-transmissive region is provided.
S52) depositing a negative photoresist on the dielectric layer 103 and corresponding to the non-display region 120.
S53), disposing the mask above the substrate 101, wherein the full-transmission region corresponds to the protrusion 1051, the full-transmission region is disposed between the semi-transmission regions, and the opaque region corresponds to the first electrode 104.
S54) irradiating ultraviolet light to the photoresist through the mask plate, and dropping a developing solution to the photoresist to form the pixel defining block 105 and the protrusion 1051 (as shown in fig. 4).
The pixel defining blocks 105 and the protrusions 1051 are formed by a photomask, i.e., a half-tone mask process.
The pixel defining block 105 and the protrusion 1051 may also be prepared by two photomasks, including: forming the pixel defining block 105 by a first photomask; the protrusions 1051 are formed on the pixel defining blocks 105 by a second masking. The photomask in the method is exposed and developed through the mask plate, namely, two mask plates are passed, and the cost is higher than that of one half-tone mask plate.
S6) forming an organic functional layer 106 on the pixel defining block 105 and the first electrode 104 by ink-jet printing.
S7) forming a second electrode 107 on the organic functional layer 106. By means of evaporation or sputtering.
S8) attaching the side of the color filter substrate 108 having the auxiliary electrode 109 to the second electrode 107, where the auxiliary electrode 109 is attached to the protrusion 1051.
The invention provides a preparation method of a display panel, through setting up the lobe 1051 in the pixel limit block 105, and then in the said lobe area, the said second electrode 107 forms the structure of the first dyke 1071 and second dyke 1072, namely the second electrode 107 forms a bump too, the auxiliary electrode 109 connects with the dyke structure of the said second electrode 107 in parallel directly, has drawn the resistance of the whole second electrode 107 down, can improve IR voltage drop; moreover, the protrusions 1051 and the pixel limiting blocks 105 are manufactured by a half-tone mask plate, so that the number of the mask plates can be reduced, and further, the cost can be reduced.
It should be noted that many variations and modifications of the embodiments of the present invention fully described are possible and are not to be considered as limited to the specific examples of the above embodiments. The above examples are given by way of illustration of the invention and are not intended to limit the invention. In conclusion, the scope of the present invention should include those changes or substitutions and modifications which are obvious to those of ordinary skill in the art.
Claims (10)
1. A display panel, characterized in that:
a substrate having a display region and a non-display region;
the buffer layer is arranged on one side of the substrate;
the dielectric layer is arranged on one side of the buffer layer, which is far away from the substrate, and a plurality of thin film transistors are arranged in the dielectric layer;
the first electrode is arranged on the dielectric layer and corresponds to the display area, and the first electrode is connected with the thin film transistor;
the pixel limiting block is arranged on the dielectric layer and corresponds to the non-display area, and a bulge is arranged on the pixel limiting block;
the organic functional layer is arranged on the pixel limiting block and the first electrode;
the second electrode is arranged on the organic functional layer;
the auxiliary electrode is arranged on the second electrode and corresponds to the bulge;
and the color film substrate is arranged on the auxiliary electrode.
2. The display panel according to claim 1,
the dielectric layer includes:
the interlayer insulating layer is arranged on one side of the buffer layer, which is far away from the substrate;
and the planarization layer is arranged on one side of the interlayer insulating layer, which is far away from the buffer layer.
3. The display panel according to claim 2,
the thin film transistor includes:
an active layer disposed in the interlayer insulating layer;
a gate insulating layer disposed in the interlayer insulating layer and on the active layer;
a gate electrode disposed in the interlayer insulating layer and on the gate insulating layer;
and the source drain electrode layer is arranged in the planarization layer and is connected with the active layer.
4. The display panel according to claim 1,
the color film substrate comprises a black matrix, and the black matrix corresponds to the auxiliary electrode.
5. The display panel according to claim 3,
the planarization layer is provided with a groove, the groove is recessed to the surface of the source drain electrode layer, and the first electrode is connected with the source drain electrode layer through the groove.
6. The display panel according to claim 1,
the second electrode includes a first bank and a second bank, and the first bank and the second bank are disposed above the protrusion.
7. The display panel according to claim 1,
the auxiliary electrode comprises a laminated structure of aluminum and molybdenum; and/or a monolayer structure of molybdenum; and/or
Copper, a first transparent electrode, aluminum, and a second transparent electrode.
8. The display panel according to claim 1,
the second electrode is formed integrally with the projection.
9. A method for manufacturing a display panel, comprising:
providing a substrate and a color film substrate, wherein the substrate is provided with a display area and a non-display area, and the color film substrate is provided with an auxiliary electrode with high resistance;
forming a buffer layer on one side of the substrate;
forming a dielectric layer on one side of the buffer layer far away from the substrate;
depositing a first electrode on the dielectric layer and corresponding to the display area, wherein the first electrode is connected with the thin film transistor;
forming a pixel limiting block on the dielectric layer and corresponding to the non-display region, wherein the pixel limiting block is provided with a bulge;
forming an organic functional layer on the pixel defining block and the first electrode;
forming a second electrode on the organic functional layer;
and attaching one side of the color film substrate, which is provided with the auxiliary electrode, to the second electrode, wherein the auxiliary electrode is attached to the corresponding bulge.
10. The method for manufacturing a display panel according to claim 9,
in the step of forming a plurality of pixel defining blocks on the dielectric layer, the method specifically includes:
providing a mask plate, wherein the mask plate is provided with a full light transmission area, a light-tight area and a semi-light transmission area;
depositing a negative photoresist on the dielectric layer and corresponding to the non-display region;
the mask plate is arranged above the substrate, the full light-transmitting areas correspond to the bulges, the full light-transmitting areas are arranged between the semi-light-transmitting areas, and the non-light-transmitting areas correspond to the first electrodes;
and after ultraviolet rays penetrate through the mask plate and are irradiated on the photoresist, dripping developing solution on the photoresist to form the pixel limiting block and the protrusion.
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| CN201911099014.2A CN110911457A (en) | 2019-11-11 | 2019-11-11 | Display panel and preparation method thereof |
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| CN201911099014.2A CN110911457A (en) | 2019-11-11 | 2019-11-11 | Display panel and preparation method thereof |
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| CN113097259A (en) * | 2021-03-22 | 2021-07-09 | 深圳市华星光电半导体显示技术有限公司 | Display panel, display panel manufacturing method and display device |
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