CN110894598A - Deposition furnace tube - Google Patents
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- CN110894598A CN110894598A CN201811063163.9A CN201811063163A CN110894598A CN 110894598 A CN110894598 A CN 110894598A CN 201811063163 A CN201811063163 A CN 201811063163A CN 110894598 A CN110894598 A CN 110894598A
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- 230000008021 deposition Effects 0.000 title claims abstract description 58
- 235000012431 wafers Nutrition 0.000 claims abstract description 103
- 238000006243 chemical reaction Methods 0.000 claims abstract description 54
- 238000010438 heat treatment Methods 0.000 claims abstract description 53
- 238000000151 deposition Methods 0.000 claims description 58
- 239000010408 film Substances 0.000 claims description 36
- 238000000034 method Methods 0.000 claims description 12
- 239000010409 thin film Substances 0.000 claims description 11
- 238000005137 deposition process Methods 0.000 claims description 10
- 238000004518 low pressure chemical vapour deposition Methods 0.000 claims description 7
- 239000012495 reaction gas Substances 0.000 claims description 7
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 claims description 4
- VXEGSRKPIUDPQT-UHFFFAOYSA-N 4-[4-(4-methoxyphenyl)piperazin-1-yl]aniline Chemical compound C1=CC(OC)=CC=C1N1CCN(C=2C=CC(N)=CC=2)CC1 VXEGSRKPIUDPQT-UHFFFAOYSA-N 0.000 claims description 2
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims description 2
- 229910021529 ammonia Inorganic materials 0.000 claims description 2
- MROCJMGDEKINLD-UHFFFAOYSA-N dichlorosilane Chemical compound Cl[SiH2]Cl MROCJMGDEKINLD-UHFFFAOYSA-N 0.000 claims description 2
- 239000005049 silicon tetrachloride Substances 0.000 claims description 2
- 239000007789 gas Substances 0.000 description 5
- 239000000463 material Substances 0.000 description 4
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 238000009413 insulation Methods 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000007599 discharging Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 239000002912 waste gas Substances 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 239000010425 asbestos Substances 0.000 description 1
- 238000005253 cladding Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 description 1
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 229910052895 riebeckite Inorganic materials 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/46—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for heating the substrate
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/34—Nitrides
- C23C16/345—Silicon nitride
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/458—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
- C23C16/4581—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber characterised by material of construction or surface finish of the means for supporting the substrate
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- Chemical & Material Sciences (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Engineering & Computer Science (AREA)
- Materials Engineering (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Inorganic Chemistry (AREA)
- Chemical Vapour Deposition (AREA)
Abstract
The invention provides a deposition furnace tube, which comprises a reaction cavity, a heater, a wafer boat, a base and an auxiliary heating part. One end of the reaction cavity is closed, and the other end of the reaction cavity is provided with an opening. The heater is disposed around the periphery of the reaction chamber. The wafer boat is positioned in the reaction chamber and used for bearing a plurality of batches of wafers. The base supports the wafer boat, and the base can drive the wafer boat to move into the reaction cavity and seal the opening, or drive the wafer boat to move out of the reaction cavity. The auxiliary heating part is arranged at one end of the reaction chamber and is positioned above the wafer boat, and the auxiliary heating part is configured to heat the middle part of the wafer positioned at the top of the wafer boat while the heater heats the wafer.
Description
Technical Field
The present invention relates to the field of semiconductor manufacturing, and more particularly, to a furnace for depositing a thin film on a wafer.
Background
In a semiconductor manufacturing process, various thin films need to be deposited on a wafer. Among various methods of depositing thin films, Chemical Vapor Deposition (CVD) is a commonly used method, and has been widely used in Deposition processes of various thin films. The chemical vapor deposition is to deliver the reaction gas to the deposition furnace tube to make it react with the wafer in the furnace tube under a certain condition, so as to deposit a layer of film on the wafer surface.
For example, in a DRAM (dynamic Random Access memory) structure, a sidewall insulating layer must be formed on the sidewall, and the sidewall insulating layer can isolate a plug conductive layer (doped polysilicon) from a bit line (metal) in DRAM applications, thereby preventing Device failure due to short circuits. The material of the sidewall insulating layer may include silicon nitride, which may be deposited on a wafer by Low Pressure Chemical Vapor Deposition (LPCVD) using a Deposition furnace to form a silicon nitride film, followed by a process such as etching to obtain the sidewall insulating layer.
Therefore, as the process of DRAM continues to scale down to 10 nm, the accuracy of sidewall insulating layer thickness control is a challenge with the large scale device scaling. How to improve the structure of the existing deposition furnace tube to improve the uniformity of the deposition film thickness of the existing deposition furnace tube, accurately control the thickness of the side wall insulating layer, and be beneficial to achieving the planarization of the thickness of the side wall insulating layer of a chip product, thereby becoming a technical difficulty to be solved urgently for the film deposition process.
Disclosure of Invention
Based on the above problems, the present invention provides a deposition furnace tube to improve the uniformity of the deposited film thickness of the existing deposition furnace tube, and is beneficial to achieving the planarization of the thickness of the sidewall insulation layer of the chip product.
To achieve the above objective, the present invention provides a deposition furnace tube, which comprises a reaction chamber, a heater, a wafer boat, a base, and an auxiliary heating portion. One end of the reaction cavity is closed, and the other end of the reaction cavity is provided with an opening. The heater is disposed around the periphery of the reaction chamber. The wafer boat is positioned in the reaction chamber and used for bearing a plurality of batches of wafers. The base supports the wafer boat, and the base can drive the wafer boat to move into the reaction cavity and seal the opening, or drive the wafer boat to move out of the reaction cavity. The auxiliary heating part is arranged at one end of the reaction chamber and is positioned above the wafer boat, and the auxiliary heating part is configured to heat the middle part of the wafer on the top of the wafer boat while the heater heats the wafer.
Compared with the prior art, the invention has the beneficial effects that: the deposition furnace tube is additionally provided with the auxiliary heating part above the wafer boat, and the auxiliary heating part is used for heating the middle part of the wafer positioned at the top of the wafer boat while heating by the heater, so that more heat energy is given to the middle part, the deposition rate of a middle film is improved, the thicknesses of the middle part and the edge are basically consistent, the flattening of the film thickness is achieved, the yield of chip products is improved, and the consistency of the performance of the DRAM produced by the whole wafer is achieved.
Drawings
FIG. 1 is a schematic view of a conventional vertical deposition furnace tube.
Fig. 2 is a schematic cross-sectional view of a chip product formed by using a conventional vertical deposition furnace tube.
Fig. 3a and 3b are schematic cross-sectional views of the sidewall insulating layer of the wafer at the middle and edge, respectively.
FIG. 4 is a diagram showing the relationship between the film thickness range and the boat position of a thin film formed on the wafer surface by using a conventional vertical deposition furnace.
Fig. 5 is a schematic view of a deposition furnace according to an embodiment of the disclosure.
Fig. 6 is a diagram illustrating a relationship between a film thickness range of a thin film formed on a wafer surface by a deposition furnace and a wafer boat position, wherein a dotted line corresponds to a conventional deposition furnace, and a solid line corresponds to the deposition furnace of the present disclosure.
Fig. 7a is a schematic cross-sectional view of a chip product formed by using a deposition furnace tube according to an embodiment of the disclosure.
Fig. 7b is a schematic view of a microstructure of a wafer with a thin film deposited thereon by using a deposition furnace according to an embodiment of the disclosure.
Fig. 8a and 8b are schematic cross-sectional views of the sidewall insulating layer of the wafer at the middle and edge, respectively.
Fig. 9a and 9b are schematic cross-sectional views of a sidewall insulating layer and a plug conductive layer of a wafer at the middle and edge, respectively.
Fig. 10a is a schematic view of an auxiliary heating portion of a deposition furnace tube according to an embodiment of the disclosure.
Fig. 10b is a schematic view of an auxiliary heating portion of a deposition furnace tube according to another embodiment of the disclosure.
Fig. 10c is a schematic view of an auxiliary heating portion of a deposition furnace tube according to yet another embodiment of the disclosure.
Detailed Description
Example embodiments will now be described more fully with reference to the accompanying drawings. Example embodiments may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of example embodiments to those skilled in the art. In the drawings, the thickness of regions and layers may be exaggerated for clarity. The same reference numerals denote the same or similar structures in the drawings, and thus detailed descriptions thereof will be omitted.
Furthermore, the described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided to provide a thorough understanding of embodiments of the invention. One skilled in the relevant art will recognize, however, that the invention may be practiced without one or more of the specific details, or with other methods, components, materials, and so forth. In other instances, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring aspects of the invention.
As shown in fig. 1, the vertical deposition furnace includes a heater 1, a reaction chamber 2, a boat 3, and a base 4. The wafer boat 3 with the wafers is driven by the base 4 to move upwards and enter the reaction chamber 2. The reaction chamber 2 is provided with an air inlet 5 for inputting reaction gas and an air outlet 6 for discharging waste gas, a heater positioned outside the reaction chamber heats the reaction chamber, the reaction gas is mixed in the furnace tube and generates chemical reaction, and finally a layer of SiN film is deposited on the surface of a wafer arranged in the furnace tube.
In an actual process, wafers placed in different areas of a wafer boat are heated at different temperatures, so that the wafers are heated unevenly. For example, the higher the temperature, the greater the deposition rate, and the greater the film thickness; and the lower the temperature, the smaller the deposition rate and the smaller the film thickness. Therefore, the thickness of the deposited film on the wafer is not uniform, resulting in a thinner or thicker sidewall insulation layer of the chip product. Specifically, in the subsequent processing of the wafer, the film in the horizontal direction needs to be cut off to expose the surface of the silicon substrate, the remaining film surrounds the sidewall of the wafer to serve as a sidewall insulating layer 7, and then a plug conductive layer is formed on the periphery of the sidewall insulating layer to form a chip product 8. As shown in fig. 2, 3a and 3b, the thickness of the sidewall insulating layer of the wafer 9 located in the middle is smaller than that of the wafer 9' located at the edge, and the difference between the two is large. The thin sidewall insulating layer results in leakage current, while the thick sidewall insulating layer results in high resistance of the plug conductive layer deposited subsequently.
The inventor of the present invention has studied the existing vertical deposition furnace tube to find that the thickness range of the top of the boat 30 is poor relative to the bottom of the boat 30, so that during the deposition process, the uniformity of the film of the wafer on the top of the boat 30 is poor relative to the uniformity of the film of the wafer on the bottom of the boat 30, which is represented by the fact that the middle thickness of the wafer is much smaller than the edge thickness, as shown in fig. 4, the abscissa represents the height of the boat 30, and the ordinate represents the thickness ratio of the middle to the edge of the wafer, wherein the thickness ratio of the middle to the edge of the wafer on the top of the boat 30 is 1:1.045, i.e., the thickness difference between the middle and the edge is 4.5. The thickness ratio of the middle portion to the edge of the wafer at the bottom of the wafer boat 30 is 1:1.025, i.e., the difference between the thicknesses is 2.5%. Therefore, the uniformity of the thickness of the sidewall insulation layer of the chip product processed by the wafer on the top of the wafer boat 30 is poor, which seriously affects the yield of the product.
In order to solve the above problems, the present inventors have improved the existing vertical deposition furnace tube, specifically as follows:
as shown in fig. 5, the present invention provides a deposition furnace tube, which includes a reaction chamber 10, a heater 20, a wafer boat 30, a pedestal 40 and an auxiliary heating unit 50. The reaction chamber 10 is closed at one end, shown as the top end, and open at the other end, shown as the bottom end. The heater 20 is disposed around the outer circumference of the reaction chamber 10. The wafer boat 30 is located in the reaction chamber 10 for carrying a plurality of batches of wafers. The base 40 supports the wafer boat 30, and the base 40 can drive the wafer boat 30 to move into the reaction chamber 10 and close the opening, or drive the wafer boat 30 to move out of the reaction chamber 10. The auxiliary heating part 50 is disposed at one end of the reaction chamber 10 and above the boat 30, and the auxiliary heating part 50 is configured to heat the middle portion of the wafer positioned on the top of the boat 30 while the heater 20 heats the wafer.
Although some types of batch-type deposition furnace tubes exist in the prior art, the heating zone thereof is divided into a plurality of temperature zones from top to bottom, which are respectively used for heating different areas of the reaction chamber, the above-mentioned conventional deposition furnace tubes still cannot solve the problem of non-uniform wafer thickness on the top of the wafer boat. The inventor conducts extensive creative work, and researches to find out that the reason of causing the uneven thickness of the wafers on the top of the wafer boat is that the middle parts of the wafers on the top of the wafer boat obtain less heat energy, thereby greatly influencing the deposition efficiency of the thin film. Therefore, the deposition furnace tube of the present invention additionally sets an auxiliary heating part above the boat, which is used for heating the middle part of the wafer on the top of the boat while heating by the heater, so as to give more heat energy to the middle part, improve the deposition rate of the film in the middle part, and make the thicknesses of the middle part and the edge substantially consistent, thereby achieving the planarization of the film thickness, as shown in fig. 7 a. Therefore, adverse effects on the subsequently formed plug conducting layer can not be generated, the yield of chip products is improved, and the performance consistency of the DRAM produced by the whole wafer is further achieved.
As shown in fig. 6, when the deposition furnace of the present invention is used to perform a film deposition process on a wafer, the relationship curve between the film thickness of the obtained wafer and the position of the wafer boat 30 is shown as a solid line, it can be seen that the thickness ratio between the middle portion and the edge of the wafer on the top of the wafer boat 30 is 1:1.025, i.e. the difference between the two thicknesses is 2.5%. Compared with the thickness difference of 2.5% in the prior art, the improvement degree of the uniformity of the film thickness is improved by 44% ({ (4.5-2.5)/4.5 }. 100% ═ 44%), and it can be proved that the uniformity of the film thickness can be obviously improved by performing the film deposition process on the wafer through the deposition furnace tube.
In this embodiment, the main body of the heater 20 is cylindrical and a top cover made of asbestos or the like is used to seal the top. The outermost layer of the main body of the heater 20 is made of stainless steel material, and a heat insulating layer is provided in the middle to prevent the temperature in the reaction chamber 10 from being diffused outward, and a heating circuit is provided inside the heat insulating layer and is formed of a resistance wire 51, etc. wound around the inner wall of the heat insulating layer. In one embodiment, the heater 20 may be divided into a plurality of temperature zones from top to bottom, each zone being used to heat a different region of the reaction chamber 10.
The deposition furnace tube may further be provided with a vacuum pump for controlling gas flow, a gas inlet 60 and a gas outlet 70 for inputting gas required for reaction and discharging waste gas, and the like, as shown in fig. 7a and 7b, the silicon nitride outer cladding film 200 is deposited on the silicon substrate 100 and the surface of the metal bit line on the silicon substrate 100. After the subsequent process of the wafer, the film in the horizontal direction is removed to form the sidewall insulating layer 300, and then the plug conductive layer 400 is formed on the periphery of the sidewall insulating layer 300 to form the chip product 700. Fig. 8a and 8b are schematic cross-sectional views of the sidewall insulating layer of the wafer located at the middle portion and the edge, respectively, and fig. 9a and 9b are schematic cross-sectional views of the sidewall insulating layer and the plug conductive layer of the wafer located at the middle portion and the edge, respectively, compared with the schematic cross-sectional views of the sidewall insulating layer and the chip product formed by the conventional vertical deposition furnace shown in fig. 2, 3a and 3b, it can be seen that in the present embodiment, the thicknesses of the sidewall insulating layer 300 of the wafer 500 located at the middle portion and the sidewall insulating layer 300 of the wafer 600 located at the edge are substantially the same, and compared with the prior art, the planarization degree of the thickness of the sidewall insulating layer in the present. Therefore, the invention improves the uniformity of the deposited film thickness at the top of the batch furnace tubes, accurately controls the film thickness, can solve the problems of leakage current caused by thin side wall insulating layers and higher resistance value of the subsequent plug conducting layer caused by thick side wall insulating layers, and ensures that electronic equipment can normally operate under the condition of large-scale micro-scale elements.
In one embodiment, the auxiliary heating part 50 at least partially covers an inner surface of one end of the reaction chamber 10, for example, the auxiliary heating part 50 is attached to the inner surface or spaced apart from the inner surface. The auxiliary heating unit 50, the boat 30, and the reaction chamber 10 may be coaxially disposed, so that the auxiliary heating unit 50 may be positioned at a center of a top of the boat 30.
The position and layout of the auxiliary heating part 50 are not limited to this, and for example, the auxiliary heating part 50 may be provided on the outer surface of one end of the reaction chamber 10, and a plurality of auxiliary heating parts 50 may be distributed at the end. Any form that can heat the middle of the wafer can be used and is within the scope of the present invention.
The auxiliary heating portion 50 includes a resistance wire 51. In this embodiment, as shown in fig. 10a, the resistance wire 51 may be in a disc shape, and the density of the resistance wire 51 in the middle of the auxiliary heating portion 50 is greater than the density of the resistance wire 51 at the periphery of the auxiliary heating portion 50.
In another embodiment, as shown in fig. 10b, the auxiliary heating part 50 may include a plurality of annular resistance wires 51, the plurality of resistance wires 51 are disposed coaxially with the reaction chamber 10, and the number of the resistance wires 51 close to the axis is greater than the number of the resistance wires 51 far from the axis.
In another embodiment, as shown in fig. 10c, the auxiliary heating portion 50 may include a plurality of resistance wires 51, and the plurality of resistance wires 51 are distributed radially from the center of the circular disk.
In the above embodiments, the density of the resistance wire 51 in the middle of the auxiliary heating portion 50 is increased, so that the heating efficiency in the middle of the auxiliary heating portion 50 is higher than that in the outer periphery, and the deposition rate of the thin film in the middle is further increased.
The form of the auxiliary heating part 50 is not limited thereto, and any heating device capable of generating heat may be applied. Any form capable of improving the heating efficiency of the middle portion of the auxiliary heating part 50 is applicable and is within the protection scope of the present invention.
In this embodiment, the deposition furnace is configured to deposit a thin film on the surface of the wafer by using the reaction gas introduced into the reaction chamber 10 during the deposition process. The deposition process may include low pressure chemical vapor deposition, plasma enhanced chemical vapor deposition, and the like.
In this embodiment, the reaction gas may be monosilane (SiH)4) Dichlorosilane (SiH)2Cl2) Silicon tetrachloride (SiCl)4) And ammonia (NH)3) One or more of them, for example, a low pressure chemical vapor deposition process, wherein the pressure in the reaction chamber 10 is 0.1-100 torr and the temperature in the reaction chamber 10 is 350-800 ℃ during the deposition process. The film thickness is, for example, 2 to 15 nm. Center of wafer is thinThe ratio of the film thickness to the film thickness at the wafer edge is 1: 1.025.
It should be understood that the deposition furnace tube of the present invention can be combined with other existing devices and structures to achieve the corresponding functions, and any modifications, combinations and substitutions that can occur to those skilled in the art are included in the protection scope of the present invention. In practical applications, the deposition furnace tube may further include other components according to different practical requirements, and the components are not described one by one because they have no direct relation to the solution of the present invention.
The application range of the deposition furnace tube of the present invention is not limited to LPCVD process, and the reaction conditions, reaction gases, etc. can be changed to be applied to other processes.
In summary, the deposition furnace tube of the invention is additionally provided with the auxiliary heating part above the wafer boat, and the auxiliary heating part is used for heating the middle part of the wafer on the top of the wafer boat while heating by the heater, so that more heat energy is given to the middle part, the deposition rate of the film in the middle part is improved, the thicknesses of the middle part and the edge are basically consistent, the flattening of the film thickness is achieved, the yield of chip products is improved, and the performance consistency of the DRAM produced by the whole wafer is achieved.
While the present invention has been described with reference to several exemplary embodiments, it is understood that the terminology used is intended to be in the nature of words of description and illustration, rather than of limitation. As the present invention may be embodied in several forms without departing from the spirit or essential characteristics thereof, it should also be understood that the above-described embodiments are not limited by any of the details of the foregoing description, but rather should be construed broadly within its spirit and scope as defined in the appended claims, and therefore all changes and modifications that fall within the meets and bounds of the claims, or equivalences of such meets and bounds are therefore intended to be embraced by the appended claims.
Claims (10)
1. A deposition furnace tube, comprising:
a reaction chamber, one end of which is closed and the other end of which is provided with an opening;
a heater disposed around a periphery of the reaction chamber;
the wafer boat is positioned in the reaction chamber and used for bearing a plurality of batches of wafers;
the base is used for supporting the wafer boat and can drive the wafer boat to move into the reaction cavity and seal the opening or drive the wafer boat to move out of the reaction cavity; and
and the auxiliary heating part is arranged at one end of the reaction chamber and is positioned above the wafer boat, and the auxiliary heating part is configured to heat the middle part of the wafer positioned at the top of the wafer boat while the heater heats the wafer.
2. The deposition furnace tube of claim 1, wherein the auxiliary heating portion at least partially covers an inner surface of one end of the reaction chamber.
3. The deposition furnace tube of claim 1, wherein the auxiliary heater, the boat, and the reaction chamber are disposed coaxially.
4. The deposition furnace tube of claim 1, wherein the auxiliary heating portion comprises a resistive wire.
5. The deposition furnace tube of claim 4, wherein the resistance wire is disc-shaped, and a density of the resistance wire in a middle portion of the auxiliary heating portion is greater than a density of the resistance wire at a periphery of the auxiliary heating portion.
6. The deposition furnace tube of claim 5, wherein the auxiliary heating portion comprises a plurality of annular resistance wires, the plurality of resistance wires are arranged coaxially with the reaction chamber, and the number of the resistance wires near the axis is greater than the number of the resistance wires far away from the axis.
7. The deposition furnace tube of claim 5, wherein the auxiliary heating portion comprises a plurality of resistive wires radially distributed from a center of the disk.
8. The deposition furnace of claim 1, wherein the deposition furnace is configured to deposit a thin film on the surface of the wafer during the deposition process by using the reaction gas introduced into the reaction chamber.
9. The deposition furnace of claim 8, wherein the deposition process is a low pressure chemical vapor deposition process, the reaction gas is one or more of monosilane, dichlorosilane, silicon tetrachloride and ammonia, and the pressure in the reaction chamber is 0.1-100 torr and the temperature in the reaction chamber is 350-800 ℃ during the low pressure chemical vapor deposition process.
10. The deposition furnace of claim 8, wherein the film thickness is 2-150 nm, and the ratio of the film thickness at the center of the wafer to the film thickness at the edge of the wafer is 1: 1.025.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811063163.9A CN110894598A (en) | 2018-09-12 | 2018-09-12 | Deposition furnace tube |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811063163.9A CN110894598A (en) | 2018-09-12 | 2018-09-12 | Deposition furnace tube |
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| CN110894598A true CN110894598A (en) | 2020-03-20 |
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| CN201811063163.9A Pending CN110894598A (en) | 2018-09-12 | 2018-09-12 | Deposition furnace tube |
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| CN (1) | CN110894598A (en) |
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| CN113373522A (en) * | 2021-05-31 | 2021-09-10 | 北海惠科半导体科技有限公司 | Diffusion device and diffusion system |
| CN113584595A (en) * | 2021-07-28 | 2021-11-02 | 长鑫存储技术有限公司 | Diffusion furnace |
| US11862490B2 (en) | 2021-07-28 | 2024-01-02 | Changxin Memory Technologies, Inc. | Diffusion furnace |
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