CN110838787A - SiC MOSFET active driving circuit for improving driving performance - Google Patents

SiC MOSFET active driving circuit for improving driving performance Download PDF

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CN110838787A
CN110838787A CN201911116005.XA CN201911116005A CN110838787A CN 110838787 A CN110838787 A CN 110838787A CN 201911116005 A CN201911116005 A CN 201911116005A CN 110838787 A CN110838787 A CN 110838787A
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circuit
current
driving
voltage
gate
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CN110838787B (en
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刘平
李海鹏
黄守道
陈梓健
陈常乐
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Hunan University
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0003—Details of control, feedback or regulation circuits
    • H02M1/0038—Circuits or arrangements for suppressing, e.g. by masking incorrect turn-on or turn-off signals, e.g. due to current spikes in current mode control
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0048—Circuits or arrangements for reducing losses
    • H02M1/0054—Transistor switching losses
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

The invention discloses a SiC MOSFET active drive circuit with improved drive performance, which introduces a drain current IDAnd drain-source voltage VdsThe instantaneous change state of the drive current I is used for judging the switching process state of the SiC MOSFET, obtaining an opening process detection judgment signal and a closing process detection judgment signal which are used as intermediate quantities through logic judgment, finally controlling a drive current injection control circuit and a drive current shunt circuit, and injecting the drive current I at different stagesg2Or shunt the drive current Ig3In coordination with the driving current I output by the main driving circuitg1Obtaining driving currents I of various gridsGThe active driving circuit can restrain voltage and current overshoot, meanwhile, the switching loss is not increased, and the switching speed of the SiC MOSFET is not affected basically.

Description

SiC MOSFET active driving circuit for improving driving performance
Technical Field
The invention relates to the technical field of power electronics, in particular to a SiCMOS active driving circuit with improved driving performance.
Background
The SiC MOSFET, as a wide bandgap semiconductor device with great development prospects, has the advantages of high switching speed, low on-resistance, high thermal conductivity, and the like, and can greatly reduce the volume of elements such as inductors, capacitors, radiators, and the like, greatly reduce the volume, weight, and cost of power electronic devices, and greatly improve the performance of systems. Although SiC MOSFETs have several advantages, their high switching speed also presents a number of problems. The extremely fast switching speed of the SiC MOSFET is very sensitive to parasitic parameters caused by packaging, wiring and application circuits, junction capacitance of the device and the like, and in the application occasions of high voltage and high switching speed, very high dv/dt and di/dt appear in a loop, and the problems of switching oscillation, overvoltage and overcurrent, drive failure and the like are very easily generated due to the existence of the parasitic parameters, so that the output capability, the electromagnetic compatibility and the reliability of the SiC MOSFET application circuit are obviously reduced. In addition, the existence of the problems of overvoltage and overcurrent necessarily causes the problems of cost increase and device capacity waste. The problems of overshoot, oscillation and electromagnetic interference caused by high switching speeds and parasitic parameters have been one of the major obstacles affecting the widespread use of silicon carbide devices.
The traditional driving circuit can not dynamically change driving parameters, and in order to limit overvoltage and overcurrent in the switching process, a larger driving resistor and a larger grid capacitor are generally selected or an additional buffer circuit is added. In addition, an active driving circuit can be adopted to control each switching stage of the device, the switching characteristic of the device is optimized, and voltage and current overshoot is reduced. The active driving circuit is characterized in that a constant value is kept different from a constant value of driving parameters (driving voltage, driving current and driving resistance) of a traditional driving circuit in a switching process, an active control device is added into the traditional driving circuit, different driving resistances, driving voltages or driving currents can be adopted for driving in different stages according to requirements, the switching characteristics of the device are adjusted, and voltage spikes and current overshoots can be reduced while the switching speed is kept. The active driving circuit can be divided into an open-loop driving circuit and a closed-loop driving circuit. The open-loop driving circuit is driven by adopting different grid resistors and grid voltages in different stages according to the switching characteristics of the SiC MOSFET, but closed-loop feedback is not formed, and a multi-level control method, a multi-drive resistor control method and the like are mainly adopted.
The multilevel control method controls the switching speed by changing the driving voltage in different stages, for example, patent of invention (patent No. CN201610551724) a SiC MOSFET gradual change level driving circuit and method suitable for a dc solid-state power controller (patent No. CN201810581095) a SiC MOSFET driving circuit based on gate boosting, etc.
The multi-driving resistance control method controls the switching speed by changing the driving resistance values at different stages, for example, patent of the invention (patent No. CN201710341561.1), a SiC MOSFET driving circuit for adaptively adjusting the driving resistance, patent No. CN201810175507.9, an open-loop driving circuit for optimizing the on-waveform of a silicon carbide MOSFET, and the like.
The closed-loop driving circuit mainly forms closed-loop feedback through the variation of drain current, drain-source voltage, grid-source voltage or the variation rate of the drain current, the variation rate of the drain-source voltage and the like, controls the switching process of the SiC MOSFET, and enables the corresponding variation to change according to a given reference value, thereby inhibiting the voltage current peak value and the oscillation in the switching process. The realization of closed-loop drive control needs a plurality of links such as detection, analog-to-digital conversion, comparison, judgment, processing and the like, has larger time delay, and is difficult to be applied to SiC MOSFET devices with higher switching speed.
Therefore, the following defects exist in the conventional SiC MOSFET driving circuits for suppressing overvoltage and overcurrent:
1) the method adopts a large-resistance driving resistor or a parallel gate-source capacitor: the switching speed can be effectively reduced, voltage and current overshoot is restrained, but independent control on a switching stage cannot be achieved, switching delay and Miller platform time are increased, switching loss is greatly increased while voltage and current overshoot is reduced, and efficiency of the converter is affected.
2) Using a buffer circuit: the turn-off overvoltage of the SiC MOSFET can be effectively reduced, but the turn-on overcurrent cannot be reduced. In addition, the buffer circuit needs to add high-voltage devices, which causes large additional loss.
3) Multi-level control method: a plurality of driving power supplies are connected in series or a resistance voltage division network is used for generating the required driving voltage. The circuit is complicated, the efficiency of the driving power supply is low, large driving stage loss is generated at high switching frequency, and the reduction or no increase of the switching loss is difficult to realize while suppressing the voltage and current overshoot.
4) Multi-drive resistance control method: the switching circuit is switched to a larger driving resistor in a current rising stage and a current falling stage so as to reduce the current change rate, and is switched to a smaller driving resistor in a time delay stage and a Miller platform stage so as to accelerate the switching speed of the stages. Since the switching speed of SiC MOSFETs is fast, a faster driving circuit needs to be added to the resistance switching circuit. In addition, the multi-driving resistance control method generally adopts processors such as CPLD/FPGA and the like to perform high-precision time control on resistance switching, so that the cost and complexity of the system are increased.
5) Conventional closed-loop control type drive circuit: the method can accurately realize the waveform control of the switching process, suppress voltage and current spikes and control the switching loss, has strong adaptability, but has longer time delay in the processes of detection, feedback, processing and driving, needs a high-speed digital-to-analog conversion chip, an FPGA/CPLD and other digital processors, and has high cost and complex realization.
Disclosure of Invention
Problem (A)
Based on the technical defects, the invention provides an SiC MOSFET active driving circuit with improved driving performance, which overcomes or at least partially solves the above problems, has a simple structure, is fast and reliable in operation, can suppress overvoltage/overcurrent and oscillation in the switching process of the SiC MOSFET, and simultaneously controls the switching loss in the switching process to be reduced or not increased significantly, so as to solve the problems that voltage and current overshoot suppression and switching loss are difficult to be considered, the adaptive regulation capability is weak, the implementation is complex, and the control response is slow.
(II) technical scheme
The invention provides a SiC MOSFET active driving circuit with improved driving performance, which comprises dIDdV/dt detection circuitDSDt detection circuit, switching-on processThe device comprises a detection judgment circuit, a turn-off process detection judgment circuit, a driving current injection control circuit and a driving current shunt control circuit; the dIDThe input end and the output end of the/dt detection circuit are respectively connected with a main source S of the SicMOSFET and a switching-on process detection judgment circuit, dVDSThe input end and the output end of the/dt detection circuit are respectively connected with the drain D of the SiC MOSFET and the turn-off process detection judgment circuit, and the PWM driving voltage V of the main driving circuitpwmAnd the output ends of the main driving circuit, the driving current injection control circuit and the driving current shunt control circuit are connected to the grid G of the SiC MOSFET.
In one embodiment, the dIDThe output of the/dt detection circuit is the parasitic inductance L between the auxiliary source S and the main source SsSInduced voltage V onsSSaid dVDSThe output quantity of the/dt detection circuit is composed of voltage dividing resistors R7 and R8 and a capacitor C1Resistance R9And high speed operational amplifier OP1Output voltage V of the formed differentiating circuitdvThe voltage value of the output voltage is- (R)7/R8)*(C1*R9)*(dVdsDt) in which VdsIs the drain-source voltage of the SiC MOSFET.
In one embodiment, the turn-on process detection and judgment circuit comprises a current limiting resistor R1And R2Four limiting diodes D1～D4Formed double amplitude limiting circuit and logic gate U1And an inverter U2Logic high level is defined as 0V, and logic low level is defined as negative driving voltage VeeThe input signal of the turn-on process detection and judgment circuit is VpwmAnd VsS，VpwmAnd VsSBoth pass through a current limiting resistor R1And R2Four limiting diodes D1～D4The formed double amplitude limiting circuit is connected to an AND logic gate U1And a logic gate U1Output terminal of the control circuit outputs a control signal Y1AND logic gate U1Output terminal of and inverter U2After connection, another output control signal Y is output2。
In one embodiment, the shutdown process detection and judgment circuit comprises a current limiting resistor R3And R4, four clipping diodes D5～D8Formed double amplitude limiting circuit and NOR gate logic gate U3And a reverser U4Logic high level is defined as 0V, and logic low level is defined as negative driving voltage VeeThe input signal of the turn-off process detection and judgment circuit is VpwmAnd Vdv，VpwmAnd VdvRespectively pass through a current limiting resistor R3And R4Four limiting diodes D5～D8The formed double amplitude limiting circuit is connected to a NOR gate logic gate U3Of a NOR gate logic gate U3Output terminal of the control circuit outputs a control signal Y3NOR gate logic gate U3Output terminal of and inverter U4After connection, another output control signal Y is output4。
In one embodiment, the drive current injection control circuit comprises an OR logic gate U5High-speed signal NMOS tube M1～M2High-speed signal PMOS tube M3And R5、R6Level conversion circuit composed of high-speed signal PMOS transistor M4Diode D1Current limiting resistor Rx1Constituting a drive current injection circuit, Y1And Y3Connected to an OR logic gate U as an ON process detection judgment signal and an OFF process detection judgment signal, respectively5Or logic gate U5Output terminal Y of5Is connected to M1Of gates, or logic gates U5Is defined as 0V, and the logic low level is defined as the negative driving voltage Vee。M1Are connected to R and the source electrode of6And a negative drive voltage Vee，R6Is connected to M at the other end2Grid electrode of, M3Gate of (2) and R5One end of (A) R5Another end of (1), M2Drain electrode of (1), M4Is connected to a supply voltage Vcc，M3Is connected with a negative driving voltage Vee，M2And M3Are commonly connected to M4Of the grid electrode, M4Drain electrode of (2) through1、Rx1In turn, are connected in series to the gate of the SiC MOSFET.
In one embodiment, the driving current shunt control circuit comprises an AND logic gate U6High-speed signal NMOS tube M5Diode D2Current limiting resistor Rx2Constituting a drive current shunt circuit, Y2And Y4Are respectively used as a switching-on process detection judgment signal and a switching-off process detection judgment signal to be connected to the AND logic gate U6Logic high level is defined as 0V and logic low level is defined as negative driving voltage VeeAND logic gate U6Output terminal Y of6Is connected to M5Of the grid electrode, M5Is connected to a negative driving voltage Vee，M5Through the drain electrode of Rx1、D2In turn, are connected in series to the gate of the SiC MOSFET.
In one embodiment, the negative driving voltage Veeis-5V, the supply voltage VccIs + 20V.
(III) advantageous effects
Compared with the prior art, the invention adds a switching process detection and judgment circuit, a grid current control circuit and a corresponding drive circuit on the basis of the traditional SiC MOSFET drive circuit, and actually belongs to a drive current dynamic adjustment type SiC MOSFET drive circuit. Switching process detection circuit dIDThe/dt detection circuit (parasitic inductance L between the auxiliary source and the main source of the SiC MOSFET)sS) The dv/dt detection circuit and the amplitude limiting circuit, the judgment function is realized by adopting a simple and reliable logic gate circuit with short time delay, and a corresponding level signal is output to drive the grid current control circuit to increase the drive current or reduce the drive current. The invention reduces the driving current in the current rising stage and the current falling stage to reduce the voltage current overshoot(ii) a The driving current is increased in the switching delay stage, the Miller level stage, the saturation conduction stage and the gate discharge complete turn-off stage, the stages are accelerated to increase the switching speed, the increased switching time caused by the suppression of the current and voltage overshoot can be compensated, and the switching loss is reduced. Compared with the traditional drive optimization circuit for reducing overvoltage and overcurrent, such as a method for increasing grid resistance and the like, the SiCSMOSFET active drive circuit has lower delay time and switching loss. Compared with a multi-level drive control method and a multi-resistance drive control method, the method is simple to implement, and the switching loss is smaller under the same overvoltage and overcurrent suppression effect. Compared with a closed-loop control driving circuit, the high-speed switch control circuit has the advantages of simple structure, easiness in implementation and high control response speed, and can better meet the requirement for controlling the high-speed switching process of the SiC MOSFET.
Drawings
FIG. 1 is a schematic diagram of the on-off waveforms and the driving current waveforms of a SiC MOSFET before and after modification;
FIG. 2 is a block diagram of the general structure of the SiC MOSFET active drive circuit of the present invention;
FIG. 3 is a circuit diagram of a turn-on process detection and determination circuit and a turn-off process detection and determination circuit of the SiC MOSFET active drive circuit in an embodiment of the present invention;
FIG. 4 is a schematic diagram illustrating the driving current control of the SiC MOSFET active driving circuit according to an embodiment of the present invention;
fig. 5 is a graph comparing the test results of the SiC MOSFET active driver circuit (AGD) and the no-drive-current regulator Circuit (CGD) in the present invention.
Detailed Description
The following detailed description of embodiments of the present invention is provided in connection with the accompanying drawings and examples. The following examples are intended to illustrate the invention but are not intended to limit the scope of the invention.
Referring to fig. 1, the turn-on process of the SiC MOSFET can be divided into 4 stages, i.e., a turn-on delay stage, a current rise stage, a voltage drop stage, and a saturation conduction stage, as shown at t in fig. 10-t4The waveform of the driving current during switching of the conventional driving circuit is shown as I in FIG. 1g1The waveforms of drain current and drain-source voltage during switching are shown as I in FIG. 1d、VdsAs shown. The ideal SiC MOSFET conduction process is that the larger gate drive current I is generated in the conduction delay stageGTo shorten the on-time; reducing the driving current in the current rising stage to reduce di/dt and inhibit the over-current from being switched on; increasing the driving current in the voltage reduction stage to reduce the influence of the Miller effect on accelerating the switching speed; and the driving current is increased in the saturated conduction stage, so that the switching-on process is accelerated.
In the current rising stage, the driving current still charges the gate capacitor, and the gate voltage VGSAbove the turn-on threshold voltage VthThe SiC MOSFET begins to conduct. According to the static characteristics of a MOSFET, the drain current can be defined as:
Id＝gm×(VGS(t)-Vth) (1)
the drain current I can be obtained by differentiating the two ends of the formula (1)dRising slope of (1), drain current IdRising slope and gate drive current IGAnd an input capacitance CissIn a functional relationship:
Figure BDA0002274062410000091
current overshoot value I of the switching-on processrrCan be calculated by equation (3):
Figure BDA0002274062410000092
in the three formulae, gmIs transconductance of SiC MOSFET, CissInput capacitance (C) of SiC MOSFETiss＝Cgd+CgsI.e. the sum of the capacitance between the gate drain and the capacitance between the gate source), V)thIs the SiC MOSFET turn-on threshold voltage, VGSIs the gate voltage, Q, of the SiC MOSFETrrFor reverse recovery of the antiparallel diode, IGIs the gate drive current.
As can be seen from expressions (1) to (3), the current overshoot value in the turn-on process is related to the drain current change rate, and the smaller the current change rate, the smaller the current overshoot value, and the current change rate is proportional to the gate drive current. Therefore, the driving current can be reduced in the current rising stage, and the current peak value in the switching-on process can be restrained.
In the voltage drop phase, the drain current IdKeeping constant, the gate voltage is clamped to the Miller level, at which time the gate drive current IGFor Miller capacitance C onlygdThe charge, drain-source voltage drop rate can be expressed as equation (4):
Figure BDA0002274062410000093
the driving current is increased in the voltage reduction stage, so that the Miller platform process can be accelerated, the turn-on time is shortened, and the loss in the stage is reduced.
In the conduction delay stage and the saturation conduction stage of the switching-on process, the driving current is equivalent to the charging of the input capacitor, and the increase of the driving current in the two stages is equivalent to the increase of the charging current, so that the time of the two stages can be shortened, and the switching speed is accelerated.
The turn-off process is the inverse of the turn-on process, and the waveform of each variable quantity is t in fig. 15～t9As shown. In the current reduction stage, due to the influence of parasitic inductance of the power loop, overvoltage U is generated when the SiC MOSFET is turned offovIt can be calculated by equation (5):
Figure BDA0002274062410000101
Lloopis the total parasitic inductance of the power loop. The change rate of the drain current at this stage can still be described by the formula (2), that is, at the current reduction stage, the driving current is reduced (the direction of the driving current in the turn-off process is opposite to that in the turn-on process), and the turn-off overvoltage in the turn-off process can be inhibited.
Similar to the turn-on process, the discharge path is increased at the turn-off delay stage, the voltage rise stage and the grid discharge stage, which is equivalent to increasing the driving current, so that the discharge process of the grid capacitor can be accelerated, the switching speed is accelerated, and the loss is reduced.
Therefore, the ideal driving current under the control of the above-mentioned driving current adjustment strategy of the present invention is shown as I in FIG. 1G(red dotted line) as shown (there will be a difference in the actual controlled drive current). In order to realize the dynamic adjustment effect of the driving current shown in FIG. 1, the general structure block diagram of the SiC MOSFET active driving circuit with improved driving performance designed by the invention is shown in FIG. 2, and the invention adds dI to the traditional driving in addition to the original main driving circuit (7)DDt detection circuit (1) and dVDSThe device comprises a/dt detection circuit (2), an opening process detection and judgment circuit (3), a closing process detection and judgment circuit (4), a driving current injection control circuit (5) and a driving current shunt control circuit (6) so as to realize the dynamic control of the driving current in the switching process.
As can be seen from fig. 2 to 4, the connection relationship among the circuits is as follows:
dIDthe input end and the output end of the/dt detection circuit are respectively connected with the main source S of the SiC MOSFET and the input end of the turn-on process detection judgment circuit, dVDSThe input end and the output end of the/dt detection circuit are respectively connected with the drain D of the SiC MOSFET and the turn-off process detection judgment circuit, and the PWM driving voltage V of the main driving circuitpwmThe output end of the main driving circuit is connected to the grid G of the SiC MOSFET, the output end of the on-process detection judging circuit is connected to the input ends of the driving current injection control circuit and the driving current shunt control circuit, the output end of the off-process detection judging circuit is connected to the input ends of the driving current injection control circuit and the driving current shunt control circuit, the output ends of the driving current injection control circuit and the driving current shunt control circuit are connected to the grid G of the SiCMOS, the switching-on process detection judging circuit, the switching-off process detection judging circuit, the driving current injection control circuit and the driving current shunt control circuit all comprise logic gate circuits, and the outputs of the driving current injection control circuit and the driving current shunt control circuit are respectively extra injection driving current I.g2Or shunt the drive current Ig3。
dIDDt detection circuit and dVDSThe drain current I is detected by the/dt detection circuitDAnd drain-source voltage VdsCircuits for changing state, dIDThe/dt detection circuit is used for detecting the drain current IDRate of change of (c), voltage V of output thereofsSIs dIDThe/dt times the parasitic inductance L between the auxiliary source and the main sourceSsThrough dIDInduced voltage V obtained by/dt detection circuitsSAnd a PWM drive voltage V in the main drive circuitpwmThe input quantity of the detection judgment circuit is used as the starting process; dVDSThe/dt detection circuit is used for detecting the change rate of the drain-source electrode voltage in the switching process and consists of a voltage division resistor R7、R8And R9、C1And high speed operational amplifier OP1Constituent differentiating circuit construction, the output voltage V of whichdvThe voltage values of (a) are: vdv＝-(R7/R8)*(C1*R9)*(dVdsDt), the voltage signal VdvAnd the PWM voltage V in the main drive circuitpwmThe output is used as the input quantity in the detection judgment circuit of the turn-off process; after logical judgment of a double amplitude limiting circuit and a logical gate circuit in the turn-on process detection judgment circuit and the turn-off process detection judgment circuit, a turn-on process detection judgment signal (Y) is obtained1And Y2) And a shutdown process detection judgment signal (Y)3And Y4) The detection and judgment signal of the opening process and the detection and judgment signal of the closing process are used as intermediate state quantities and are respectively input into the drive current injection control circuit and the drive current shunt control circuit to control the additional injection of the drive current Ig2Or shunt the drive current Ig3And is matched with the driving current I output by the main driving circuitg1Total drive current I for the gates of a common pair of SiC MOSFETsGAnd (5) controlling.
The invention introduces the drain current IDAnd drain-source voltage VdsThe switching state is judged, and a detection judgment signal (Y) of the opening process is obtained through logic judgment1And Y2) And a shutdown process detection judgment signal (Y)3And Y4) And finally controlling the additional injection of the driving current I in the corresponding switching stageg2Or shunt the drive current Ig3In cooperation with the output current I of the main driving circuitg1To obtain various gate drive currents IGThe active driving circuit of the present invention can suppress voltage and current overshoot, and keep the switching loss from increasing, so that the switching speed is not affected.
Further, as shown in fig. 3 and fig. 4, a specific embodiment of the present invention mainly includes:
(1)dIDthe circuit comprises a parasitic inductor L between an auxiliary source and a main sourcesSAuxiliary source s grounded, parasitic inductance LsSInduced voltage V onsS(the voltage between the auxiliary source S and the main source S using the auxiliary source S as a reference point) is dIDThe output signal of the/dt detection circuit;
(2)dVDSa/dt detection circuit composed of a voltage dividing resistor R7、R8Capacitor C1D, resistance R9And high speed operational amplifier OP1Formed by a differential circuit, said dVDSThe input end of the/dt detection circuit passes through R7One end of which is connected to the drain electrode of the SiC MOSFET, whose dVDSThe output of the/dt detection circuit is a voltage signal VdvVoltage signal V thereofdvThe specific values of (A) are: vdv＝-(R7/R8)*(C1*R9)*(dVdsDt) in which VdsIs the drain-source voltage of the SiC MOSFET.
(3) The switching-on process detection judgment circuit: comprising a current limiting resistor R1And R2Four limiting diodes D1～D4Formed double amplitude limiting circuit and logic gate U1Inverter U2Logic high level is defined as 0V, and logic low level is defined as negative driving voltage Vee(preferably-5V). The input signal of the detection and judgment circuit for the switching-on process comprises a PWM driving voltage VpwmAnd parasitic inductance L between the auxiliary source and the main sourcesSInduced voltage V onsS，VpwmAnd VsSRespectively pass through a current limiting resistor R1And R2Four limiting diodes D1～D4The formed double amplitude limiting circuit is connected to an AND logic gate U1And a logic gate U1Output terminal of the control circuit outputs a control signal Y1AND logic gate U1Output terminal of and inverter U2After connection, another output control signal Y is output2Detecting and judging signal Y in the process of opening1And Y2The state is reversed.
(4) The turn-off process detection and judgment circuit comprises a current-limiting resistor R3And R4, four clipping diodes D5～D8Formed double amplitude limiting circuit and NOR gate logic gate U3Reverser U4. In order to use uniform high-low level signals (logic high level is defined as 0V, and logic low level is defined as negative driving voltage Vee) The drive shunt circuit reduces the level conversion link, shortens the control delay time, and the input signal of the turn-off process detection judgment circuit comprises the PWM drive voltage VpwmAnd Vdv，VpwmAnd Vdv(-dVdsDt) two input signals pass through a current limiting resistor R respectively3And R4Four limiting diodes D5～D8The formed double amplitude limiting circuit is connected to a NOR gate logic gate U3Of a NOR gate logic gate U3Output terminal of the control circuit outputs a control signal Y3NOR gate logic gate U3Output terminal of and inverter U4After connection, another output control signal Y is output4Turn-off process detection judgment signal Y3And Y4The state is reversed.
(5) Drive current injection control circuit: comprising an OR logic gate U5High-speed signal NMOS tube M1～M2High-speed signal PMOS tube M3And R5、R6Level conversion circuit composed of high-speed signal PMOS transistor M4Diode D1Current limiting resistor Rx1The drive current injection circuit is formed. Specifically, the opening process detection judgment signal Y1And a shutdown process detection judgment signal Y3Connection ofTo OR logic gate U5Or logic gate U5Output terminal Y of5Is connected to M1Of gates, or logic gates U5Is defined as 0V, and the logic low level is defined as the negative driving voltage Vee，M1Are connected to R and the source electrode of6And a negative drive voltage Vee，R6Is connected to M at the other end2Grid electrode of, M3Gate of (2) and R5One end of (A) R5Another end of (1), M2Drain electrode of (1), M4Is connected to a supply voltage Vcc(preferably +20V), M3Is connected with a negative driving voltage Vee，M2And M3Are commonly connected to M4Of the grid electrode, M4Drain electrode of (2) through1、Rx1Sequentially connected in series to the gate of the SiC MOSFET to form a gate injection control current Ig2To thereby drive a current I to the gateGAnd (5) controlling.
(6) Drive current divides the control circuit: comprises an AND logic gate U6High-speed signal NMOS tube M5Diode D2Current limiting resistor Rx2The drive current shunt circuit is formed. Specifically, the opening process detection judgment signal Y2And a shutdown process detection judgment signal Y4Connected to AND logic gate U6And a logic gate U6Is defined as 0V, and the logic low level is defined as the negative driving voltage VeeAND logic gate U6Output terminal Y of6Is connected to M5Of the grid electrode, M5Is connected to a negative driving voltage Vee，M5Through the drain electrode of Rx1、D2Sequentially connected in series to the gate of the SiC MOSFET to form a gate shunt control current Ig3To thereby drive a current I to the gateGAnd (5) controlling.
As can be seen from the following states of the stages (1) to (8), referring to fig. 1, the specific operation principle of the active driving circuit is as follows:
(1)t0～t1in the on-delay stage, the PWM driving signal is at high level,VsSthe signal is high level (defined as 0V is high level), and the output of the detection and judgment circuit in the opening process is Y1＝1，Y 20, and Y is present throughout the switching-on process3＝0、Y 41, Y is output after passing through an AND logic gate AND2 AND an OR logic gate OR15＝1(0V)，Y6＝0(Vee) Signal MOS transistor M1Is turned on to connect M2And M3Is pulled low, M2And M3The push-pull circuit has an output voltage of 0.5Vcc+Vee) PMOS transistor M4The gate voltage of (1) is lower than the source voltage, M4Conducting to inject extra driving current I into the driving loopg2Driving current IGIs increased to Ig1+Ig2To speed up the turn-on delay process.
(2)t1～t2: in the current rising stage, the PWM driving signal is at high level, VsSThe signal being at low level (V)sS<0) The output of the detection and judgment circuit in the turn-on process is Y1＝0，Y2When 1, Y is output5＝0(Vee)1(0V)，Y6＝1(0V)，M4Is not conducted, M5Is higher than the source voltage, M5Conducting, PWM drive current I injected by drive power supplyg1Is shunted, the gate drives a current IGIs changed into Ig1-Ig3The drive current is reduced, the current rise process is delayed, and the drain current conversion rate is reduced.
(3)t2～t3、t3～t4The operating conditions of the two-stage drive circuit and t0～t1Are all M4On, M5Non-conducting, drive current IGIs Ig1+Ig2To speed up these two processes and reduce losses.
(4)t4～t5A normal on-state in which Y is1＝1，Y2＝0，Y3＝0，Y 41, then outputs the control signal Y5＝1，Y6＝0，M4On, M5Off, M4And M5And the SiC MOSFET gate source electrode can apply forward conduction voltage without influencing the normal work of the power circuit.
(5)t5～t6In the off delay stage, the PWM driving signal is at a low level, -dVdsThe feedback signal of/dt is high level (0V), and the output of the shutdown process detection judgment circuit is Y3＝0、Y 41, and during the entire switch-off process, Y1＝0，Y 21, Y is output after passing through an AND logic gate AND2 AND an OR logic gate OR15＝0(Vee)，Y6＝1(0V)，M4Is not conducted, and M5On, a discharge path is added to the gate capacitor of the SicMOSFET to drive current IGIs prepared fromg1Is changed into-Ig1-Ig3The turn-off delay process is accelerated.
(6)t6～t7In the voltage-up stage, the PWM driving signal is at a low level, -dVdsThe/dt feedback signal is low (V)ee) The output of the shutdown process detection judgment circuit is Y3＝1、Y4When it is equal to 0, Y is output5＝1(0V)，Y6＝0(Vee) The output signal of the stage is delayed for a certain time (the actual hardware detection and judgment circuit will bring a certain delay), so that the output signal acts on the current reduction stage M4On, M5Cut-off, drive current IGIs changed into-Ig1+Ig2The gate discharge current is reduced in the turn-off process, so that the current reduction process is delayed, the current change rate is reduced, and the turn-off voltage overshoot in the turn-off process can be kept.
(7)t7～t8,t8～t9(ii) a The operating conditions of the two stages of the drive circuit and t5～t6Coincidence, i.e. outputting control signal Y5＝0(Vee)，Y6While the output signal is 1(0V), the output signal must be delayed for a short time. In these two phases M4Is not conducted, and M5Conducting, driving current IGIs prepared fromg1Is changed into-Ig1-Ig3The progress of these two phases is accelerated and the losses are reduced.
(8)t9A normal turn-off phase in which Y is1＝0，Y2＝1，Y3＝0，Y 41, output Y5＝0(Vee)，Y6＝1(0V)，M5Is turned on and M4And the grid electrode is not conducted, normal turn-off negative pressure can be applied to the grid electrode, and normal work of the power circuit is not influenced.
The control logic in the turn-on process and the turn-off process are shown in the following tables 1 and2, and the control logic pair gate current I in each stage is shown in tables 1-2GThe final control effect of (1).
TABLE 1 control logic table for each stage of opening process
TABLE 2 shutdown procedure control logic table for each stage
Figure BDA0002274062410000171
The open-loop SiC MOSFET active driving circuit can reasonably set Rg,,Rx1,Rx2To control the corresponding driving effect, wherein Rg,,Rx1,Rx2The magnitude of the driving current can be controlled to be additionally injected and the shunt magnitude of the driving current can be controlled, and the specific set value can be obtained through the analysis and calculation of the equivalent circuit in the driving process and the verification of a double-pulse experiment.
Referring to fig. 1 and 5, compared with the switching process adjusting effect of the conventional driving circuit (normal resistance value driving), the switching process adjusting method and device provided by the invention can detect each stage of the switching process through the switching process detecting and judging circuit, realize dynamic adjustment of the driving current of the SiCMOSFET in the switching process, and can inhibit voltage and current overshoot, keep the switching loss from increasing, and basically avoid influence on the switching speed. Compared with the common increased grid resistance regulation, the invention effectively reduces the delay time and the switching loss and can achieve better control effect.
Finally, the method of the present invention is only a preferred embodiment and is not intended to limit the scope of the present invention. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (7)

1. A SiC MOSFET active driving circuit for improving driving performance is characterized by comprising dIDdV/dt detection circuitDSThe device comprises a/dt detection circuit, a switching-on process detection and judgment circuit, a switching-off process detection and judgment circuit, a driving current injection control circuit and a driving current shunt control circuit; the dIDThe input end and the output end of the/dt detection circuit are respectively connected with a main source S of the SiC MOSFET and a switching-on process detection judgment circuit, dVDSThe input end and the output end of the/dt detection circuit are respectively connected with the drain D of the SiCMOSFET and the turn-off process detection judgment circuit, and the PWM driving voltage V of the main driving circuitpwmAnd the output ends of the main driving circuit, the driving current injection control circuit and the driving current shunt control circuit are connected to the grid G of the SiC MOSFET.
2. The active drive circuit of claim 1, wherein dI is the first and second transistorsDThe output of the/dt detection circuit is the parasitic inductance L between the auxiliary source S and the main source SsSInduced voltage V onsSSaid dVDSThe output quantity of the/dt detection circuit is composed of voltage division resistors R7 and R8 and a capacitor C1Resistance R9And high speed operational amplifier OP1Output voltage V of the formed differentiating circuitdvOutput voltage VdvHas a voltage value of- (R)7/R8)*(C1*R9)*(dVdsDt) in which VdsIs the drain-source voltage of the SiC MOSFET.
3. According to claim 2The active driving circuit is characterized in that the switching-on process detection and judgment circuit comprises a current-limiting resistor R1And R2Four limiting diodes D1～D4Formed double amplitude limiting circuit and logic gate U1And an inverter U2Logic high level is defined as 0V, and logic low level is defined as negative driving voltage VeeThe input signal of the turn-on process detection and judgment circuit is VpwmAnd VsS，VpwmAnd VsSBoth pass through a current limiting resistor R1And R2Four limiting diodes D1～D4The formed double amplitude limiting circuit is connected to an AND logic gate U1And a logic gate U1Output terminal of the control circuit outputs a control signal Y1AND logic gate U1Output terminal of and inverter U2After connection, another output control signal Y is output2。
4. The active drive circuit of claim 3, wherein the shutdown process detection and determination circuit comprises a current limiting resistor R3And R4, four clipping diodes D5～D8Formed double amplitude limiting circuit and NOR gate logic gate U3And a reverser U4Logic high level is defined as 0V, and logic low level is defined as negative driving voltage VeeThe input signal of the turn-off process detection and judgment circuit is VpwmAnd Vdv，VpwmAnd VdvRespectively pass through a current limiting resistor R3And R4Four limiting diodes D5～D8The formed double amplitude limiting circuit is connected to a NOR gate logic gate U3Of a NOR gate logic gate U3Output terminal of the control circuit outputs a control signal Y3NOR gate logic gate U3Output terminal of and inverter U4After connection, another output control signal Y is output4。
5. The active drive circuit of claim 4, wherein the drive current injection control circuit comprises an OR logic gate U5High speed signalNMOS tube M1～M2High-speed signal PMOS tube M3And R5、R6Level conversion circuit composed of high-speed signal PMOS transistor M4Diode D1Current limiting resistor Rx1Constituting a drive current injection circuit, Y1And Y3Connected to an OR logic gate U as an ON process detection judgment signal and an OFF process detection judgment signal, respectively5Or logic gate U5Output terminal Y of5Is connected to M1Of gates, or logic gates U5Is defined as 0V, and the logic low level is defined as the negative driving voltage Vee。M1Are connected to R and the source electrode of6And a negative drive voltage Vee，R6Is connected to M at the other end2Grid electrode of, M3Gate of (2) and R5One end of (A) R5Another end of (1), M2Drain electrode of (1), M4Is connected to a supply voltage Vcc，M3Is connected with a negative driving voltage Vee，M2And M3Are commonly connected to M4Of the grid electrode, M4Drain electrode of (2) through1、Rx1In turn, are connected in series to the gate of the SiC MOSFET.
6. The active drive circuit of claim 5, wherein the drive current shunt control circuit comprises an AND logic gate U6High-speed signal NMOS tube M5Diode D2Current limiting resistor Rx2Constituting a drive current shunt circuit, Y2And Y4Are respectively used as a switching-on process detection judgment signal and a switching-off process detection judgment signal to be connected to the AND logic gate U6To the input terminal of (1). The logic high level is defined as 0V, and the logic low level is defined as the negative driving voltage VeeAND logic gate U6Output terminal Y of6Is connected to M5Of the grid electrode, M5Is connected to a negative driving voltage Vee，M5Through the drain electrode of Rx1、D2In turn, are connected in series to the gate of the SiC MOSFET.
7. Active drive circuit according to claim 6, characterized in that the negative drive voltage Veeis-5V, the supply voltage VccIs + 20V.
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