CN110825310B

CN110825310B - Memory management method and memory controller

Info

Publication number: CN110825310B
Application number: CN201810901685.5A
Authority: CN
Inventors: 萧又华; 谢宏志
Original assignee: Shenzhen Daxin Electronic Technology Co ltd
Current assignee: Shenzhen Daxin Electronic Technology Co ltd
Priority date: 2018-08-09
Filing date: 2018-08-09
Publication date: 2023-09-05
Anticipated expiration: 2038-08-09
Also published as: CN110825310A

Abstract

The invention provides a memory management method and a memory controller. The method comprises the following steps: executing a garbage collection instruction; generating a garbage collection information table with a preset size according to one or more collection block strings, and writing the garbage collection information table into a target block string, wherein the garbage collection information table comprises a data tag, a local collection block string list and first filling data; reading valid data of the one or more reclaimed block strings and writing the valid data to the target block string, wherein the written valid data is immediately behind the written garbage collection information table; and closing the target block string, and attaching the local reclamation block string list to a global reclamation block string list in a buffer memory to complete the garbage reclamation instruction.

Description

Memory management method and memory controller

Technical Field

The present invention relates to a memory management method, and more particularly, to a memory management method and a memory controller suitable for a memory device configured with a rewritable nonvolatile memory module.

Background

In general, a memory controller of a memory device configured with a rewritable nonvolatile memory module performs garbage collection operation to move effective data in a plurality of source physical blocks to a plurality of new physical blocks, and erases the plurality of source physical blocks to release space occupied by invalid data of the plurality of source physical blocks.

Conventionally, in the process of performing garbage collection operations on a plurality of physical blocks, when any information of the plurality of physical blocks changes, a Snapshot (snap shot) operation is used to save the information of the plurality of physical blocks originally maintained in a buffer memory and corresponding to the performed garbage collection operation to a rewritable nonvolatile memory module. In this way, during the execution of the garbage collection operation, a lot of time is consumed because the snapshot operation is frequently executed, which results in a lot of delay of the storage device.

Therefore, how to more efficiently save the information of the garbage collection operation to reduce the delay caused by performing the garbage collection operation, thereby improving the working efficiency of the storage device is one of the subjects of the study of the person skilled in the art.

Disclosure of Invention

The invention provides a memory management method, which can generate a garbage collection information table according to the information of a collection block string of which the garbage collection operation is executed when the garbage collection operation starts to be executed, and write the garbage collection information table into a target block string corresponding to the garbage collection operation. In addition, the memory management method may also perform a restore operation to reconstruct the global reclamation block string list using the garbage information table stored in the target block string when the power-down event occurs.

An embodiment of the present invention provides a memory management method, which is suitable for a memory device configured with a rewritable nonvolatile memory module, wherein the rewritable nonvolatile memory module has a plurality of physical blocks, and the plurality of physical blocks are grouped into a plurality of block strings. The method comprises the following steps: a memory management method for a storage device configured with a rewritable non-volatile memory module, wherein the rewritable non-volatile memory module has a plurality of physical blocks and the plurality of physical blocks are grouped into a plurality of block strings, the method comprising: executing a garbage collection instruction, wherein the garbage collection instruction indicates that valid data of one or more collection block strings is collected to a target block string; generating a garbage collection information table with a preset size according to the one or more collection block strings, and writing the garbage collection information table into the target block string, wherein the garbage collection information table comprises a data tag, a local collection block string list and first filling data; reading valid data of the one or more reclaimed block strings and writing the valid data to the target block string, wherein the written valid data is immediately behind the written garbage collection information table; and closing the target block string and attaching the local reclamation block string list to a global reclamation block string list in a buffer memory to complete the garbage reclamation instruction.

An embodiment of the present invention provides a memory controller for controlling a memory device configured with a rewritable nonvolatile memory module. The memory controller includes: the garbage collection device comprises a connection interface circuit, a memory interface control circuit, a garbage collection management circuit unit and a processor. The connection interface circuit is used for being coupled to the host system. The memory interface control circuit is used for being coupled to the rewritable nonvolatile memory module, wherein the rewritable nonvolatile memory module is provided with a plurality of physical blocks, and the physical blocks are grouped into a plurality of block strings. The processor is coupled to the connection interface circuit, the memory interface control circuit, and the garbage collection management circuit unit. The garbage collection management circuit unit is configured to execute a garbage collection instruction received from the processor, wherein the garbage collection instruction instructs collection of valid data of one or more collection block strings to a target block string, wherein the garbage collection management circuit unit is further configured to generate a garbage collection information table having a predetermined size from the one or more collection block strings, and instruct the memory interface control circuit to write the garbage collection information table to the target block string. The garbage collection information table comprises a data tag, a local collection block string list and first filling data. The garbage collection management circuit unit is further configured to read valid data of the one or more collection block strings and write the valid data to the target block string, wherein the written valid data is immediately behind the written garbage collection information table. The garbage collection management circuit unit is further configured to close the target block string and append the local collection block string list to a global collection block string list in a buffer memory to complete the garbage collection instruction.

Based on the above, the memory management method and the memory controller provided by the embodiments of the present invention can generate the garbage collection information table according to the collection block string of the garbage collection operation when the garbage collection operation is started, write the garbage collection information table into the target block string corresponding to the garbage collection operation, and copy the valid data of the collection block string into the target block string having the garbage collection information table, so as to complete the garbage collection operation. In addition, the garbage collection information table in each target block string can also be used to reconstruct the global collection block string list to help manage the usage of the entire block string of the storage device. Therefore, the data stored in the storage device can still be reliable under the condition of reducing access delay caused by garbage collection operation, and the working efficiency of the storage device is further improved.

In order to make the above features and advantages of the present invention more comprehensible, embodiments accompanied with figures are described in detail below.

Drawings

FIG. 1 is a block diagram of a host system and a storage device according to an embodiment of the invention.

FIG. 2A is a flow chart of a memory management method according to an embodiment of the invention.

FIG. 2B is a flow chart of a memory management method according to an embodiment of the invention.

FIG. 3 is a schematic diagram of a plurality of block strings of a rewritable nonvolatile memory module according to an embodiment of the present invention.

Fig. 4A is a schematic diagram illustrating a data structure of a garbage collection information table according to an embodiment of the present invention.

FIG. 4B is a diagram illustrating writing garbage collection information into a target block string according to an embodiment of the present invention.

FIG. 4C is a diagram illustrating a data structure of a global recycling block list according to an embodiment of the present invention.

Fig. 5 is a flowchart illustrating a recovery operation according to an embodiment of the present invention.

Description of the reference numerals

10: host system

20: storage device

110. 211: processor and method for controlling the same

120: host memory

130: data transmission interface circuit

210: memory controller

212: data management circuit

213: memory interface control circuit

214: error checking and correcting circuit

215: garbage collection management circuit unit

2151: garbage recycling execution circuit

2152: recovery block string recording circuit

216: buffer memory

217: power management circuit

220: rewritable nonvolatile memory module

230: connection interface circuit

S211, S212, S213, S214, S215, S216: flow steps of memory management method

S221, S222, S223: flow steps of memory management method

D1: packaging

LUN1: logical number

P1 (1) to P1 (6), P1 (M-1), P1 (M), P2 (1) to P2 (6), P2 (M-1), P2 (M), P3 (1) to P3 (6), P3 (M-1), P3 (M), P4 (1) to P4 (6), P4 (M-1), P4 (M): physical block

P1 to P4: plane surface

BS (1) to BS (6), BS (M-1), BS (M): block string

Page [1] to Page [ N ]: physical page

400: garbage collection information table

410: global recovery block string list

DT: data label

RBI [1] to RBI [ Y ], RBI [1] to RBI [ X ]: block string index value

PD1, PD2: filling data

S51, S52, S53, S54, S55, S56, S57, S58, S59, S60: flow step of recovery operation

Detailed Description

In this embodiment, the storage device includes a rewritable non-volatile memory module (re-writable non-volatile memory module) and a storage device controller (also referred to as a storage controller or a storage control circuit). In addition, the storage device is used with a host system so that the host system can write data to or read data from the storage device.

Referring to fig. 1, a host system (HostSystem) 10 includes a Processor (Processor) 110, a host memory (HostMemory) 120, and a data transfer interface circuit (datatransfer interface circuit) 130. In the present embodiment, the data transmission interface circuit 130 is coupled (also referred to as electrically connected) to the processor 110 and the host memory 120. In another embodiment, the processor 110, the host memory 120, and the data transmission interface circuit 130 are coupled to each other using a system bus (SystemBus).

The storage device 20 includes a storage controller (storage controller) 210, a rewritable nonvolatile memory module (RewritableNon-volatile memory module) 220, and a connection interface circuit (connectionsterface) 230. The memory controller 210 includes a processor 211, a data management circuit (datamanagement circuit) 212, and a memory interface control circuit (MemoryInterface ControlCircuit) 213.

In the present embodiment, the host system 10 is coupled to the storage device 20 through the data transmission interface circuit 130 and the connection interface circuit 230 of the storage device 20 to perform the data access operation. For example, the host system 10 may store data to the storage device 20 or read data from the storage device 20 via the data transfer interface circuit 130.

In the present embodiment, the processor 110, the host memory 120 and the data transmission interface circuit 130 may be disposed on a motherboard of the host system 10. The number of data transmission interface circuits 130 may be one or more. The motherboard may be coupled to the memory device 20 via a wired or wireless connection via the data transmission interface circuit 130. The storage device 20 may be, for example, a USB flash drive, a memory card, a solid state disk (SolidStateDrive, SSD), or a wireless memory storage device. The wireless memory storage device may be, for example, a near field communication (NearField Communication, NFC) memory storage device, a wireless facsimile (WiFi) memory storage device, a Bluetooth (Bluetooth) memory storage device, or a Bluetooth low energy memory storage device (e.g., iBeacon) or the like based on a variety of wireless communication technologies. In addition, the motherboard may also be coupled to various I/O devices such as a global positioning system (GlobalPositioningSystem, GPS) module, a network interface card, a wireless transmission device, a keyboard, a screen, a speaker, etc. through a system bus.

In the present embodiment, the data transmission interface circuit 130 and the connection interface circuit 230 are interface circuits compatible with the high-speed peripheral component connection interface (PeripheralComponentInterconnectExpress, PCIExpress) standard. The data transmission interface circuit 130 and the connection interface circuit 230 use the rapid nonvolatile memory interface standard (Non-VolatileMemoryexpress, NVMe) protocol to transmit data.

However, it should be understood that the present invention is not limited thereto, and the data transmission interface circuit 130 and the connection interface circuit 230 may also be a Memory Stick (MS) interface standard, a Multi-chip package (Multi-chip package) interface standard, a multimedia memory card (MultiMediaCard, MMC) interface standard, an eMMC interface standard, a universal flash memory (UniversalFlashStorage, UFS) interface standard, an eMCP interface standard, a CF interface standard, an integrated drive electronics interface (IntegratedDevice Electronics, IDE) or other suitable standards, which conform to the parallel advanced technology attachment (ParallelAdvancedTechnology Attachment, PATA) standard, the institute of electrical and electronics engineers (institute of electrical and electronics) ElectronicEngineers, IEEE) 1394 standard, the serial advanced technology attachment (serial advanced TechnologyAttachment, SATA) standard, the universal serial bus (UniversalSerialBus, USB) standard, the SD interface standard, the ultra high speed-I (UHS-I) interface standard, the ultra high speed-II (UHS-I) interface standard, the memory stick (memory stick) interface standard, the Multi-chip package (Multi-chip package) interface standard, the mmc interface standard, the eMCP interface standard, or other suitable standards. In addition, in another embodiment, the connection interface circuit 230 may be packaged with the memory controller 210 in a chip, or the connection interface circuit 230 may be disposed outside a chip including the memory controller 210.

In the present embodiment, the host memory 120 is used for temporarily storing instructions or data executed by the processor 110. For example, in the present exemplary embodiment, the host memory 120 may be a Dynamic random access memory (Dynamic RandomAccessMemory, DRAM), a static random access memory (StaticRandomAccess Memory, SRAM), or the like. However, it should be understood that the present invention is not limited thereto and that host memory 120 may be other suitable memory.

The memory controller 210 is configured to execute a plurality of logic gates or control instructions implemented in hardware or firmware and perform operations such as writing, reading and erasing data in the rewritable nonvolatile memory module 220 according to the instructions of the host system 10.

In more detail, the processor 211 in the memory controller 210 is hardware with operation capability, which is used to control the overall operation of the memory controller 210. Specifically, the processor 211 has a plurality of control instructions, and when the memory device 20 is operated, the control instructions are executed to perform operations such as writing, reading and erasing data.

It should be noted that, in the present embodiment, the processor 110 and the processor 211 are, for example, a central processing unit (CentralProcessingUnit, CPU), a Microprocessor (micro-processor), or other programmable processing units (micro processor), a digital signal processor (DigitalSignalProcessor, DSP), a programmable controller, an application specific integrated circuit (ApplicationSpecificIntegratedCircuits, ASIC), a programmable logic device (ProgrammableLogicDevice, PLD), or other similar circuit elements, which are not limited to this embodiment.

In one embodiment, the memory controller 210 also has read-only memory (not shown) and random access memory (not shown). In particular, the rom has a boot code (boot code), and when the memory controller 210 is enabled, the processor 211 executes the boot code to load the control instructions stored in the rewritable nonvolatile memory module 220 into the ram of the memory controller 210. The processor 211 then runs the control commands to perform data writing, reading and erasing operations. In another embodiment, the control instructions of the processor 211 may also be stored in a program code format in a specific area of the rewritable nonvolatile memory module 220, for example, in a physical memory unit dedicated to storing system data in the rewritable nonvolatile memory module 220.

In the present embodiment, as described above, the memory controller 210 further includes the data management circuit 212 and the memory interface control circuit 213. It should be noted that the operations performed by the various components of the memory controller 210 may also be considered operations performed by the memory controller 210.

The data management circuit 212 is coupled to the processor 211, the memory interface control circuit 213 and the connection interface circuit 230. The data management circuit 212 is configured to receive the instruction from the processor 211 to transmit data. For example, data is read from the host system 10 (e.g., host memory 120) via the connection interface circuit 230, and the read data is written into the rewritable nonvolatile memory module 220 via the memory interface control circuit 213 (e.g., write operations are performed according to write instructions from the host system 10). For another example, data is read from one or more physical units of the rewritable nonvolatile memory module 220 via the memory interface control circuit 213 (data may be read from one or more memory units in the one or more physical units) and the read data is written into the host system 10 (e.g., the host memory 120) via the connection interface circuit 230 (e.g., a read operation is performed according to a read instruction from the host system 10). In another embodiment, the data management circuit 212 may also be integrated into the processor 211.

The memory interface control circuit 213 is used for receiving the instruction of the processor 211, and performs a write (also called Programming) operation, a read operation or an erase operation on the rewritable nonvolatile memory module 220 in cooperation with the data management circuit 212.

For example, the processor 211 may execute a sequence of write instructions to instruct the memory interface control circuit 213 to write data into the rewritable non-volatile memory module 220; the processor 211 may execute a sequence of read instructions to instruct the memory interface control circuit 213 to read data from one or more physical units (also referred to as target physical units) of the rewritable nonvolatile memory module 220 that correspond to the read instructions; the processor 211 may execute an erase command sequence to instruct the memory interface control circuit 213 to perform an erase operation on the rewritable nonvolatile memory module 220. The write command sequence, the read command sequence, and the erase command sequence may each include one or more program codes or command codes and are used to instruct the rewritable nonvolatile memory module 220 to perform corresponding writing, reading, and erasing operations. In one embodiment, the processor 211 may also issue other types of instruction sequences to the memory interface control circuit 213 to perform corresponding operations on the rewritable nonvolatile memory module 220.

In addition, the data to be written into the rewritable nonvolatile memory module 220 is converted into a format acceptable to the rewritable nonvolatile memory module 220 by the memory interface control circuit 213. Specifically, if the processor 211 is to access the rewritable nonvolatile memory module 220, the processor 211 transmits a corresponding instruction sequence to the memory interface control circuit 213 to instruct the memory interface control circuit 213 to perform a corresponding operation. For example, the instruction sequences may include a write instruction sequence indicating write data, a read instruction sequence indicating read data, an erase instruction sequence indicating erase data, and corresponding instruction sequences for indicating various memory operations (e.g., changing a plurality of preset read voltage values of a preset read voltage set for a read operation, or performing a garbage collection procedure, etc.). These instruction sequences may include one or more signals, or data, on a bus. Such signals or data may include instruction code or program code. For example, the read instruction sequence may include information such as a read identification code and a memory address.

The rewritable nonvolatile memory module 220 is coupled to the memory controller 210 (memory interface control circuit 213) and is used for storing data written by the host system 10. The rewritable nonvolatile memory module 220 may be a single-level memory cell (SingleLevelCell, SLC) NAND type flash memory module (i.e., a flash memory module that can store 1 bit in one memory cell), a Multi-level memory cell (MLC) NAND type flash memory module (i.e., a flash memory module that can store 2 bits in one memory cell), a three-level memory cell (TripleLevelCell, TLC) NAND type flash memory module (i.e., a flash memory module that can store 3 bits in one memory cell), a four-level memory cell (QuadrupleLevelCell, QLC) NAND type flash memory module (i.e., a flash memory module that can store 4 bits in one memory cell), a three-dimensional NAND type flash memory module (3 DNAND flashmemorymodule) or a vertical NAND type flash memory module (VerticalNANDflash memorymodule) or other flash memory modules having the same characteristics. The memory cells in the rewritable nonvolatile memory module 220 are arranged in an array.

In this embodiment, the rewritable nonvolatile memory module 220 has a plurality of word lines, wherein each of the plurality of word lines includes a plurality of memory cells. Multiple memory cells on the same word line may constitute one or more physical programming units (physical pages). In addition, a plurality of physical program units can form a physical unit (physical block or physical erase unit).

In this embodiment, one physical page is used as the minimum unit of writing (programming) data. The physical units (physical blocks) are the minimum unit of erase, i.e., each physical unit contains one of the minimum number of erased memory cells. Further, the address of each physical page may also be referred to as a physical address.

It should be noted that, in the present embodiment, the system data for recording the information of a physical block or a block string may be recorded by using one or more memory units in the physical block, or one or more memory units of a specific physical block (also referred to as a system physical block) for recording all the system data in a system area.

Furthermore, it must be understood that when the processor 211 groups memory elements (or physical elements) in the rewritable nonvolatile memory module 220 to perform corresponding management operations, such memory elements (or physical elements) are logically grouped without their actual locations being altered.

The memory controller 210 may configure a plurality of logic units for the rewritable nonvolatile memory module 220. The host system 10 accesses user data stored in a plurality of physical units through a configured logical unit. Here, each logical unit may be composed of one or more logical addresses. For example, the Logical unit may be a Logical block (LogicalBlock), a Logical page (LogicalPage), or a Logical Sector (Logical Sector). A logical unit may be mapped to one or more physical units, where a physical unit may be one or more physical addresses, one or more physical sectors, one or more physical program units, or one or more physical erase units. In this embodiment, the logic unit is a logic block, and the logic subunit is a logic page. Each logic unit has a plurality of logic subunits. In this embodiment, the address of the logical subunit is also referred to as a logical address.

In addition, the memory controller 210 establishes a logical-to-physical address mapping table (LogicalTo Physicaladdressmappingtable) and a physical-to-logical address mapping table (PhysicalToLogical addressmappingtable) to record the mapping relationship between the logical address and the physical address allocated to the rewritable nonvolatile memory module 220. In other words, the storage controller 210 may look up a physical address mapped by a logical address through the logical-to-physical address mapping table, and the storage controller 210 may look up a logical address mapped by a physical address through the physical-to-logical address mapping table. However, the above technical concept related to the mapping relationship between the logical address and the physical address is a conventional technical means for those skilled in the art, and will not be described herein. In general operation of the memory controller, the logical-to-physical address mapping table and the physical-to-logical address mapping table may be maintained in the buffer memory 216.

In the present embodiment, the error checking and correcting circuit 214 is coupled to the processor 211 and is used for performing an error checking and correcting procedure to ensure the correctness of the data. Specifically, when the processor 211 receives a write command from the host system 10, the error checking and correcting circuit 214 generates a corresponding Error Correction Code (ECC) and/or error checking code (error detectingcode, EDC) for the data corresponding to the write command, and the processor 211 writes the data corresponding to the write command and the corresponding ECC and/or error checking code into the rewritable nonvolatile memory module 220. Then, when the processor 211 reads data from the rewritable nonvolatile memory module 220, the error correction code and/or the error check code corresponding to the data are read at the same time, and the error check and correction circuit 214 performs an error check and correction procedure on the read data according to the error correction code and/or the error check code.

In one embodiment, the memory controller 210 further includes a buffer memory 216 and a power management circuit 217. The buffer memory 216 is coupled to the processor 211 and is used for temporarily storing data and instructions from the host system 10, data from the rewritable nonvolatile memory module 220 or other system data for managing the memory device 20, so that the processor 211 can quickly access the data, instructions or system data from the buffer memory 216. The power management circuit 217 is coupled to the processor 211 and is used to control the power of the memory device 20.

In the present embodiment, the garbage collection management circuit unit 215 includes a garbage collection execution circuit 2151 and a collection block string recording circuit 2152. The garbage collection management circuit 215 is configured to receive instructions from the processor 211 to perform writing instructions or reprogramming operations. It should be noted that, in an embodiment, the garbage collection management circuit 215 may also be integrated into the processor 211, so that the processor 211 may implement the data writing method provided in this embodiment. In addition, in another embodiment, the garbage collection management circuit 215 may be implemented as a garbage collection management program code module in firmware or software, accessed and executed by the processor 211 to implement the memory management method according to the present invention

It should be noted that in this embodiment, the garbage collection operation is performed for one block string. Details of the block string will be described below with reference to fig. 3.

FIG. 3 is a schematic diagram of a plurality of block strings of a rewritable nonvolatile memory module according to an embodiment of the present invention. Referring to fig. 3, in the present embodiment, the rewritable nonvolatile memory module 220 may have a plurality of packages (pages), each package may have a plurality of physical blocks, the plurality of physical blocks may be divided into N planes, and part or all of the planes may be logically divided into one logical number (Logical unitnumber, LUN). For simplicity of explanation, it is assumed that the rewritable nonvolatile memory module 220 has one package D1, and the package D1 has a plurality of physical blocks. The plurality of physical blocks are divided (grouped) into 4 planes (planes) P1 to P4 (N is equal to 4), wherein the 4 planes are divided into one logical number LUN1. In addition, each plane has M physical units arranged according to a first order, for example, the plane P1 has M physical blocks P1 (1) to P1 (M); the plane P2 is provided with M physical blocks P2 (1) to P2 (M); the plane P3 has M physical blocks P3 (1) to P3 (M); the plane P4 has M physical blocks P4 (1) to P4 (M). In this embodiment, physical blocks with the same arrangement order in each plane are formed into a block string (BlockStripe). For example, the block string BS (1) includes a physical block P1 (1), a physical block P2 (1), a physical block P3 (1), and a physical block P4 (1). That is, all the physical blocks in the 4 planes may constitute M block strings BS (1) to BS (M) arranged according to the first order.

In the present embodiment, the memory controller 210 sequentially writes data into a plurality of block strings according to the sequence of the block strings, and writes data in the same block string according to the sequence of the planes P1 to P4. Assuming that all the block strings are blank, in order to write a write data capable of filling up 4 physical blocks, the memory controller 210 stores the write data into all the physical blocks (e.g., physical block P1 (1), physical block P2 (1), physical block P3 (1) and physical block P4 (1)) of the first blank block string (in this example, block string BS (1)) according to a first order. For another example, if the physical block P1 (1) of the block string BS (1) is not available for storing the data, and the other physical blocks are all available for storing the write data, the storage controller 210 stores the write data into the physical block P2 (1), the physical blocks P3 (1) and P4 (1) of the block string BS (1) and the physical block P1 (2) of the block string BS (2).

In this embodiment, the garbage collection management circuit unit 215 (or the garbage collection execution circuit 2151) is configured to receive an instruction from the processor 211 to execute a garbage collection operation on one or more block strings. The garbage collection management circuit unit 215 (or the collection block string recording circuit 2152) is configured to record information corresponding to the one or more block strings on which the garbage collection operation is performed. Details of the data writing method according to the embodiments of the present invention, and functions of the memory controller 210 and the garbage collection management circuit unit 215 corresponding to the data writing method will be described in detail below with reference to the drawings.

FIG. 2A is a flow chart of a memory management method according to an embodiment of the invention. Referring to fig. 1 and fig. 2A, in step S211, the garbage collection management circuit unit 215 executes a garbage collection instruction, wherein the garbage collection instruction instructs to collect valid data of one or more collection block strings to a target block string.

In particular, the processor 211 may record valid data count values for a plurality of strings of blocks of the rewritable non-volatile memory module 220. When an empty block string is just full of data, the effective data count value of the block string is maximum. When the valid data count value of a block string falls below a valid data threshold (or when the invalid data count of a block string is above a valid data threshold), the processor 211 records a block string index value of the block string in preparation for performing a garbage collection operation on the block string (which may also be referred to as a source block string). At a specific time, the processor 211 may send a garbage collection instruction to the garbage collection management circuit unit 215 to instruct the garbage collection management circuit unit 215 to start performing a garbage collection operation on the source block string (also referred to as a collection block string) to collect (copy) valid data in the collection block string to an available block string (also referred to as a target block string).

In other words, at least two kinds of information are included in the garbage collection instruction, one is information of the collection block string in which valid data is collected, and the other is the target block string. Garbage collection management circuit unit 215 may identify, by the garbage collection instruction, a block string index value (also referred to as a collection block string index value) of the one or more collection block strings indicated by the garbage collection instruction and a block string index value (also referred to as a target block string index value) of a target block string. A block string index value (e.g., BS (1) described above) of a block string may be used by elements of the memory controller 210 to identify the block string and a plurality of physical blocks in the block string. In addition, the block string index value may also be used to indicate the location of the corresponding block string in the rewritable nonvolatile memory module 220.

It is noted that the processor 211 can reuse the recycling block string. Specifically, the processor 211 may perform an erase operation on the recycling block string at an appropriate timing (e.g., at the leisure of the storage device) so that the physical blocks in the recycling block string become blank physical blocks, and thus may be written with data. In addition, in one embodiment, the processor 211 may also select the recycling block string to perform the write operation first, and perform the erase operation on the recycling block string before writing the data corresponding to the write operation.

Next, in step S212, the garbage collection management circuit unit 215 (or the collection block string recording circuit 2152) generates a garbage collection information table having a predetermined size according to the one or more collection block strings, and writes the garbage collection information table to the target block string, wherein the garbage collection information table includes a data tag, a local collection block string list, and first padding data. The architecture of the generated garbage collection information table is described below with reference to fig. 4A.

Fig. 4A is a schematic diagram illustrating a data structure of a garbage collection information table according to an embodiment of the present invention. Referring to fig. 4A, in the present embodiment, the garbage collection information table 400 mainly includes a local collection block string list. The local recycling block string list is used for recording one or more recycling block string index values RBI [1] to RBI [ Y ] of one or more recycling block strings corresponding to the garbage recycling instruction. Y is a positive integer.

In addition, in the present embodiment, the size of the garbage collection information table generated is a predetermined size for the convenience of data management. The predetermined size is, for example, a size of one physical page or a size of one Codeword (Codeword), to which the present invention is not limited. The garbage collection management circuit unit 215 (or the collection block string recording circuit 2152) respectively adds the data tag DT and the padding data PD1 (also referred to as the first padding data) to the front and back of the local collection block string list to form the garbage collection information table 400.

The data tag DT is attached to the forefront of the garbage collection information table 400, and the data tag DT is used to indicate that the data tag DT and various data located behind the data tag DT are garbage collection information tables having a predetermined size. The size of the space occupied by the data tag DT may be preset. The plurality of data includes a local recovery block string list and first fill data.

The first pad data PD1 is used to make the size of the garbage collection information table 400 a predetermined size. Specifically, the garbage collection management circuit unit 215 (or the collection block string recording circuit 2152) calculates the size of the total space occupied by the data tag DT and the collection block string list in the garbage collection information table 400 after the current update, and subtracts the difference obtained by subtracting the total space size from the predetermined size as the size of the first padding data PD 1. In this way, after the first padding data PD1 is added to the garbage collection information table 400, the total size of the garbage collection information table 400 can be set to the predetermined size. At this time, the operation of generating the garbage collection information table 400 is completed. It should be noted that the size of the space occupied by the data tag DT and each of the recycling block string index values RBI [1] to RBI [ Y ] can be preset.

FIG. 4B is a diagram illustrating writing garbage collection information into a target block string according to an embodiment of the present invention. After generating the garbage collection information table, the garbage collection management circuit unit 215 (or the collection block string recording circuit 2152) instructs the memory interface control circuit 213 to write the generated garbage collection information table to the target block string.

For example, referring to fig. 4B, it is assumed that there are four physical blocks P1 (M) -P4 (M) corresponding to four planes in a blank target block string BS (M), and each physical block has N physical pages Page [1] to Page [ N ]. The garbage collection management circuit unit 215 (or the collection block string recording circuit 2152) instructs the memory interface control circuit 213 to write the generated garbage collection information table 400 to the forefront of the first physical Page [1] of the first physical block P1 (M) of the target block string BS (M).

After writing the garbage collection information table, writing the valid data of the one or more collection block strings to the target block string is started. That is, in step S213, the garbage collection management circuit unit 215 (or the garbage collection execution circuit 2151) instructs the memory interface control circuit 213 to read the valid data of the one or more collection block strings, and instructs the memory interface control circuit 213 to write the valid data to the target block string, wherein the written valid data is immediately after the written garbage collection information table.

That is, following the example of fig. 4B above, after writing the garbage collection information table 400, the valid data in the one or more collection block strings are sequentially written to the target block string BS (M) and arranged after the written garbage collection information table 400. For example, the valid data is written to the first physical Page [1] of the physical block P1 (M) and arranged in the garbage collection information table 400, then written to the other physical pages [2] to [ N ] of the physical block P1 (M), and then written to the physical block P2 (M), the physical block P3 (M) and the physical block P4 (M).

After writing the valid data in all the one or more reclaimed block strings, then, in step S214, the garbage collection management circuit unit 215 (or the garbage collection execution circuit 2151) determines whether the target block string has a remaining space.

In response to the target block string having a remaining space, the process proceeds to step S215, where the garbage collection management circuit unit 215 (or the garbage collection execution circuit 2151) instructs the memory interface control circuit 213 to write the second filling data to the remaining space.

For example, continuing with the example of FIG. 4B, assume that after all valid data has been written, the last physical Page [ N ] of physical block P4 (M) has room for writing data (the target block string has room left). At this time, the garbage collection management circuit unit 215 (or the garbage collection execution circuit 2151) instructs the memory interface control circuit 213 to write the second pad data PD2 to the last physical Page [ N ] of the physical block P4 (M). Next, continuing to step S216, the garbage collection management circuit unit 215 (or the garbage collection execution circuit 2151) instructs the memory interface control circuit 213 to close the target block string, and the garbage collection management circuit unit 215 (or the garbage collection block string recording circuit 2152) appends the local garbage collection block string list to the global garbage collection block string list in the buffer memory 216 to complete the garbage collection instruction. It should be noted that the mapping relationship between the plurality of logical addresses and the plurality of physical addresses for storing the valid data is updated together.

Specifically, after the second pad data PD2 is written, the target block string does not already have any available space, and all physical blocks P1 (M) -P4 (M) of the target block string are turned off, i.e., set to be unable to be written with any data. Next, the garbage collection management circuit unit 215 (or the recycling block string recording circuit 2152) appends the local recycling block string list corresponding to the one or more recycling block strings to the global recycling block string list in the buffer memory 216, so that the processor 211 can identify all recycling block strings of the current rewritable nonvolatile memory module 220 by using the global recycling block string list in the buffer memory 216.

FIG. 4C is a diagram illustrating a data structure of a global recycling block list according to an embodiment of the present invention. Referring to FIG. 4C, the global recovery block string list 410 is similar in structure to the local recovery block string list of the garbage collection information table 400. That is, the global recycling block string list 410 is used to record recycling block string index values RBI [1] to RBI [ X ] of all recycling block strings. X is a positive integer and is greater than Y. That is, after the local recycling block string list corresponding to the one or more recycling block strings is added to the global recycling block string list 410 in the buffer memory 216, the recycling block string index values RBI [1] to RBI [ X ] recorded in the global recycling block string list 410 include the recycling block string index values RBI [1] to RBI [ Y ] recorded in the local recycling block string list.

After appending the local recycling block string list corresponding to the one or more recycling block strings to the global recycling block string list 410 in the buffer memory 216, the garbage collection management circuit unit 215 (or recycling block string recording circuit 2152) determines that the garbage collection instruction is completed. As described above, at this time, the processor 211 may update the mapping relationship between the plurality of logical addresses and the plurality of physical addresses used to store the valid data accordingly.

Referring back to fig. 2A, after step S214 is performed, in response to the target block string not having the remaining space, the garbage collection management circuit unit 215 (or the collection block string recording circuit 2152) determines that the second padding data does not need to be written, and then step S216 is performed.

It should be understood that the present invention is not limited to the setting method of the bit values of the first and second pad data PD1 and PD 2. For example, the first and second pad data PD1 and PD2 may be generated using a random function. Or the first and second pad data PD1 and PD2 may be generated using the data of the fixed embodiment.

In this embodiment, in addition to updating the global recovery block string list in response to the garbage collection operation performed, it is also possible to determine whether to update the global recovery block string list according to the use of the block strings.

FIG. 2B is a flow chart of a memory management method according to an embodiment of the invention. Referring to fig. 2B, in step S221, the processor 211 uses the target block string. Specifically, when the processor 211 is to perform a write operation or a data merge operation to write a piece of data, the processor 211 selects one or more available block strings (also called "target block strings") from among the available block strings (availableblockstrings) in the rewritable nonvolatile memory module 220 to write the piece of data. The target block string selected to write data may also be considered a target block string that is used. The usable block strings include a reclaimed block string (recudbockstrip), a free block string (freeblockstrip), or a blank block string (empty blcokstrip) that has completed the garbage reclamation operation. In this embodiment, the processor 211 records the time stamp (also called a block string time stamp) corresponding to the target block string to the system physical block according to the time point at which the target block string is selected for use. Alternatively, in another embodiment, the target block string itself may have a spare area (spare) for storing Metadata (Metadata) corresponding to the target block string, and the Metadata may record the block string time stamp of the target block string.

Next, in step S222, the garbage collection management circuit unit 215 (or the collection block string recording circuit 2152) compares the target block string index value of the target block string with the plurality of collection block string index values recorded in the global collection block string list. Specifically, the garbage collection management circuit unit 215 (or the collection block string recording circuit 2152) identifies the block string index value (also referred to as the target block string index value) of the target block string to be used, and compares all the collection block string index values in the global collection block string list according to the target block string index value to find whether there is a collection block string index value that matches/equals the target block string index value.

Next, in step S223, in response to the target block string index value matching a target recycling block string index value of the plurality of recycling block string index values, the garbage collection management circuit unit 215 (or the recycling block string recording circuit 2152) deletes the target recycling block string index value from the plurality of recycling block string index values recorded in the global recycling block string list. Thus, the updating operation of the global recovery block string list performed by the use of the target block string is completed. When the target recycling block string index value of the global recycling block string list is deleted, all recycling block string index values arranged behind the deleted target recycling block string index value are arranged forward. For example, when the target recycling block string index value RBI [1] is deleted, recycling block string index values RBI [2] to RBI [ X ] following the target recycling block string index value RBI [1] are appended forward, i.e., the global recycling block string list is arranged from the recycling block string index value RBI [2] to the recycling block string index value RBI [ X ]. It should be noted that the size of the space occupied by each recycling bin string index value may be preset.

It should be noted that after the update operation of this embodiment is completed, the snapshot operation is not performed on the global reclamation block string list currently maintained in the buffer memory 216, i.e., the global reclamation block string list of the buffer memory 216 is not written to the rewritable nonvolatile memory module 220.

Since the global reclamation block string list is stored only in the buffer memory 216. Thus, if the memory device suddenly fails (also known as a sudden power-down event), the global reclamation block list and other data stored in the buffer 216 are lost. Accordingly, garbage collection management circuit unit 215 may perform a recovery operation in response to the sudden power-down event to attempt to recover the global collection block string list in buffer memory 216 prior to the sudden power-down.

Fig. 5 is a flowchart illustrating a recovery operation according to an embodiment of the present invention. Referring to fig. 5, in step S51, the garbage collection management circuit unit 215 (or the collection block string recording circuit 2152) identifies a plurality of closed target block strings among all target block strings of the rewritable nonvolatile memory module. Specifically, the garbage collection management circuit unit 215 (or the collection block string recording circuit 2152) can identify a plurality of target block strings from all the block strings of the rewritable nonvolatile memory 220 using the data tag DT. That is, the block string having the garbage collection information table stored in front is identified as the target block string. In addition, the target block string that has been closed may be regarded as completing the garbage collection operation, corresponding to step S216 described above.

Conversely, when the target block string for performing the garbage collection operation is not closed, the processor 211 or the garbage collection management circuit 215 determines that the garbage collection of the target block string (also referred to as the non-closed target block string) is not completed, i.e. the valid data in one or more of the recovery block strings corresponding to the non-closed target block string is not all collected/copied into the non-closed target block string. Accordingly, the global reclamation block string list should not have one or more reclamation block strings of the non-shutdown target block strings, i.e., the garbage collection management circuit unit 215 disregards the garbage collection information table of the non-shutdown target block strings during the reclamation operation of the global reclamation block string list. It should be noted that in one embodiment, in response to an identified non-closed target block string, the processor 211 or garbage collection management circuitry 215 may re-perform garbage collection operations for one or more of the collection block strings corresponding to the target block string.

After identifying the plurality of closed target block strings, the process proceeds to step S52, where the garbage collection management circuit unit 215 (or the collection block string recording circuit 2152) determines whether the plurality of closed target block strings have all been selected. Specifically, the garbage collection management circuit unit 215 (or the collection block string recording circuit 2152) starts to select the closed target block strings which have not been selected from the closed target block strings one by one to perform the recovery operation until all the closed target block strings are selected to perform the recovery operation. If there are any closed target block strings that have not been selected, the garbage collection management circuit unit 215 (or the collection block string recording circuit 2152) selects a first target block string from the one or more closed target block strings that have not been selected, following to step S53.

Next, in step S54, the garbage collection management circuit unit 215 (or the collection block string recording circuit 2152) identifies a target block string time stamp of the first target block string, identifies a plurality of collection block strings corresponding to the first target block string from the garbage collection information table of the first target block string, and identifies the collection block string time stamps of the plurality of collection block strings. Specifically, after selecting the first target block string, the garbage collection management circuit unit 215 (or the collection block string recording circuit 2152) identifies the target block string time stamp of the first target block string (e.g. by reading the metadata corresponding to the target block string in the system physical block) according to the block string index value of the first target block string, and reads the garbage collection information table of the first target block string. From the read garbage collection information table, the garbage collection management circuit unit 215 (or the collection block string recording circuit 2152) can identify the collection block string index values of the plurality of collection block strings corresponding to the first target block string, and identify the collection block string time stamp of the plurality of collection block strings according to the plurality of collection block string index values (e.g., via reading metadata corresponding to the plurality of collection block strings in the system physical block).

Next, in step S55, the garbage collection management circuit unit 215 (or the collection block string recording circuit 2152) compares the target block string time stamp with the identified plurality of collection block string time stamps. Next, different treatments are performed according to different comparison results, which will be described in detail below.

In response to the identified first recycling bin string time stamp being smaller than the target bin string time stamp, continuing to step S56, the garbage collection management circuit unit 215 (or the recycling bin string recording circuit 2152) appends the first recycling bin string index value of the first recycling bin string corresponding to the first recycling bin string time stamp to the global recycling bin string list stored in the buffer memory.

On the other hand, in response to the identified second recycling block string time stamp being greater than the target block string time stamp, continuing to step S57, the garbage collection management circuit unit 215 (or the recycling block string recording circuit 2152) does not append the second recycling block string index value of the second recycling block string corresponding to the second recycling block string time stamp to the global recycling block string list stored in the buffer memory. That is, the garbage collection management circuit unit 215 (or the collection block string recording circuit 2152) considers that the second collection block string has been used after the corresponding garbage collection operation is completed, and further causes the second collection block string time stamp of the second collection block string to be larger than the target block string time stamp.

In addition, in response to the identified third recycling block string time stamp of the third recycling block string being a NULL value (NULL) (e.g., the third recycling block string time stamp of the third recycling block string corresponding to the third recycling block string index value does not exist), the garbage collection management circuit unit 215 (or the recycling block string recording circuit 2152) does not attach the third recycling block string index value of the third recycling block string to the global recycling block string list stored in the buffer memory, continuing to step S58.

In this embodiment, in the case that the third block string time stamp of the third recovery block string corresponding to the third recovery block string index value does not exist or is a NULL value (NULL), the garbage collection management circuit unit 215 (or the recovery block string recording circuit 2152) may determine that the third recovery block string has been subjected to the erasing operation, thereby causing the block string time stamp of the third recovery block string to be deleted. Next, in an embodiment, step S58 is followed by step S60, and the garbage collection management circuit unit 215 (or the collection block string recording circuit 2152) may notify the processor 211 to add the third collection block string index value to the free block string list. The free block string list is maintained in the buffer memory 216, and the erase operation is completed for a plurality of block strings corresponding to the plurality of block string index values recorded in the free block string list.

After all the block string time stamps are compared with the information table time stamp and the subsequent operations (e.g., steps S56, S57, S58) corresponding to the comparison result are completed, the garbage collection management circuit unit 215 (or the collection block string recording circuit 2152) completes the collection operation corresponding to the selected first target block string. Then, the flow returns to step S52, i.e. the garbage collection management circuit 215 (or the collection block string recording circuit 2152) selects another new closed target block string that has not been selected to perform the recovery operation.

If in step S52, the garbage collection management circuit unit 215 (or the recycling block string recording circuit 2152) determines that all of the plurality of closed target block strings have been selected, then the process goes to step S59, and the garbage collection management circuit unit 215 (or the recycling block string recording circuit 2152) determines that the global recycling block string list recovery operation is completed.

It should be noted that, in the above embodiment, since the garbage collection operation is performed for one or more collection block strings, the garbage collection information table records information corresponding to the one or more collection block strings. However, the present invention is not limited thereto, and for example, in another embodiment, the garbage collection operation is performed for one or more physical blocks, so that the garbage collection information table records information corresponding to the one or more physical blocks. In addition, the garbage collection information table is written to the forefront of the target physical blocks corresponding to one or more collection physical blocks.

In summary, according to the memory management method and the memory controller provided by the embodiments of the present invention, when a garbage collection operation is started, a garbage collection information table is generated according to a collection block string in which the garbage collection operation is performed, the garbage collection information table is written into a target block string corresponding to the garbage collection operation, and then valid data of the collection block string is copied into the target block string having the garbage collection information table, so as to complete the garbage collection operation. In addition, the garbage collection information table in each target block string can also be used to reconstruct the global collection block string list to help manage the usage of the entire block string of the storage device. Therefore, the data stored in the storage device can still be reliable under the condition of reducing access delay caused by garbage collection operation, and the working efficiency of the storage device is further improved.

Although the invention has been described with reference to the above embodiments, it should be understood that the invention is not limited thereto, but rather may be modified or altered somewhat by persons skilled in the art without departing from the spirit and scope of the invention.

Claims

1. A memory management method adapted for a storage device configured with a rewritable nonvolatile memory module, wherein the rewritable nonvolatile memory module has a plurality of physical blocks, and the plurality of physical blocks are grouped into a plurality of block strings, the method comprising:

executing a garbage collection instruction, wherein the garbage collection instruction indicates that valid data of one or more collection block strings is collected to a target block string;

generating a garbage collection information table with a preset size according to the one or more collection block strings, and writing the garbage collection information table into the target block string, wherein the garbage collection information table comprises a data tag, a local collection block string list and first filling data;

reading valid data of the one or more reclaimed block strings and writing the valid data to the target block string, wherein the written valid data is immediately behind the written garbage collection information table; and

closing the target block string and appending the local reclamation block string list to a global reclamation block string list in a buffer memory to complete the garbage reclamation instruction,

Wherein the data tag is at the forefront of the garbage collection information table, and the data tag is used for indicating that the data tag and various data positioned behind the data tag are the garbage collection information table with the preset size,

wherein the plurality of data after the data tag is the local recycle block string list and the first fill data in sequence,

wherein the local recovery block string list is used for recording recovery block string index values of the one or more recovery block strings,

wherein the first padding data is used to make the size of the garbage collection information table the predetermined size.

2. The memory management method according to claim 1, wherein after the step of writing the valid data to the target block string, the memory management method further comprises:

and in response to determining that the target block string has a remaining space, writing the remaining space to second filling data.

3. The memory management method of claim 1, further comprising:

using a target block string;

comparing the target block string index value of the target block string with a plurality of recovery block string index values recorded in the global recovery block string list; and

And deleting the target recycling block string index value from the recycling block string index values recorded in the global recycling block string list in response to the target block string index value matching the target recycling block string index value in the recycling block string index values.

4. The memory management method of claim 1, further comprising:

performing a recovery operation corresponding to the global recovery block string list,

wherein the recovery operation comprises:

identifying a plurality of closed target block strings of all target block strings of the rewritable non-volatile memory module;

determining whether the plurality of closed target block strings have been selected, wherein in response to determining that the plurality of closed target block strings have been selected, determining that the recovery operation of the global recovery block string list is complete,

wherein in response to determining that none of the plurality of closed target block strings has been selected, selecting a first target block string from one or more closed target block strings that have not been selected;

identifying a target block string time stamp of the first target block string, identifying a plurality of recovery block strings corresponding to the first target block string according to a garbage collection information table of the first target block string, and identifying recovery block string time stamps of the plurality of recovery block strings;

Comparing the target block string time stamp with the identified plurality of recovery block string time stamps,

wherein in response to the identified first recovery block string time stamp being less than the target block string time stamp, adding a first recovery block string index value of a first recovery block string corresponding to the first recovery block string time stamp to the global recovery block string list stored in the buffer memory,

wherein in response to the identified second recovery block string time stamp being greater than the target block string time stamp, a second recovery block string index value of a second recovery block string corresponding to the second recovery block string time stamp is not appended to the global recovery block string list stored in the buffer memory,

wherein a third recycle block string index value of a third recycle block string of the plurality of recycle block strings is not appended to the global recycle block string list stored in the buffer memory in response to the identified third block string time stamp of the third recycle block string being a null value.

5. A memory controller for controlling a memory device configured with a rewritable non-volatile memory module, the memory controller comprising:

The connection interface circuit is used for being coupled to the host system;

a memory interface control circuit coupled to the rewritable nonvolatile memory module, wherein the rewritable nonvolatile memory module has a plurality of physical blocks, and the plurality of physical blocks are grouped into a plurality of block strings;

a garbage collection management circuit unit; and

a processor coupled to the connection interface circuit, the memory interface control circuit, and the garbage collection management circuit unit,

wherein the garbage collection management circuit unit is configured to execute garbage collection instructions received from the processor, wherein the garbage collection instructions instruct collection of valid data of one or more collection block strings to a target block string,

wherein the garbage collection management circuit unit is further configured to generate a garbage collection information table having a predetermined size according to the one or more collection block strings, and instruct the memory interface control circuit to write the garbage collection information table to the target block string, wherein the garbage collection information table includes a data tag, a local collection block string list, and first padding data,

wherein the garbage collection management circuit unit is further configured to instruct the memory interface control circuit to read valid data of the one or more garbage collection block strings, and instruct the memory interface control circuit to write the valid data to the target block string, wherein the written valid data is immediately after the written garbage collection information table,

Wherein the garbage collection management circuit unit is further configured to instruct the memory interface control circuit to close the target block string, and the garbage collection management circuit unit is further configured to append the local collection block string list to a global collection block string list in a buffer memory to complete the garbage collection instruction,

6. The memory controller of claim 5, wherein after the operation of writing the valid data to the target block string,

in response to determining that the target block string has a remaining space, the garbage collection management circuit unit instructs the memory interface control circuit to write the remaining space with second fill data.

7. The memory controller of claim 5, wherein

The processor uses a target string of blocks,

wherein the garbage collection management circuit unit compares the target block string index value of the target block string with a plurality of collection block string index values recorded in the global collection block string list,

in response to the target block string index value matching a target recycling block string index value of the plurality of recycling block string index values, the garbage collection management circuit unit deletes the target recycling block string index value from the plurality of recycling block string index values recorded in the global recycling block string list.

8. The memory controller of claim 5, wherein

The processor further instructs the garbage collection management circuit unit to perform a recovery operation corresponding to the global recovery block string list,

wherein the recovery operation comprises:

the garbage collection management circuit unit identifies a plurality of closed target block strings among all target block strings of the rewritable nonvolatile memory module,

wherein the garbage collection management circuit unit determines whether the plurality of closed target block strings have all been selected, wherein in response to determining that the plurality of closed target block strings have all been selected, the garbage collection management circuit unit determines that the recovery operation of the global recovery block string list is completed,

Wherein in response to determining that none of the plurality of closed target block strings has been selected, the garbage collection management circuit unit selects a first target block string from one or more closed target block strings that have not been selected,

wherein the garbage collection management circuit unit identifies a target block string time stamp of the first target block string, identifies a plurality of recovery block strings corresponding to the first target block string according to a garbage collection information table of the first target block string, and identifies recovery block string time stamps of the plurality of recovery block strings,

wherein the garbage collection management circuit unit compares the target block string time stamp with the identified plurality of collection block string time stamps,

wherein in response to the identified first recycling bin string time stamp being less than the target bin string time stamp, the garbage collection management circuit unit appends a first recycling bin string index value of a first recycling bin string corresponding to the first recycling bin string time stamp to the global recycling bin string list stored in the buffer memory,

wherein in response to the identified second recycling bin string time stamp being greater than the target bin string time stamp, the garbage collection management circuit unit does not append a second recycling bin string index value of a second recycling bin string corresponding to the second recycling bin string time stamp to the global recycling bin string list stored in the buffer memory,

Wherein the garbage collection management circuit unit does not append a third recycling block string index value of a third recycling block string to the global recycling block string list stored in the buffer memory in response to the identified third block string time stamp of the third recycling block string being a null value.