CN110798150A - Chaotic oscillator based on multiple memristors - Google Patents
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- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
- H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
- H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
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Abstract
The invention provides a chaotic oscillator based on a plurality of memristors, which comprises: operational amplifier U1Capacitor C1、C2、C3Two positive and negative diodes D1、D2Resistance R, inductance L1And two charge-controlled memristors M1(q1)、M2(q2) One end of each magnetic control memristor W (ξ) is connected with the positive phase input end of the operational amplifier, one end of each magnetic control memristor W (ξ) is connected with the negative phase input end of the operational amplifier, and one end of each of the two charge control memristors is connected with the negative phase input end of the operational amplifier, and the capacitor C1The positive terminal of the capacitor is connected with the positive input terminal of the operational amplifier and the capacitor C2The positive terminal of the capacitor C is connected with the capacitor C1Positive terminal of (1), capacitor C3And an inductance L1Are connected in parallel and are simultaneously connected with two positive and negative diodes D1、D2And the other end is grounded. The invention solves the problems that the memristor circuit model in the prior art is too simple in structure, relatively few circuit elements are involved in the circuit, and more single memristor oscillators are used as the ideal commercial memristor circuit modelThe type requirement has certain deviation, and the design structure is relatively unreasonable.
Description
Technical Field
The invention relates to the technical field of circuit design, communication and information, in particular to a chaotic oscillator based on multiple memristors.
Background
The chaotic system is a nonlinear system capable of generating similar random signals, has the characteristics of good pseudo-randomness, strong initial value sensitivity, long-term unpredictability and the like, and has great application value in the fields of secret communication, image encryption and the like. Chaotic signals frequently used in the application of the actual engineering field are generally divided into analog chaotic signals and digital chaotic signals. Because the simulation step length is limited in precision, the digital chaotic signal can cause chaotic degradation phenomenon under long-time operation, so that the experimental result can not reach the ideal expectation. The chaotic signal generated by the analog circuit is continuous, so that the phenomenon can be effectively avoided.
The memristor is a nonlinear resistor with super-strong memory characteristics, can control the change of voltage and current by changing the resistance value, and the change can be kept all the time even when the power is off, and the advantages are not possessed by the common resistor. If it is applied to the design of a computer chip, the operating speed of the computer may be increased by several times. Therefore, the commercial implementation of memristors has been one of the hot issues of recent research. In the design of a future memristor circuit system, the optimal result which can be achieved is that the memristor can completely replace a constant-value resistor, so that the research on the circuit model with the multiple memristors is of great significance to the physical realization of the commercial memristors. The dynamics of the memristor are researched so as to better understand the characteristics of the memristor and finally achieve the purpose of completely replacing the resistance with the memristor. The existing memristor circuit model is too simple in structure, circuit elements involved in the circuit are relatively few, and a single memristor oscillator is more. The model has certain deviation from the requirement of an ideal commercial memristor circuit model, and the design structure is relatively unreasonable, so that the model is not enough to be used as the basic demonstration teaching of the commercial memristor research.
Disclosure of Invention
In accordance with the technical problem set forth above, a chaotic oscillator based on multiple memristors is provided. According to the invention, a plurality of memristors are applied to the nonlinear chaotic circuit to form the memristive chaotic circuit, under the condition, various performances of the memristors can be best played, and meanwhile, the chaotic oscillator has a complete RLC resonance structure and a plurality of mixed memristors.
The technical means adopted by the invention are as follows:
a chaotic oscillator based on multiple memristors, comprising: operational amplifier U1Capacitor C1Capacitor C2Capacitor C3Two positive and negative diodes D1、D2Resistance R, inductance L1And two charge-controlled memristors M1(q1)、M2(q2) One end of the magnetic control memristor W (ξ) is connected with the positive phase input end of the operational amplifier, and the two charge control memristors M1(q1)、M2(q2) One end of the capacitor C is connected with the inverting input end of the operational amplifier1The positive terminal of the capacitor is connected with the positive input terminal of the operational amplifier and the capacitor C2The positive terminal of the capacitor C is connected with the capacitor C1Positive terminal of (1), capacitor C3And an inductance L1Are connected in parallel and are simultaneously connected with two positive and negative diodes D1、D2And the other end is grounded.
Further, the charge control memristor is an analog equivalent circuit of the charge control memristor, and the magnetic control memristor is an analog equivalent circuit of the magnetic control memristor.
Further, the chaotic oscillator is described by the following equation:
wherein u is1、u2、u3、i1Respectively represent capacitances C1Capacitor C2Capacitor C3Inductor L1Corresponding state variables ξ, q1、q2Respectively represents a magnetic control memristor W (ξ) and a charge control memristor M1(q1)、M2(q2) A corresponding state variable; i.e. idIs a piecewise linear function and can be expressed as:
id＝gd[u1-u3+0.5(|u1-u3-Uth|-|u1-u3+Uth|)]
wherein, gdRepresenting a negative conductance value, UthRepresenting the diode threshold voltage.
Further, the charge-controlled memristor M1(q1)、M2(q2) And the magnetically controlled memristor W (ξ) is described by the following equation:
wherein, aξ1、bξ1Respectively representing parameters of the magnetic control memristor; a isq1、bq11、aq2、bq22Respectively representing the parameters of the charge-controlled memristor.
Compared with the prior art, the invention has the following advantages:
1. the chaotic oscillator based on the memristors is simple in circuit implementation, the oscillator has a wider chaotic parameter interval by adjusting parameters of all elements, and generated signals are strong in pseudo-randomness, so that output chaotic signals can have higher complexity and higher stability, and different application requirements can be met.
2. The chaotic oscillator based on the multiple memristors provided by the invention utilizes the operational amplifier as an active device and a nonlinear element at the same time, the model is closer to an ideal commercial memristive oscillation circuit model, the realization of a simple memristive oscillator model is beneficial to demonstration and teaching of the chaotic phenomenon, the research on the basic chaotic phenomenon can be better applied in the engineering field, and the chaotic oscillator has important value.
For the above reasons, the present invention can be widely applied to the fields of circuit design, communication, information, etc.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a schematic circuit diagram of a chaotic oscillator according to the present invention.
FIG. 2 is a magnetic control memristor equivalent circuit diagram of the chaotic oscillator.
FIG. 3 is a charge-controlled memristor equivalent circuit diagram of the chaotic oscillator.
Fig. 4 is a chaotic attractor phase diagram of a chaotic oscillator with state variables in an x-z phase plane according to an embodiment of the present invention.
Fig. 5 is a schematic diagram of a simulation result of a circuit according to an embodiment of the present invention.
Detailed Description
It should be noted that the embodiments and features of the embodiments may be combined with each other without conflict. The present invention will be described in detail below with reference to the embodiments with reference to the attached drawings.
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It is noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of exemplary embodiments according to the invention. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, and it should be understood that when the terms "comprises" and/or "comprising" are used in this specification, they specify the presence of stated features, steps, operations, devices, components, and/or combinations thereof, unless the context clearly indicates otherwise.
The relative arrangement of the components and steps, the numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present invention unless specifically stated otherwise. Meanwhile, it should be understood that the sizes of the respective portions shown in the drawings are not drawn in an actual proportional relationship for the convenience of description. Techniques, methods, and apparatus known to those of ordinary skill in the relevant art may not be discussed in detail but are intended to be part of the specification where appropriate. Any specific values in all examples shown and discussed herein are to be construed as exemplary only and not as limiting. Thus, other examples of the exemplary embodiments may have different values. It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, further discussion thereof is not required in subsequent figures.
In the description of the present invention, it is to be understood that the orientation or positional relationship indicated by the directional terms such as "front, rear, upper, lower, left, right", "lateral, vertical, horizontal" and "top, bottom", etc., are generally based on the orientation or positional relationship shown in the drawings, and are used for convenience of description and simplicity of description only, and in the absence of any contrary indication, these directional terms are not intended to indicate and imply that the device or element so referred to must have a particular orientation or be constructed and operated in a particular orientation, and therefore should not be considered as limiting the scope of the present invention: the terms "inner and outer" refer to the inner and outer relative to the profile of the respective component itself.
Spatially relative terms, such as "above … …," "above … …," "above … …," "above," and the like, may be used herein for ease of description to describe one device or feature's spatial relationship to another device or feature as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if a device in the figures is turned over, devices described as "above" or "on" other devices or configurations would then be oriented "below" or "under" the other devices or configurations. Thus, the exemplary term "above … …" can include both an orientation of "above … …" and "below … …". The device may be otherwise variously oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.
It should be noted that the terms "first", "second", and the like are used to define the components, and are only used for convenience of distinguishing the corresponding components, and the terms have no special meanings unless otherwise stated, and therefore, the scope of the present invention should not be construed as being limited.
Examples
As shown in fig. 1, the present invention provides a chaotic oscillator based on multiple memristors, comprising: operational amplifier U1Capacitor C1Capacitor C2Capacitor C3Two positive and negative diodes D1、D2Resistance R, inductance L1And two charge-controlled memristors M1(q1)、M2(q2) One end of the magnetic control memristor W (ξ) is connected with the positive phase input end of the operational amplifier, and the two charge control memristors M1(q1)、M2(q2) One end of the capacitor C is connected with the inverting input end of the operational amplifier1The positive terminal of the capacitor is connected with the positive input terminal of the operational amplifier and the capacitor C2The positive terminal of the capacitor C is connected with the capacitor C1Positive terminal of (1), capacitor C3And an inductance L1Are connected in parallel and are simultaneously connected with two positive and negative diodes D1、D2And the other end is grounded.
Further, as a preferred embodiment of the present invention, the charge control memristor is an analog equivalent circuit of the charge control memristor, and the magnetic control memristor is an analog equivalent circuit of the magnetic control memristor. The operational amplifier is a conventional voltage mode operational amplifier, such as model OP 07. The diode is a conventional diode, for example model 1N 4148.
In conjunction with fig. 1, the chaotic oscillator based on multiple memristors provided by the present invention is described by the following equation:
wherein u is1、u2、u3、i1Respectively represent capacitances C1Capacitor C2Capacitor C3Inductor L1Corresponding state variables ξ, q1、q2Respectively represents a magnetic control memristor W (ξ) and a charge control memristor M1(q1)、M2(q2) A corresponding state variable; i.e. idIs a piecewise linear function and can be expressed as:
id＝gd[u1-u3+0.5(|u1-u3-Uth|-|u1-u3+Uth|)]
wherein, gdRepresenting a negative conductance value, UthRepresenting the diode threshold voltage.
The charge control memristor M1(q1)、M2(q2) And the magnetically controlled memristor W (ξ) is described by the following equation:
wherein, aξ1、bξ1Respectively representing parameters of the magnetic control memristor; a isq1、bq11、aq2、bq22Respectively representing the parameters of the charge-controlled memristor.
In this embodiment, the operational amplifier U in the circuit shown in FIG. 11When a +/-12V dual power supply is adopted for power supply, the operational amplifier saturation output voltage is approximately equal to 10V. Selecting circuit parameters of R-5.6 k omega, C1＝C2＝C3＝33nF，L110 mH. The magnetic control memristor equivalent circuit model and the charge control memristor equivalent circuit model shown in fig. 2 and 3 are utilized to carry out experimental demonstration, and all parameters are set as follows:
the parameter of the magnetic control memristor equivalent circuit is set to Rw1＝2kΩ,Rw2＝Rw3＝15kΩ,Cw＝33nF；
Charge-control memristor M1(q1) The parameter of the equivalent circuit is set to Rq1＝1kΩ,Rq2＝10Ω,,Cq1＝33nF；
Charge-control memristor M2(q2) The parameter of the equivalent circuit is set to Rq3＝15kΩ,Rq4＝100Ω,Cq2＝33nF；
As shown in fig. 4, is a numerical simulation of a chaotic attractor phase diagram with state variables of the system in the x-z phase plane. Accordingly, as shown in fig. 5, the results of the circuit experiment show that the results of the numerical simulation and the results of the circuit experiment are substantially the same.
In conclusion, the chaotic oscillator based on the memristors is simple in circuit implementation, the oscillator has a wider chaotic parameter interval by adjusting parameters of all elements, the generated signal is strong in pseudo-randomness, the output chaotic signal can have higher complexity and higher stability, and different application requirements can be met.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.
Claims (4)
1. A chaotic oscillator based on multiple memristors, comprising: operational amplifier U1Capacitor C1Capacitor C2Capacitor C3Two positive and negative diodes D1、D2Resistance R, inductance L1And two charge-controlled memristors M1(q1)、M2(q2) One end of the magnetic control memristor W (ξ) is connected with the positive phase input end of the operational amplifier, and the two charge control memristors M1(q1)、M2(q2) One end of the capacitor C is connected with the inverting input end of the operational amplifier1The positive terminal of the capacitor is connected with the positive input terminal of the operational amplifier and the capacitor C2The positive terminal of the capacitor C is connected with the capacitor C1Positive terminal of (1), capacitor C3And an inductance L1Are connected in parallel and are simultaneously connected with two positive and negative diodes D1、D2And the other end is grounded.
2. The chaotic oscillator based on multiple memristors according to claim 1, wherein the charge control memristor is an analog equivalent circuit of the charge control memristor, and the magnetic control memristor is an analog equivalent circuit of the magnetic control memristor.
3. The chaotic oscillator based on multiple memristors according to claim 1, characterized in that the chaotic oscillator is described by the following equation:
wherein u is1、u2、u3、i1Respectively represent capacitances C1Capacitor C2Capacitor C3Inductor L1Corresponding state variables ξ, q1、q2Respectively represents a magnetic control memristor W (ξ) and a charge control memristor M1(q1)、M2(q2) A corresponding state variable; i.e. idIs a piecewise linear function and can be expressed as:
id＝gd[u1-u3+0.5(|u1-u3-Uth|-|u1-u3+Uth|)]
wherein, gdRepresenting a negative conductance value, UthRepresenting the diode threshold voltage.
4. The chaotic oscillator based on multiple memristors according to claim 3, wherein the charge-controlled memristor M1(q1)、M2(q2) And the magnetically controlled memristor W (ξ) is described by the following equation:
wherein, aξ1、bξ1Respectively representing parameters of the magnetic control memristor; a isq1、bq11、aq2、bq22Respectively representing the parameters of the charge-controlled memristor.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112600660A (en) * | 2020-12-03 | 2021-04-02 | 贵州大学 | Double-memristor signal generator capable of generating stacked attractors |
| CN117540676A (en) * | 2024-01-09 | 2024-02-09 | 山东科技大学 | Equivalent simulation circuit of spike neuron model based on active memristor |
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| CN104410485A (en) * | 2014-11-13 | 2015-03-11 | 常州大学 | A wien-brigde chaotic oscillator based on a firs-order generalized memory resistor |
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| EP2528216A1 (en) * | 2011-05-24 | 2012-11-28 | Osram AG | Self-oscillating buck converter |
| CN104410485A (en) * | 2014-11-13 | 2015-03-11 | 常州大学 | A wien-brigde chaotic oscillator based on a firs-order generalized memory resistor |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112600660A (en) * | 2020-12-03 | 2021-04-02 | 贵州大学 | Double-memristor signal generator capable of generating stacked attractors |
| CN112600660B (en) * | 2020-12-03 | 2023-01-06 | 贵州大学 | Double-memristor signal generator capable of generating stacked attractors |
| CN117540676A (en) * | 2024-01-09 | 2024-02-09 | 山东科技大学 | Equivalent simulation circuit of spike neuron model based on active memristor |
| CN117540676B (en) * | 2024-01-09 | 2024-04-16 | 山东科技大学 | Equivalent simulation circuit of spike neuron model based on active memristor |
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