CN110779942A

CN110779942A - Accumulation recovery digital multi-channel pulse amplitude analyzer suitable for X fluorescence multi-element analyzer

Info

Publication number: CN110779942A
Application number: CN201810856767.2A
Authority: CN
Inventors: 于海明; 张伟
Original assignee: Dandong Oriental Measurement And Control Technology Co Ltd
Current assignee: Dandong Oriental Measurement And Control Technology Co Ltd; Dandong Dongfang Measurement and Control Technology Co Ltd
Priority date: 2018-07-31
Filing date: 2018-07-31
Publication date: 2020-02-11
Anticipated expiration: 2038-07-31
Also published as: CN110779942B

Abstract

The hardware mainly comprises a high-speed ADC circuit, an FPGA circuit and a DSP circuit. The FPGA controls the high-speed ADC to sample signals of the detector, pulse forming is carried out on the sampled digital signals in the FPGA to form a fast channel and a slow channel respectively, the fast channel is narrow pulses and used for extracting time information of the signals of the detector, and the slow channel is wide pulses and used for extracting amplitude information of the signals of the detector. The method comprises the steps of conducting accumulation judgment on formed pulses in the FPGA, judging the amplitude of non-accumulated pulses in the FPGA, forming energy spectrum data, storing the energy spectrum data in the FPGA, sending time information and pulse number data to the DSP for the accumulated pulses in the FPGA, conducting accumulation recovery operation on the accumulated pulses in the DSP to form energy spectrums of the accumulated pulses, and finally adding the energy spectrums in the FPGA and the DSP together to form the energy spectrums of the pulse accumulation recovery. The invention can improve the energy spectrum counting rate and the energy resolution ratio simultaneously during X fluorescence analysis.

Description

Accumulation recovery digital multi-channel pulse amplitude analyzer suitable for X fluorescence multi-element analyzer

Technical Field

The invention relates to a random pulse multi-channel amplitude analyzer for pulse accumulation recovery, in particular to a multi-channel pulse amplitude analyzer for signal energy spectrum acquisition of an X-ray detector.

Background

In the production process of metallurgy, nonferrous metals, mines, building materials and other fields in China, the proportion of each element in the raw materials plays a key role in the quality of products. At present, an in-flow X fluorescence multi-element analysis instrument based on a patent technology 'in-flow detection multi-element analysis device and method' (patent number: 200710010105.5) well realizes real-time detection of the content of each component element of a material flow, gets rid of a trivial procedure of carrying out chemical analysis after manual sampling, and greatly improves the production efficiency.

The circuit for obtaining the X-ray energy spectrum in the instrument mainly adopts an analog multichannel pulse amplitude analyzer, an amplifying and forming circuit is needed between the analog multichannel pulse amplitude analyzer and the detector, and the circuit structure is complex. The amplitude and time of a pulse signal output by an X-ray detector are random, the formed pulse has a certain width, so that partial pulses can be accumulated together, a pulse accumulation judging circuit is arranged in an amplifying and forming circuit, the amplifying and forming circuit shields the signal when the pulses are accumulated, the accumulated signal is forbidden to be output to an analog multichannel pulse amplitude analyzer, the method can effectively remove the influence of the accumulated pulses on the energy spectrum quality, but the output counting rate loss is large.

In the industrial field, the low-grade material flow needs to be measured, and in order to improve the measurement precision and meet the application requirements, the dosage of a radioactive source needs to be increased to improve the counting rate of each element energy spectrum in the material flow. The increase of the radiation source dose due to the influence of pulse accumulation can lead to the increase of dead time, the increase of the energy spectrum counting rate is limited, and the increase of the radiation source dose is not beneficial to the management of the radiation source and the protection of radioactivity safety.

Disclosure of Invention

The invention provides an accumulation recovery digital multichannel pulse amplitude analyzer suitable for an X fluorescence multi-element analyzer, and aims to solve the technical defects.

The specific technical scheme for solving the problems is as follows:

the invention adopts a digital multi-channel pulse amplitude analysis technology, mainly finishes energy spectrum acquisition on a single-board circuit by a digital signal processing technology and a mathematical algorithm, a hardware circuit mainly comprises a high-speed ADC, an FPGA circuit and a dual-core DSP circuit, the high-speed ADC, the FPGA circuit and the dual-core DSP circuit are sequentially connected, and the sampling frequency of the ADC is 80 MHz. The X-ray detector signal is acquired by a high-speed ADC after passing through a differentiation and adaptation circuit, the digitized detector signal is subjected to filtering, fast and slow channel forming, baseline restoration and accumulation judgment in an FPGA, and the pulse signal without accumulation is subjected to amplitude analysis in the FPGA to form energy spectrum data. The dual-core DSP comprises a DSP core and an ARM core, wherein the DSP core is used for calculation, and the ARM core is used for communication, parameter configuration and system control.

The fast channel adopts triangular forming, the detector signal is formed into a triangular pulse signal with 5 sampling points, and the triangular pulse of the fast channel is used for extracting the time information of the detector signal. Assuming that the detector signal time information is Nt, i.e. Nt represents the generation time of the pulse, typically Nt =0, Nt =1 is assigned when the maximum value of the triangular pulse is determined, and Nt =0 is assigned after one sampling period. The slow channel is formed in a trapezoidal mode, the width of the trapezoid can be adjusted, and the trapezoid in the slow channel is used for pulse amplitude analysis.

The accumulated pulse and the time information are stored together in the FPGA, the FPGA sends the accumulated pulse information data to the DSP at the same time, the amplitude of the accumulated pulse is analyzed in the DSP by using an accumulation recovery algorithm, so that the energy spectrum data after the accumulated pulse is recovered is obtained, and the energy spectrum in the FPGA and the energy spectrum in the DSP are added according to the corresponding addresses to obtain the final energy spectrum.

The data format for the FPGA to send the piled-up pulse and time information to the DSP is 16 bits, wherein the 0 th bit to the 13 th bit represent the piled-up pulse signal data, the 14 th bit represents the time information (1 valid), and the 15 th bit represents the end of the continuously piled-up pulse signal (1 valid).

Whether the trapezoidal pulses are accumulated or not is realized by judging the interval time between two pulses, and if the number of sampling points of the rising edge of the trapezoidal pulse of the slow channel is Mf, the number of sampling points of the flat top is Mt, and the number of the interval points of two adjacent trapezoidal pulses is Md. Two trapezoidal pulses are considered to be piled up when Md < Mf +0.5 × Mt. When Md ≧ Mf +0.5 XMt, it is considered that the two trapezoidal pulses are not piled up.

And analyzing the pulse amplitude of the pulse without accumulation in the FPGA to obtain energy spectrum data, and storing the energy spectrum data in a DPRAM module of a memory in the FPGA. The accumulated pulses are sent to a dual-core DSP, the dual-core DSP consists of a DSP core and an ARM core, the DSP core is used for calculation, and the ARM core is used for communication, parameter configuration and system control. Restoring the amplitude of the piled pulses in a DSP core through matrix operation, wherein the pile-up restoring algorithm is to construct a standard signal by assuming that n pulses are piled up together, n is more than or equal to 2, and the occurrence time of the n pulses is knownA pile-up matrix of X = [ X ] ¹x ²...... x ⁿ]500 rows and n columns. Define matrix a = [ a =]For n pile-up recovered pulse amplitudes, the matrix a has n rows and 1 column. Definition matrix Y = [ Y ]]For the actual pulse data collected, the matrix Y has 500 rows and 1 column. Amplitude value matrix a = X of piled-up pulses ^-1Y, i.e. [ a ]]= [x ¹x ²...... x ⁿ] ^-1*[y]Obtaining n piled-up pulses with amplitude a ¹,a ²,.......,a ⁿ. And energy spectrum data obtained by analyzing the amplitude of the accumulated pulse is stored in an RAM of an ARM core, and the energy spectrum data in the ARM and the energy spectrum data in the DSP are added according to corresponding addresses to obtain complete energy spectrum data.

Compared with the prior art, the invention adopting the technical scheme has the following technical effects: the reliability and the stability of the system are improved by adopting a digital multi-channel pulse amplitude analysis technology; the accumulated pulses are restored, and the counting rate of the energy spectrum is improved while the energy resolution is ensured.

Drawings

FIG. 1 is a schematic diagram of the working principle of the present invention;

FIG. 2 is a waveform of a standard pulse;

FIG. 3 illustrates waveforms for stacked pulses and exploded pulses;

in the figure: the device comprises a signal conditioning module 1, a high-speed ADC module 2, an FPGA module 3, a slow channel 4, an amplitude analysis module 5, a DPRAM (dual-port random access memory) memory 6, a fast channel 7, an accumulation judgment module 8, a memory FIFO (first in first out) memory 10, a dual-core DSP 11 and an ARM (advanced RISC machine) core 12.

Detailed Description

FIG. 1 shows a digital accumulation recovery multichannel pulse amplitude analyzer suitable for an X-ray fluorescence multi-element analyzer, a signal conditioning circuit (1) differentiates a pulse signal output by an X-ray detector to obtain a single exponential decay signal, a high-speed ADC (2) is an AD9430 digital-to-analog converter with a maximum sampling frequency of 210MHz, the sampling frequency used by the invention is 200MHz, the sampling period is 5ns, an FPGA (3) selects EP4C30 to complete most functions of pulse amplitude analysis, a slow channel (4) shapes the detector signal into trapezoidal pulses with adjustable widths, a fast channel (7) shapes the detector signal into triangular pulses with 5 sampling point widths for extracting time information of the detector signal, an accumulation judging module (8) judges whether the trapezoidal pulses are accumulated according to the time information of the detector signal, and an amplitude analyzing module (5) judges according to the pulse accumulation, the method comprises the steps that energy spectrum data obtained by analyzing non-piled trapezoidal pulses are stored in a DPRAM (6), time information and pulse data are stored in a memory FIFO (9) for the piled trapezoidal pulses, a dual-core DSP (10) selects F28M36 and comprises a DSP core (11) and an ARM core (12), the DSP core (11) reads pulse time information and pulse data in the memory FIFO (9) through an EPI bus interface, the amplitude of each piled pulse is calculated by using a pile-up recovery algorithm, amplitude values are sent to the ARM core (12) to obtain energy spectrum data of the piled pulses, the ARM core (12) reads the energy spectrum data in the DPRAM (6) and adds the energy spectrum data of the piled pulses according to corresponding channel addresses to obtain complete energy spectrum data, and finally the energy spectrum data are sent to an upper computer through the ARM core (12) and are used for element content analysis.

The specific pulse pile-up recovery process of the invention is as follows: in order to reduce the amount of calculation for pile-up recovery, the piled-up pulses are decimated in the FPGA (3) and the sampling frequency is reduced to 40 MHz. Fig. 2 is a waveform diagram of a standard pulse, and fig. 3 is a waveform diagram of a piled-up pulse and an exploded pulse. The standard pulse is stored in DSP, DSP reads pulse time information and accumulated pulse data from FPGA, and first, a standard pulse matrix X = [ X = ] is constructed ¹x ²]The matrix X has 500 rows and 2 columns, and the 2 columns of data are standard pulse data stored at the pulse positions specified by the time information, as shown in fig. 2. Actually acquired piled-up pulse matrix Y = [ Y]The matrix Y has 500 rows and 1 column, and the 1 column stores the piled-up pulse data as shown in fig. 3. Implementing matrix operations X in a DSP ^-1Y obtains matrix A, in which there are 2 rows, 1 column, 2 rows of data are a ¹And a ²，a ¹And a ²I.e. the amplitude values of pulse 1 and pulse 2, which are piled up as illustrated in fig. 3.

Claims

1. An accumulation recovery digital multi-channel pulse amplitude analyzer suitable for an X fluorescence multi-element analyzer is characterized in that:

the hardware circuit mainly comprises a high-speed ADC, an FPGA circuit and a dual-core DSP circuit, wherein the high-speed ADC, the FPGA circuit and the dual-core DSP circuit are sequentially connected, and the sampling frequency of the ADC is 80 MHz;

the dual-core DSP comprises a DSP core and an ARM core, wherein the DSP core is used for calculation, and the ARM core is used for communication, parameter configuration and system control.

2. The stacking recovery digital multichannel pulse amplitude analyzer suitable for use in an X-fluorescence multi-element analyzer, according to claim 1, wherein:

the X-ray detector signal is acquired by a high-speed ADC after passing through a differentiation and adaptation circuit, and the digitized detector signal is subjected to filtering, fast and slow channel forming, baseline restoration and accumulation judgment in an FPGA;

the pile-up recovery algorithm is that a matrix X = [ X ] of a standard signal is constructed on the assumption that n pulses are piled up, n is larger than or equal to 2, and the occurrence time of the n pulses is known ¹x ²...... x ⁿ]500 rows and n columns, the standard signal is obtained by averaging 20 sampling signals; define matrix a = [ a =]For n pile-up recovered pulse amplitudes, matrix a has n rows, 1 column; definition matrix Y = [ Y ]]For actually acquired pulse data, the matrix Y has 2000 rows and 1 column; amplitude value matrix a = X of piled-up pulses ^-1Y, i.e. [ a ]]=[x ¹x ²...... x ⁿ] ^-1*[y]Obtaining n piled-up pulses with amplitude a ¹,a ²,.......,a ⁿ。

3. The stacking recovery digital multichannel pulse amplitude analyzer suitable for use in an X-fluorescence multi-element analyzer, according to claim 2, wherein:

the pulse signals without accumulation are subjected to amplitude analysis in the FPGA to form energy spectrum data.

4. The stacking recovery digital multichannel pulse amplitude analyzer suitable for use in an X-fluorescence multi-element analyzer, according to claim 2, wherein:

the accumulated pulse and the time information are stored together in the FPGA, the FPGA sends the accumulated pulse information data to the DSP at the same time, the amplitude of the accumulated pulse is analyzed in the DSP by using an accumulation recovery algorithm, so that energy spectrum data after the accumulated pulse is recovered is obtained, and an energy spectrum in the FPGA and an energy spectrum in the DSP are added according to corresponding addresses to obtain a final energy spectrum;

the time information is obtained by a fast channel in a forming module, the fast channel uses triangular forming, and a detector signal is formed into a triangular pulse signal with 5 sampling points; assuming that the detector signal time information is Nt, typically Nt =0, Nt =1 is assigned when the maximum value of the triangular pulse is determined, and Nt =0 is assigned after one sampling period of Nt = 1.

5. The pile-up recovery digital multichannel pulse amplitude analyzer, suitable for use in an X-fluorescence multi-element analyzer, according to claim 4, wherein:

the piled-up pulse information data includes piled-up pulse data piled up successively and time information data of each pulse, and the data format at the time of transmission is 16 bits, wherein the 0 th bit to the 13 th bit represent the piled-up pulse signal data, the 14 th bit represents the time information (1 valid), and the 15 th bit represents the end of the successively piled-up pulse signal (1 valid).