CN110773408A - Capacitive micro-nano ultrasonic transducer and preparation method thereof - Google Patents

Capacitive micro-nano ultrasonic transducer and preparation method thereof Download PDF

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Publication number
CN110773408A
CN110773408A CN201911080138.6A CN201911080138A CN110773408A CN 110773408 A CN110773408 A CN 110773408A CN 201911080138 A CN201911080138 A CN 201911080138A CN 110773408 A CN110773408 A CN 110773408A
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China
Prior art keywords
substrate
electrode plate
electrode lead
groove array
lower electrode
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CN201911080138.6A
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Chinese (zh)
Inventor
张萌
韩国威
司朝伟
宁瑾
杨富华
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Institute of Semiconductors of CAS
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Institute of Semiconductors of CAS
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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B06GENERATING OR TRANSMITTING MECHANICAL VIBRATIONS IN GENERAL
    • B06BMETHODS OR APPARATUS FOR GENERATING OR TRANSMITTING MECHANICAL VIBRATIONS OF INFRASONIC, SONIC, OR ULTRASONIC FREQUENCY, e.g. FOR PERFORMING MECHANICAL WORK IN GENERAL
    • B06B1/00Methods or apparatus for generating mechanical vibrations of infrasonic, sonic, or ultrasonic frequency
    • B06B1/02Methods or apparatus for generating mechanical vibrations of infrasonic, sonic, or ultrasonic frequency making use of electrical energy

Abstract

The invention discloses a capacitive micro-nano ultrasonic transducer and a preparation method thereof. The capacitive micro-nano ultrasonic transducer comprises: a substrate; the groove array comprises a plurality of grooves which are arranged in an array manner, form an accommodating space and are arranged on the upper surface of the substrate; the lower electrode plate is arranged in the accommodating space of the groove array; the upper electrode plate is arranged above the groove array and is in contact connection with the upper surface of the substrate; the lower electrode lead penetrates through the substrate and is in contact connection with the lower electrode plate in the groove array; and the upper electrode lead penetrates through the region without the groove array on the substrate and is electrically connected with the upper electrode plate. The capacitive micro-nano ultrasonic transducer and the preparation method thereof have the advantages of simple process, reduction of parasitic capacitance and interconnection resistance due to the vertical lead, good packaging airtightness, easiness in realizing three-dimensional stacking integration with a circuit chip, and capability of improving the performance and reliability of a system.

Description

Capacitive micro-nano ultrasonic transducer and preparation method thereof
Technical Field
The invention relates to the technical field of design and manufacture of micro-electromechanical devices, in particular to a capacitive micro-nano ultrasonic transducer (CMUT) and a preparation method thereof.
Background
Ultrasonic transducers are a key technology for underwater detection and ultrasonic imaging systems. The piezoelectric ultrasonic transducer is widely applied, but has the defects of high material cost, low sensitivity, small bandwidth and the like. The capacitive ultrasonic transducer (CMUT) with the advantages of simple preparation, low power consumption, high sensitivity, wide bandwidth and the like has great potential in the aspect of replacing a piezoelectric ultrasonic transducer. To reduce parasitic capacitance and improve signal quality and system performance, the ultrasound transducer chip needs to be tightly integrated with the interface circuit. The three-dimensional stacking integration can effectively reduce signal transmission delay and loss, has smaller size and more flexible design, and becomes a hot spot of current research.
To achieve three-dimensional stacked integration of chips with interface circuitry, vertical interconnect wires are the key to implementing this technology. The deposition of metal in through-silicon vias and through-glass vias to achieve vertical electrical leads is currently the predominant process solution. However, the application of the technology in the implementation of three-dimensional stacking integration is limited by the problems of how to implement defect-free insulating layer deposition in the through-silicon via with high aspect ratio, parasitic capacitance between metal and a silicon substrate in the through-hole, batch preparation of glass through-holes with high aspect ratio and high density, and thermal expansion coefficient mismatch between a metal material and a substrate material.
Disclosure of Invention
Technical problem to be solved
The invention provides a capacitive micro-nano ultrasonic transducer and a preparation method thereof, which at least partially solve the technical problems.
(II) technical scheme
According to an aspect of the present invention, there is provided a capacitive micro-nano ultrasonic transducer, including:
a substrate 1;
the groove array 2 comprises a plurality of grooves which are arranged in an array manner, form accommodating spaces and are arranged on the upper surface of the substrate 1;
the lower electrode plate 3 is arranged in the accommodating space of the groove array 2;
the upper electrode plate 4 is arranged above the groove array 2, is parallel to the lower electrode plate 3 and is in contact connection with the upper surface of the substrate 1;
the lower electrode lead 5 penetrates through the substrate 1 and is in contact connection with the lower electrode plate 3 in the groove array 2;
the upper electrode lead 6 penetrates through the substrate 1, is provided with no groove array 2, and is electrically connected with the upper electrode plate 4.
In some embodiments, the grooves in the groove array 2 are communicated with each other, and the lower electrode lead 5 is arranged to be in contact connection with the lower electrode plate 3 in one groove in the groove array 2; or
The grooves in the groove array 2 are not communicated with each other, and the lower electrode lead 5 is arranged to be in contact connection with the lower electrode plates 3 in the groove array 2.
Further, wherein:
in some embodiments, the substrate 1 has an upper surface and a lower surface parallel to each other, and the roughness of the upper surface of the substrate 1 is less than 50 nm.
In some embodiments, the depth of each groove in the groove array 2 is less than the height between the upper surface and the lower surface of the substrate 1; the bottom surface of each groove in the groove array 2 is parallel to the upper surface of the substrate 1; the left and right edges of the groove 2 are spaced from the left and right edges of the substrate 1 by a distance greater than 100 μm.
In some embodiments, the thickness of the lower electrode plate 3 is smaller than the depth of each groove in the groove array 2; the lower electrode plate 3 has an upper surface and a lower surface parallel to each other, and the upper surface of the lower electrode plate 3 is parallel to the bottom surface of each groove in the groove array 2.
In some embodiments, the upper electrode plate 4 has an upper surface and a lower surface parallel to each other, the lower surface of the upper electrode plate 4 is in contact with the upper surface of the substrate 1, and the lower surface of the upper electrode plate 4 is covered with an insulating layer 8, and the roughness of the insulating layer 8 is less than 50 nm.
In some embodiments, the lower electrode lead 5 has a silicon pillar structure, and has a rectangular, cylindrical, or trapezoidal cross section; the upper surface of the lower electrode lead 5 is flush with the bottom surface of the groove in the groove array 2; and/or the lower electrode lead 5 has another surface flush with the lower surface of the substrate 1.
In some embodiments, the upper electrode lead 6 has a columnar structure, and has a rectangular, columnar, or trapezoidal cross section; the upper electrode lead 6 has an upper surface lower than the upper surface of the substrate 1 and a lower surface flush with the lower surface of the substrate 1.
In some embodiments, the material of the substrate 1 comprises: glass or quartz, and combinations thereof; and/or the materials of the lower electrode plate 3 and the upper electrode plate 4 comprise: aluminum, copper, titanium, gold, nickel, platinum, chromium, molybdenum, polycrystalline silicon, or monocrystalline silicon, and combinations thereof; and/or, the material of the insulating layer 8 comprises: silicon oxide or silicon nitride; and/or the material of the lower electrode lead 5 and the upper electrode lead 6 is doped monocrystalline silicon.
According to another aspect of the present invention, there is provided a method for manufacturing the above-mentioned capacitive micro-nano ultrasonic transducer, including:
preparing a substrate 1, and arranging a plurality of silicon pillar structures penetrating through the upper surface and the lower surface of the substrate 1, wherein the silicon pillar structures are respectively used as an upper electrode lead 6 and a lower electrode lead 5;
etching a groove array 2 on the upper surface of a substrate 1, wherein the etched region comprises the upper surface of the substrate without a silicon column structure and a lower electrode lead 5 region;
manufacturing a lower electrode plate 3 which is not higher than the groove array 2 in the groove array 2 through deposition and patterning processes of a conductive material;
manufacturing an upper electrode plate 4 on the upper surface of a substrate 1, wherein the upper electrode plate 4 is in contact connection with the upper surface of the substrate through an insulating layer 8, and the contact connection area comprises the upper surface of the substrate without a silicon pillar structure and/or the area of an upper electrode lead 6;
the upper electrode plate 4 is communicated with the upper electrode lead 6 through a deposition and patterning process of a conductive material.
(III) advantageous effects
According to the technical scheme, the capacitive micro-nano ultrasonic transducer and the preparation method thereof provided by the invention have the following beneficial effects:
(1) according to the structure of the capacitive micro-nano ultrasonic transducer, the silicon columns are used as electrical leads which are vertically interconnected, so that signal transmission delay and loss can be reduced, the size is smaller, the design is more flexible, and three-dimensional stacking integration is easier to realize; the silicon has a thermal expansion coefficient similar to that of the glass substrate, and the deformation caused by thermal stress is small, so that the air tightness and high reliability of the package can be ensured;
(2) the substrate of the capacitive micro-nano ultrasonic transducer structure is made of an insulating material, so that parasitic capacitance can be effectively controlled, signal feed-through and crosstalk are reduced, and performance and reliability are effectively improved;
(3) compared with a surface sacrificial layer release process, the anodic bonding process is simple and easy to implement, the process temperature is not high, the requirement on the roughness of the bonded surface is not high, and the yield is higher.
Drawings
Fig. 1 is a schematic diagram of a structure of a capacitive micro-nano ultrasonic transducer according to a first embodiment of the invention;
fig. 2 is a schematic diagram of a structure of a capacitive micro-nano ultrasonic transducer according to a second embodiment of the invention;
fig. 3 is a schematic diagram of a structure of a capacitive micro-nano ultrasonic transducer according to a third embodiment of the invention;
fig. 4 to fig. 11 are schematic flow charts of a method for manufacturing a structure of a capacitive micro-nano ultrasonic transducer according to a second embodiment of the present invention.
In the figure:
1-substrate 2-groove array
3-lower electrode plate 4-upper electrode plate
5-lower electrode lead 6-upper electrode lead
7-conductive material 8-insulating layer
Detailed Description
In order that the objects, technical solutions and advantages of the present invention will become more apparent, the present invention will be further described in detail with reference to the accompanying drawings in conjunction with the following specific embodiments.
For the sake of clarity, some conventional structures and components may be shown in a simplified schematic form in the drawings. In addition, some features in the drawings may be slightly enlarged or changed in scale or size for the purpose of facilitating understanding and viewing of the technical features of the present invention, but this is not intended to limit the present invention. Hereinafter, the term "and/or" may also be used, which is meant to encompass a combination of one or more of the listed associated components or structures, either individually or collectively. The actual dimensions and specifications of the product manufactured according to the present disclosure may be adjusted according to the manufacturing requirements, the characteristics of the product itself, and the present disclosure as described below.
Aiming at the problems mentioned in the background technology, the technology that silicon is buried in the middle of glass is known as the GIS (glass insulation) technology, deep silicon etching is firstly needed to be carried out to form silicon columns, then the glass is heated and reflows to be filled between the silicon columns, then double-sided grinding and polishing are carried out to prepare the GIS cover plate which is bonded with a silicon structure, good sealing performance is easy to realize, the silicon and the glass have similar thermal expansion coefficients, and the reliability of the structure is improved. The insulating characteristic of the glass substrate effectively reduces the parasitic capacitance and improves the sensitivity. Based on the technology, the invention provides the capacitive micro-nano ultrasonic transducer and the preparation method thereof, the preparation process is simple, the design is flexible, and the three-dimensional stacking integration with an interface circuit is easier to realize.
In view of the above, in one aspect, the present invention provides an embodiment of a structure of the capacitive micro-nano ultrasonic transducer, please refer to fig. 1 to 3 and describe as follows:
in a first embodiment of the invention, a capacitive micro-nano ultrasonic transducer is provided, and the structure thereof is described in detail as follows.
Referring to fig. 1, the capacitive micro-nano ultrasonic transducer structure shown in this embodiment includes: the substrate 1 is provided with a groove array 2, comprises a plurality of grooves which are arranged in an array manner, forms an accommodating space, is communicated with each other and is arranged on the upper surface of the substrate 1; the lower electrode plate 3 is positioned in the accommodating space formed by the groove array 2; the upper electrode plate 4 is positioned above the groove array 2, is parallel to the lower electrode plate 3 and is in contact connection with the upper surface of the substrate 1; a lower electrode lead 5 vertically penetrating the substrate 1, located below one of the grooves of the groove array 2, and connected to the lower electrode plate 3 in contact therewith; and the upper electrode lead 6 vertically penetrates through the substrate 1, is arranged in the non-groove array 2 area of the substrate 1, and is connected with the upper electrode plate 4 through a conductive material.
In this embodiment, the substrate 1 is formed of an insulating material, for example, quartz, glass, or other insulating materials compatible with the micro-electromechanical device processing technology, or a combination thereof.
In one example, the upper and lower surfaces of the substrate 1 are parallel and the upper surface roughness is less than 50 nm.
In one example, the lower surface (i.e., the bottom surface) of the groove array 2 is parallel to the upper surface of the substrate 1, and the depth of each groove in the groove array 2 is smaller than the height between the upper surface and the lower surface of the substrate 1. The left and right edges of the groove array 2 are spaced from the left and right edges of the substrate 1 by a distance greater than 100 μm.
In one example, the lower electrode plate 3 is located in the accommodating space formed by the groove array 2; the thickness of the lower electrode plate 3 is smaller than the depth of each groove in the groove array 2; the lower electrode plate 3 has an upper surface and a lower surface parallel to each other, and the upper surface of the lower electrode plate 3 is parallel to the bottom surface of each groove in the groove array 2.
In one example, the upper and lower surfaces of the upper electrode plate 4 are parallel and located above the accommodating space formed by the groove array 2; the lower surface of the upper electrode plate 4 is in contact connection with the upper surface of the substrate 1; depositing an insulating layer 8 on the lower surface of the upper electrode plate 4, wherein the insulating layer comprises the following materials: silicon nitride, silicon oxide and other insulating materials compatible with the processing technology of the micro-electromechanical device; the insulating layer 8 has a roughness of less than 50nm, wherein the insulating layer of the upper electrode plate 4 corresponding to the area of the upper electrode lead 6 is etched to expose a portion of the upper electrode plate 4, and a conductive material 7 is deposited and patterned thereon, the height of which is slightly greater than the thickness of the insulating layer (see fig. 1); the lower surface insulating layer of the upper electrode plate 4 is closely bonded to the upper surface of the substrate 1 through a bonding process.
In one example, the lower electrode lead 5 is a silicon pillar structure vertically penetrating through the substrate 1, and has a rectangular, cylindrical or trapezoidal cross section; the lower surface of the lower electrode lead 5 is flush with the lower surface of the substrate 1, the upper surface of the lower electrode lead is flush with the lower surfaces of the grooves in the groove array 2, and the lower electrode lead is positioned below one of the grooves in the groove array 2 and is directly contacted and communicated with the lower electrode plate 3;
in one example, the upper electrode lead 6 is a columnar structure vertically penetrating through the substrate 1, and has a rectangular, cylindrical or trapezoidal cross section, and the upper surface of the upper electrode lead 6 is slightly lower than the upper surface of the substrate 1 and is disposed in the non-groove array region on the substrate 1; the lower surface of the upper electrode lead 6 is flush with the lower surface of the substrate 1; the upper surface is in contact communication with the conductive material at a corresponding location on the upper electrode plate 4 by a bonding process.
In one example, the material of the lower electrode plate 3 and the upper electrode plate 4 is a conductive material, and includes: aluminum, copper, titanium, gold, nickel, platinum, chromium, molybdenum, polycrystalline silicon or heavily doped monocrystalline silicon, and combinations thereof; the material of the lower electrode lead 5 and the upper electrode lead 6 is doped monocrystalline silicon.
In a second embodiment of the present aspect, a capacitive micro-nano ultrasonic transducer is provided, and the structure thereof is described in detail as follows.
Referring to fig. 2, the capacitive micro-nano ultrasonic transducer structure shown in this embodiment includes: the substrate 1 is provided with a groove array 2, comprises a plurality of grooves which are arranged in an array manner, forms an accommodating space, is communicated with each other and is arranged on the upper surface of the substrate 1; the lower electrode plate 3 is positioned in the accommodating space formed by the groove array 2; the upper electrode plate 4 is positioned above the groove array 2, is parallel to the lower electrode plate 3 and is in contact connection with the upper surface of the substrate 1; a lower electrode lead 5 vertically penetrating the substrate 1, located below one of the grooves of the groove array 2, and connected to the lower electrode plate 3 in contact therewith; and the upper electrode lead 6 vertically penetrates through the substrate 1, is arranged in the non-groove array 2 area of the substrate 1, and is connected with the upper electrode plate 4 through a conductive material.
In this example, the lower surface of the upper electrode plate 4 is deposited with an insulating layer 8 of a material comprising: silicon nitride, silicon oxide and other insulating materials compatible with the processing technology of the micro-electromechanical device; and the roughness of the insulating layer 8 is less than 50nm, and the lower surface of the upper electrode plate 4 is tightly combined with the upper surface of the substrate 1 through a bonding process. The upper electrode lead 6 is exposed by etching the upper electrode plate 4 and the insulating layer thereunder in the corresponding region (corresponding to the region of the upper electrode lead 6), and the upper electrode plate 4 is brought into contact communication with the upper electrode lead 6 by depositing and patterning a conductive material 7 on the upper surface (see fig. 2).
In the structure of the capacitive micro-nano ultrasonic transducer shown in this embodiment, the structural settings of each component, including the position relationship, the surface roughness, the shape, the size parameters, the bonding manner, the materials of the electrode plate and the electrode lead, etc., are the same as those in the first embodiment or can be adaptively adjusted, and are not described herein again.
In a third embodiment of the present disclosure, a capacitive micro-nano ultrasonic transducer is provided, and the structure thereof is described in detail as follows.
Referring to fig. 3 again, the capacitive micro-nano ultrasonic transducer structure shown in this embodiment includes: the substrate 1 is provided with a groove array 2, comprises a plurality of grooves which are arranged in an array manner, forms an accommodating space, is communicated with each other and is arranged on the upper surface of the substrate 1; the lower electrode plate 3 is positioned in the accommodating space formed by the groove array 2; the upper electrode plate 4 is positioned above the groove array 2, is parallel to the lower electrode plate 3 and is in contact connection with the upper surface of the substrate 1; a lower electrode lead 5 vertically penetrating the substrate 1, located below one of the grooves of the groove array 2, and connected to the lower electrode plate 3 in contact therewith; and the upper electrode lead 6 vertically penetrates through the substrate 1, is arranged in the non-groove array region of the substrate 1, and is connected with the upper electrode plate 4 through a conductive material.
In this example, the lower surface of the upper electrode plate 4 is deposited with an insulating layer 8 of a material comprising: silicon nitride, silicon oxide and other insulating materials compatible with the processing technology of the micro-electromechanical device; and the roughness of the insulating layer 8 is less than 50nm, and the lower surface of the upper electrode plate 4 is tightly combined with the upper surface of the substrate 1 through a bonding process. The vacuum degree of the package can be further improved by etching the upper electrode plate 4 and the insulating layer thereunder in the corresponding region (corresponding to a certain lower electrode lead 5 region) to expose the lower electrode lead 5 region, and depositing the insulating material 8 in vacuum (see fig. 3).
In the structure of the capacitive micro-nano ultrasonic transducer shown in this embodiment, the structural settings of each component, including the position relationship, the surface roughness, the shape, the size parameters, the bonding manner, the materials of the electrode plate and the electrode lead, etc., are the same as those in the first embodiment or can be adaptively adjusted, and are not described herein again.
In the three exemplary embodiments, the grooves in the groove array 2 of the capacitive micro-nano ultrasonic transducer structure are communicated with each other, so that the lower electrode lead 5 is arranged below one of the grooves in the groove array 2 and is in contact connection with the lower electrode plate 3 below the groove. It should be understood that in other embodiments, the grooves in the groove array 2 may not be connected or partially connected, and in this case, the lower electrode lead 5 is only required to be disposed below the groove of each groove array 2 that is not connected and connected in contact with the lower electrode plate 3 corresponding to each groove, so as to ensure that each groove array is supplied with power.
The invention provides a preparation method of the capacitance type micro-nano ultrasonic transducer in another aspect, which comprises the following steps:
preparing a substrate 1, and arranging a plurality of silicon pillar structures penetrating through the upper surface and the lower surface of the substrate 1, wherein the silicon pillar structures are respectively used as an upper electrode lead 6 and a lower electrode lead 5;
etching a groove array 2 on the upper surface of a substrate 1, wherein the etched region comprises the upper surface of the substrate without a silicon column structure and a lower electrode lead 5 region;
manufacturing a lower electrode plate 3 which is not higher than the groove array 2 in the groove array 2 through deposition and patterning processes of a conductive material;
manufacturing an upper electrode plate 4 on the upper surface of a substrate 1, wherein the upper electrode plate 4 is in contact connection with the upper surface of the substrate through an insulating layer 8, and the contact connection area comprises the upper surface of the substrate without a silicon pillar structure and/or the area of an upper electrode lead 6;
the upper electrode plate 4 is communicated with the upper electrode lead 6 through a deposition and patterning process of a conductive material.
In view of the above-mentioned preparation method, the present invention will be further described in detail with reference to the following specific examples:
in a fourth embodiment of the present invention, a method for manufacturing a capacitive micro-nano ultrasonic transducer is provided, and fig. 4 to 11 are schematic flow diagrams of a method for manufacturing a structure of a capacitive micro-nano ultrasonic transducer according to a second embodiment of the present invention, where as shown in the drawings, the method for manufacturing a structure of a capacitive micro-nano ultrasonic transducer according to the present embodiment includes:
step S41: photoetching the upper surface of a silicon wafer, forming a vertical silicon column structure through deep silicon etching, and removing a mask, wherein the structure is shown in FIG. 4;
step S42: the upper surface of the silicon chip and the surface of the glass substrate 1 are tightly combined together through an anodic bonding process, and the structure is shown in FIG. 5;
step S43: glass is filled between the silicon columns in a reflowing way through a high-temperature heating reflowing process, and silicon column structures which vertically penetrate through the substrate 1 are formed through a double-sided grinding and polishing process and are respectively used as a lower electrode lead 5 and an upper electrode lead 6, wherein the structure is shown in fig. 6;
step S44: manufacturing a groove array 2 on a substrate 1 through an etching process, wherein the grooves are communicated with each other, and the structure is shown in FIG. 7;
step S45: depositing a conductive material in each groove of the groove array 2 by sputtering, evaporation and other processes, and performing photoetching and patterning to form a lower electrode plate 3, which has a structure shown in fig. 8;
step S46: depositing a layer of insulating material on the upper surface of a silicon substrate or SOI top silicon, tightly combining the insulating material surface or the wafer with the insulating layer 8 on the front surface and the conductive film layer with the upper surface of the substrate 1 through an anodic bonding process, and thinning the insulating material surface or the wafer to the conductive film layer through etching or polishing and other processes to be used as an upper electrode plate 4, wherein the structure is shown in FIG. 9;
step S47: thinning the lower surface of the substrate 1 by etching or polishing and other processes to expose the lower surface of the embedded silicon pillar structure to serve as a lower electrode lead 5 and an upper electrode lead 6, wherein the lower electrode lead 5 is positioned below a certain groove in the groove array 2 and is in contact communication with the lower electrode plate 3; etching the upper electrode plate 4 and the insulating layer 8 below the upper electrode plate 4 in the corresponding region (corresponding to the region of the upper electrode lead 6) to expose the upper electrode lead 6, as shown in fig. 10;
step S48: the upper electrode plate 4 is brought into contact communication with the upper electrode lead 6 by depositing and patterning the conductive material 7 on the upper surface, as in the structure shown in fig. 11.
So far, the structure of the capacitive micro-nano ultrasonic transducer according to an embodiment of the present invention is completed.
The execution sequence of the present invention is not limited to the above embodiments, and the manufacturing process capable of forming the corresponding device structure is within the scope of the present application.
The above-mentioned embodiments are intended to illustrate the objects, technical solutions and advantages of the present invention in further detail, and it should be understood that the above-mentioned embodiments are only exemplary embodiments of the present invention and are not intended to limit the present invention, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (10)

1. A capacitive micro-nano ultrasonic transducer is characterized by comprising:
a substrate (1);
the groove array (2) comprises a plurality of grooves which are arranged in an array manner, form an accommodating space and are arranged on the upper surface of the substrate (1);
the lower electrode plate (3) is arranged in the accommodating space of the groove array (2);
the upper electrode plate (4) is arranged above the groove array (2), is parallel to the lower electrode plate (3) and is in contact connection with the upper surface of the substrate (1);
the lower electrode lead (5) penetrates through the substrate (1) and is in contact connection with the lower electrode plate (3) in the groove array (2);
and the upper electrode lead (6) penetrates through the area without the groove array (2) on the substrate (1) and is electrically connected with the upper electrode plate (4).
2. The capacitive micro-nano ultrasonic transducer according to claim 1, further comprising:
the grooves in the groove array (2) are communicated with each other, and the lower electrode lead (5) is arranged and in contact connection with the lower electrode plate (3) in one groove of the groove array (2); or
The grooves in the groove array (2) are not communicated with each other, and the lower electrode lead (5) is in contact connection with the lower electrode plates (3) in the groove array (2).
3. The capacitive micro-nano ultrasonic transducer according to claim 2, wherein the substrate (1) has an upper surface and a lower surface parallel to each other, and the roughness of the upper surface of the substrate (1) is less than 50 nm.
4. The capacitive micro-nano ultrasonic transducer according to claim 2 or 3, wherein:
the depth of each groove in the groove array (2) is smaller than the height between the upper surface and the lower surface of the substrate (1);
the bottom surface of each groove in the groove array (2) is parallel to the upper surface of the substrate (1);
the distance between the left edge and the right edge of the groove array (2) and the left edge and the right edge of the substrate (1) are larger than 100 mu m.
5. The capacitive micro-nano ultrasonic transducer according to claim 4, wherein:
the thickness of the lower electrode plate (3) is smaller than the depth of each groove in the groove array (2);
the lower electrode plate (3) is provided with an upper surface and a lower surface which are parallel to each other, and the upper surface of the lower electrode plate (3) is parallel to the bottom surface of each groove in the groove array (2).
6. The capacitive micro-nano ultrasonic transducer according to claim 5, wherein the upper electrode plate (4) has an upper surface and a lower surface which are parallel to each other, the lower surface of the upper electrode plate (4) is in contact connection with the upper surface of the substrate (1), the lower surface of the upper electrode plate (4) is covered with an insulating layer (8), and the roughness of the insulating layer (8) is less than 50 nm.
7. The capacitive micro-nano ultrasonic transducer according to claim 6, wherein:
the lower electrode lead (5) is of a silicon column structure, and the section of the lower electrode lead (5) is rectangular, cylindrical or trapezoidal;
the upper surface of the lower electrode lead (5) is flush with the bottom surface of the groove in the groove array (2); and/or
The lower electrode lead (5) has another surface flush with the lower surface of the substrate (1).
8. The capacitive micro-nano ultrasonic transducer according to claim 7, wherein:
the upper electrode lead (6) is of a columnar structure, and the section of the upper electrode lead (6) is rectangular, columnar or trapezoidal;
the upper electrode lead (6) is provided with an upper surface and a lower surface, the upper surface of the upper electrode lead (6) is lower than the upper surface of the substrate (1), and the lower surface of the upper electrode lead (6) is flush with the lower surface of the substrate (1).
9. The capacitive micro-nano ultrasonic transducer according to claim 8, wherein:
the material of the substrate (1) comprises: glass or quartz, and combinations thereof; and/or
The materials of the lower electrode plate (3) and the upper electrode plate (4) comprise: aluminum, copper, titanium, gold, nickel, platinum, chromium, molybdenum, polycrystalline silicon, or monocrystalline silicon, and combinations thereof; and/or
The material of the insulating layer (8) comprises: silicon oxide or silicon nitride; and/or
The lower electrode lead (5) and the upper electrode lead (6) are made of doped monocrystalline silicon.
10. A preparation method of a capacitive micro-nano ultrasonic transducer, which is used for preparing the capacitive micro-nano ultrasonic transducer according to any one of claims 1 to 9, and comprises the following steps:
preparing a substrate (1), and arranging a plurality of silicon pillar structures penetrating through the upper surface and the lower surface of the substrate (1), wherein the silicon pillar structures are respectively used as an upper electrode lead (6) and a lower electrode lead (5);
etching a groove array (2) on the upper surface of a substrate (1), wherein the etched region comprises the upper surface of the substrate without a silicon column structure and a lower electrode lead (5) region;
manufacturing a lower electrode plate (3) which is not higher than the groove array (2) in the groove array (2) through deposition and patterning processes of a conductive material;
manufacturing an upper electrode plate (4) on the upper surface of a substrate (1), wherein the upper electrode plate (4) is in contact connection with the upper surface of the substrate through an insulating layer (8), and the contact connection region comprises the upper surface of the substrate without a silicon pillar structure and/or an upper electrode lead (6) region;
the upper electrode plate (4) is connected to the upper electrode lead (6) by a deposition and patterning process of a conductive material.
CN201911080138.6A 2019-11-06 2019-11-06 Capacitive micro-nano ultrasonic transducer and preparation method thereof Pending CN110773408A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112485775A (en) * 2020-04-10 2021-03-12 友达光电股份有限公司 Transduction device, transduction structure and manufacturing method thereof
WO2023226021A1 (en) * 2022-05-27 2023-11-30 京东方科技集团股份有限公司 Ultrasonic transducer and manufacturing method therefor, and electronic device

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Publication number Priority date Publication date Assignee Title
CN112485775A (en) * 2020-04-10 2021-03-12 友达光电股份有限公司 Transduction device, transduction structure and manufacturing method thereof
CN112485775B (en) * 2020-04-10 2023-06-23 友达光电股份有限公司 Transduction device, transduction structure and manufacturing method thereof
WO2023226021A1 (en) * 2022-05-27 2023-11-30 京东方科技集团股份有限公司 Ultrasonic transducer and manufacturing method therefor, and electronic device

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