CN110751978B - Test calibration method and test calibration circuit for non-volatile memory - Google Patents
Test calibration method and test calibration circuit for non-volatile memory Download PDFInfo
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- CN110751978B CN110751978B CN201910981001.1A CN201910981001A CN110751978B CN 110751978 B CN110751978 B CN 110751978B CN 201910981001 A CN201910981001 A CN 201910981001A CN 110751978 B CN110751978 B CN 110751978B
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- G11—INFORMATION STORAGE
- G11C—STATIC STORES
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- G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
- G11C29/56004—Pattern generation
Abstract
The application relates to the technical field of semiconductor integrated circuit design and test, in particular to a test calibration method and a test calibration circuit for a non-volatile memory. The test calibration method for the nonvolatile memory comprises the following steps: receiving a control signal; determining a working mode according to the control signal; reading the trimming data from the nonvolatile memory; when the working mode is a user mode, verifying whether the trimming data is consistent with the data written into the non-volatile memory in the previous time; and when the signals are consistent, sending a feedback signal. The test calibration circuit for the non-volatile memory comprises: the device comprises an interface module, a mode control module, a test module and a response analysis module; the interface module is used for receiving a control signal. The method and the device have the advantages that the trimming data are automatically loaded from the OTP area of the nonvolatile memory after the working mode is selected, so that the verification process in the user mode can be simplified.
Description
Technical Field
The application relates to the technical field of semiconductor integrated circuit design and test, in particular to a test calibration method and a test calibration circuit for a non-volatile memory.
Background
The non-volatile memory is also called as a non-volatile memory, and the stored information can still exist for a long time after the power is turned off and is not easy to lose. The performance of the nonvolatile memory needs to be adjusted and verified through the test and calibration circuit in the initial test stage so that the nonvolatile memory can exert the optimal performance.
The calibration circuit in the related art comprises a user control module and a built-in test unit, wherein the user control module and the built-in test unit respectively need to sequentially read trimming data from a memory through a switch selection module, and the system can stably work only by finishing reading and comparing trimming parameters in respective modes.
However, the calibration circuit in the related art has a high requirement for data registration, a switch selection module is required, system connection is complex, and the operation flow is complicated.
Disclosure of Invention
The application provides a calibration method and a calibration circuit for a non-volatile memory, which can solve the problems of complex system connection and complex operation process in the related technology.
In a first aspect, an embodiment of the present application provides a method for testing and calibrating a nonvolatile memory, including:
receiving a control signal;
determining a working mode according to the control signal;
reading out trimming data from an OTP (One Time Programmable) area of a non-volatile memory;
when the working mode is the user mode, verifying whether the trimming data is consistent with the data written into the non-volatile memory in the previous time;
and sending a feedback signal when the trimming data is consistent with the data written into the non-volatile memory in the previous time.
Optionally, when the working mode is the test mode, performing calibration and adjustment on the trimming data to generate calibration and adjustment data;
writing the calibration data into an OTP area of the non-volatile memory;
optionally, the adjusting the trimming data to generate the adjusting data includes:
and correcting and adjusting the trimming data by generating a test vector to generate corrected and adjusted data.
Optionally, verifying whether the trimming data is consistent with the data written into the non-volatile memory last time includes:
comparing the trimming data with the inverse value of the trimming data;
and when the trimming data is matched with the inverse value, determining that the trimming data is consistent with the data written into the non-volatile memory in the previous time.
Optionally, the trimming data and the inverse of the trimming data are read from the non-volatile memory.
In a second aspect, a test calibration circuit for a non-volatile memory is provided, the test calibration circuit for a non-volatile memory comprising: the device comprises an interface module, a mode control module, a test module and a response analysis module;
the interface module is used for receiving a control signal;
the mode control module is used for determining a working mode according to the control signal, and the working mode comprises a user mode;
the test module is used for reading the trimming data from the OTP area of the non-volatile memory, verifying whether the trimming data is consistent with the data written into the non-volatile memory at the previous time when the working mode is the user mode, and outputting a verification result to the response analysis module;
and the response analysis module is used for sending a feedback signal when the verification result is that the trimming data is consistent with the data written into the non-volatile memory in the previous time.
Optionally, the test module is further configured to calibrate the trimming data when the working mode is the test mode, and write the calibrated data into the OTP area of the non-volatile memory.
Optionally, the test module includes: the device comprises a parameter automatic adjusting module, a register group and a memory control module;
the memory control module is used for writing or reading trimming data into the OTP area of the nonvolatile memory according to the working mode and loading the trimming data read from the OTP area into the register group;
the parameter automatic adjustment module comprises a verification unit which can verify whether the trimming data is consistent with the data written into the non-volatile memory in the previous time or not in a user mode and output a verification result.
Optionally, the verification unit includes a positive and negative value comparison unit, and the positive and negative value comparison unit is configured to compare the trimming data with a negative value of the trimming data; and when the trimming data is matched with the inverse value, the trimming data is ensured to be consistent with the data written into the non-volatile memory in the previous time.
Optionally, the parameter automatic adjustment module further includes a calibration unit, and the calibration unit is configured to calibrate the trimming data according to the test mode to generate calibration data, and write the calibration data into the OTP area of the non-volatile memory.
The technical scheme at least comprises the following advantages: on one hand, whether the trimming data is consistent with the data written into the nonvolatile memory in the previous time is verified in the user mode, so that a basis is provided for judging whether the nonvolatile memory can work in a stable state. On the other hand, after the working mode is selected, the trimming data is automatically loaded from the OTP area of the non-volatile memory, so that the verification process in the user mode can be simplified, the user does not need to read the trimming data from the non-volatile memory one by one, but directly loads the trimming data according to the received control signal, the complexity of operation is reduced, and the efficiency is greatly improved.
Drawings
In order to more clearly illustrate the detailed description of the present application or the technical solutions in the prior art, the drawings needed to be used in the detailed description of the present application or the prior art description will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative efforts.
FIG. 1 is a flow chart of a first embodiment of the first aspect of the present invention;
FIG. 2 is a flow chart of a second embodiment of the first aspect of the present invention;
fig. 3 is a flowchart of an embodiment of step S4 in the first aspect of the present invention;
FIG. 4 is a block diagram of the first embodiment of the second aspect of the present invention;
fig. 5 is a block diagram of an embodiment of the second aspect of the present invention.
100. The device comprises an interface module, 200, a mode control module, 300, a test module, 310, an automatic parameter adjusting module, 311, a verification unit, 312, a calibration unit, 320, a register set, 330, a memory control module and 400, a response analysis module.
Detailed Description
The technical solutions in the present application will be described clearly and completely with reference to the accompanying drawings, and it is obvious that the described embodiments are some, but not all embodiments of the present application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In the description of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplicity of description, and do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be construed as limiting the present application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present application, it is to be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; the connection can be mechanical connection or electrical connection; the two elements may be directly connected or indirectly connected through an intermediate medium, or may be communicated with each other inside the two elements, or may be wirelessly connected or wired connected. The specific meaning of the above terms in the present application can be understood in a specific case by those of ordinary skill in the art.
In addition, the technical features mentioned in the different embodiments of the present application described below may be combined with each other as long as they do not conflict with each other.
As a first embodiment of the first aspect of the present invention, as shown in fig. 1, there is provided a test tuning method for a nonvolatile memory, the test tuning method for a nonvolatile memory including:
s1: receiving a control signal;
s2: determining a working mode according to the control signal;
s3: reading the trimming data from the nonvolatile memory;
s4: when the working mode is the user mode, verifying whether the trimming data is consistent with the data written into the OTP area of the nonvolatile memory at the previous time;
s5: and when the trimming data is consistent with the data written into the non-volatile memory in the previous time, sending a feedback signal.
On one hand, whether the trimming data is consistent with the data written into the nonvolatile memory in the previous time is verified in the user mode, so that a basis is provided for judging whether the nonvolatile memory can work in a stable state; on the other hand, after the working mode is selected, the trimming data is automatically loaded from the OTP area of the non-volatile memory, so that the verification process in the user mode can be simplified, the user does not need to read the trimming data from the non-volatile memory one by one, but directly loads the trimming data according to the received control signal, the complexity of operation is reduced, and the efficiency is improved.
As a second embodiment of the first aspect of the present invention, as shown in fig. 2, the embodiment is based on the first embodiment of the first aspect of the present invention, and the test calibration method for a nonvolatile memory further includes:
s6: when the working mode is the testing mode, correcting and adjusting the trimming data to generate corrected and adjusted data;
s7: writing the calibration data into an OTP area of the non-volatile memory;
s8: after reset, the trimming data written in the OTP area becomes new trimming data.
And after the working mode is selected, the trimming data is loaded from the OTP area of the nonvolatile memory, and after the trimming data is loaded, the trimming or verification is selected according to the working mode, so that the problem that the trimming data is repeatedly registered in the trimming circuit in the related art is solved. Since the trimming data written in step S8 becomes new trimming data, if the verification mode is performed after the trimming mode is performed, it is determined that the trimming data is identical to the data written into the non-volatile memory OTP area last time, and thus it can be seen that the verification mode can verify the trimming data in the verification mode, thereby ensuring that the system operates in a correct operating state.
As a third embodiment of the first aspect of the present invention, since the system needs to operate accurately at the correct current or voltage, this embodiment is based on the first embodiment or the second embodiment of the first aspect, the trimming data and the calibration data may be analog parameter adjustment values for adjusting the simulated current and voltage, and the stability of the performance of the chip system can be ensured only when the system operates at the correct current and voltage.
As a fourth embodiment of the first aspect of the present invention, which is based on the first embodiment or the second embodiment of the first aspect, S6: when the working mode is the test mode, the trimming data is corrected and generated to be corrected and adjusted, and the method comprises the following steps: and calibrating the trimming data by generating a test vector in the test channel, and measuring calibration data which can enable the system to stably work.
As a fifth embodiment of the first aspect of the present invention, in order to make the calibration mode or the verification mode accurately and reliably performed, this embodiment is based on the first embodiment of the first aspect, S3: the trimming data is read from the non-volatile memory and can be loaded in sequence, so that the trimming data can be sequentially trimmed in the trimming mode, and can be sequentially verified, and the dislocation is avoided.
As a sixth example of the first aspect of the present invention, as shown in fig. 3, S4: when the working mode is the user mode, verifying whether the trimming data is consistent with the data written into the non-volatile memory at the previous time, which may be: s410: comparing the trimming data with the inverse value thereof; s420: and when the trimming data is matched with the inverse value of the trimming data, determining that the trimming data is consistent with the data written into the OTP area of the non-volatile memory at the previous time. The inverse value of the trimming data is read out at the same time as the trimming data is read out from the nonvolatile memory.
As a first embodiment of the second aspect of the present invention, as shown in FIG. 4, a test calibration circuit for a nonvolatile memory includes: an interface module 100, a mode control module 200, a test module 300, and a response analysis module 400; the interface module 100 is configured to receive a control signal; the mode control module 200 is configured to select a corresponding operating mode according to the control signal received by the interface module 100; the test module 300 is configured to read trimming data from the OTP area of the non-volatile memory, verify whether the trimming data is consistent with data written into the non-volatile memory in the previous time when the operating mode is the user mode, and output a verification result; the response analysis module 100 is configured to send a feedback signal when the verification result is that the trimming data is consistent with the data written into the nonvolatile memory last time.
On one hand, whether the trimming data is consistent with the data written into the nonvolatile memory in the previous time is verified in the user mode, so that a basis is provided for judging whether the nonvolatile memory can work in a stable state. On the other hand, after the working mode is selected when the control signal is received, the trimming data is automatically loaded from the OTP area of the nonvolatile memory, so that the verification process in the user mode can be simplified, the user does not need to read the trimming data from the nonvolatile memory one by one, but directly loads the trimming data according to the received control signal, the complexity of operation is reduced, and the efficiency is greatly improved.
As a second embodiment of the second aspect of the present invention, as shown in fig. 5, the embodiment is based on the first embodiment of the second aspect of the present invention, and the operation mode further includes a test mode; the test module is also used for correcting and adjusting the trimming data when the working mode is the test mode; and writing the generated calibration data after calibration into the OTP area of the non-volatile memory.
After the mode control module 200 selects the working mode according to the received control signal, the test module 300 loads trimming data from the OTP area of the nonvolatile memory, and selects to perform calibration or verification according to the working mode after the trimming data is loaded; in the process, the test module 300 is reused under different working modes, so that the test module 300 automatically finishes the loading of trimming data in a verification mode, adjusts the non-volatile memory simulation module to be a proper voltage and current value and waits for the stability of the system; in the calibration mode, the test module 300 automatically finishes loading of the trimming data and calibrates the trimming data, so that the problem of repeated registration of the trimming data in the related art is solved, the complexity of system connection can be reduced, and the chip area is saved.
As a third embodiment of the second aspect of the present invention, as shown in fig. 5, the embodiment is based on the first embodiment of the second aspect, and the test module 300 includes: an automatic parameter adjustment module 310, a register set 320, and a memory control module 330; the memory control module 330 is configured to write or read trimming data into or from the OTP area of the non-volatile memory according to the operating mode, and load the trimming data read from the OTP area into the register set 320; the automatic parameter adjustment module 310 includes a verification unit 311, and the verification unit 311 is capable of verifying whether the trimming data is consistent with the data written into the non-volatile memory in the previous time in the user mode, and outputting the verification result to the response analysis module 400. The automatic parameter adjustment module 310 further includes a calibration unit 312, where the calibration unit 312 can calibrate the trimming data according to the test mode, and write the calibrated data into the OTP area of the non-volatile memory.
Multiplexing the test module 300 in different working modes, so that the memory control module 330 of the test module 300 automatically finishes loading the trimming data into the register group 320 in the verification mode, adjusts the non-volatile memory simulation module to a proper voltage and current value and waits for the stability of the system; in the calibration mode, the memory control module 330 of the test module 300 automatically loads the trimming data into the register group 320, and calibrates the trimming data, thereby avoiding the problem of repeated registration of the trimming data in the related art, and the multiplexing test module 300 can make full use of the test module 300, reduce the complexity of system connection, and save chip area.
As a fourth embodiment of the second aspect of the present invention, as shown in fig. 5, the embodiment is based on the third embodiment of the second aspect, and the verification unit 311 includes a positive and negative value comparison unit, and the positive and negative value comparison unit is configured to compare the trimming data with the negative value of the trimming data, and when the trimming data matches the negative value, determine that the trimming data is consistent with the data written into the non-volatile memory last time.
As a fifth embodiment of the second aspect of the present invention, as shown in fig. 5, the embodiment is based on the first embodiment of the second aspect, and the calibration unit 312 is capable of calibrating the trimming data by generating a test vector in the test channel, and measuring the calibration data capable of making the system operate stably.
It should be understood that the above examples are only for clarity of illustration and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications of this invention are intended to be covered by the scope of the invention as expressed herein.
Claims (8)
1. A test calibration method for a non-volatile memory is characterized by comprising the following steps:
receiving a control signal;
determining a working mode according to the control signal;
reading trimming data from an OTP region of a nonvolatile memory;
when the working mode is a user mode, verifying whether the trimming data is consistent with the data written into the OTP area of the nonvolatile memory at the previous time;
when the trimming data is consistent with the data written into the non-volatile memory in the previous time, sending a feedback signal;
when the working mode is a test mode, correcting and adjusting the trimming data to generate corrected and adjusted data;
and writing the generated calibration data after calibration into the OTP area of the non-volatile memory.
2. The method as claimed in claim 1, wherein the calibrating the trimming data to generate the calibration data comprises:
and correcting and adjusting the trimming data by generating a test vector to generate corrected and adjusted data.
3. The method as claimed in claim 1, wherein the verifying whether the trimming data is consistent with the data written into the nonvolatile memory last time comprises:
comparing the trimming data with the inverse value of the trimming data;
and when the trimming data is matched with the inverse value, determining that the trimming data is consistent with the data written into the non-volatile memory in the previous time.
4. The method as claimed in claim 3, wherein reading the trimming data from the OTP region of the nonvolatile memory comprises:
and reading out trimming data and the inverse value of the trimming data from the nonvolatile memory.
5. A test calibration circuit for a non-volatile memory is characterized by comprising: the device comprises an interface module, a mode control module, a test module and a response analysis module;
the interface module is used for receiving a control signal;
the mode control module is used for determining a working mode according to the control signal;
the test module is used for reading trimming data from the OTP area of the nonvolatile memory, verifying whether the trimming data is consistent with data written into the nonvolatile memory at the previous time when the working mode is a user mode, and outputting a verification result to the response analysis module; the test module is also used for correcting and adjusting the trimming data when the working mode is a test mode; writing the generated calibration data after calibration into the OTP area of the non-volatile memory;
and the response analysis module is used for sending a feedback signal when the verification result is that the trimming data is consistent with the data written into the nonvolatile memory at the previous time.
6. The test calibration circuit for nonvolatile memory as in claim 5, wherein the test module comprises: the device comprises a parameter automatic adjusting module, a register group and a memory control module;
the memory control module is used for writing or reading trimming data into the OTP area of the nonvolatile memory according to the working mode and loading the trimming data read from the OTP area into the register group;
the parameter automatic adjustment module comprises a verification unit, and the verification unit can verify whether the trimming data is consistent with the data written into the non-volatile memory in the previous time in a user mode and output a verification result.
7. The test and calibration circuit of claim 6, wherein the verification unit comprises a positive-negative value comparison unit;
the positive and negative value comparison unit is used for comparing the trimming data with the negative value of the trimming data; and when the trimming data is matched with the inverse value, determining that the trimming data is consistent with the data written into the non-volatile memory at the previous time.
8. The test calibration circuit for nonvolatile memory as in claim 6, wherein the parameter auto-tuning module further comprises a calibration unit;
the calibration unit is used for calibrating the trimming data in a test mode to generate calibration data, and writing the calibration data into an OTP (one time programmable) area of the nonvolatile memory.
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