CN110750375B - Embedded equipment and abnormal information processing method thereof - Google Patents
Embedded equipment and abnormal information processing method thereof Download PDFInfo
- Publication number
- CN110750375B CN110750375B CN201910641477.0A CN201910641477A CN110750375B CN 110750375 B CN110750375 B CN 110750375B CN 201910641477 A CN201910641477 A CN 201910641477A CN 110750375 B CN110750375 B CN 110750375B
- Authority
- CN
- China
- Prior art keywords
- information
- abnormal
- memory
- abnormal information
- processor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
- G06F11/0721—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU]
- G06F11/0724—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU] in a multiprocessor or a multi-core unit
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0766—Error or fault reporting or storing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0793—Remedial or corrective actions
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Debugging And Monitoring (AREA)
- Retry When Errors Occur (AREA)
Abstract
The invention provides an embedded device and an abnormal information processing method thereof, wherein the abnormal information processing method comprises the following steps: when the system is abnormal, calling a driving program of a driving layer to acquire abnormal information of the system, and storing the abnormal information into an abnormal information storage area on a memory; the control processor is restarted, and after the restarting of the processor is completed, the abnormal information is read from the abnormal information storage area of the memory and is stored into the file system area of the memory. According to the technical scheme provided by the invention, when the system is abnormal, the abnormal information is stored in the memory by adopting the driving program of the driving layer, so that the memory is not affected even if the system is abnormal, and the problem that the embedded equipment in the prior art cannot record the abnormal information due to the abnormal system is solved.
Description
Technical Field
The invention belongs to the technical field of embedded equipment abnormal information processing, and particularly relates to embedded equipment and an abnormal information processing method thereof.
Background
The embedded device inevitably has defects in hardware or software, and during the operation of the embedded device, due to the presence of the defects or due to the influence of environmental factors, an abnormality or even a crash is likely to occur.
In order to reduce defects of the embedded equipment, when the embedded equipment is recorded to be abnormal, the abnormal information generation log is required to be recorded, so that basis is provided for searching and discharging of abnormal reasons. But in some special cases, such as when an exception to the file system is caused by a system exception, the embedded device will not be able to log, or the log recorded will be cluttered.
Disclosure of Invention
The invention aims to provide an embedded device which is used for solving the problem that the embedded device in the prior art cannot record the abnormal information of the embedded device due to the abnormal system; the invention also provides an abnormal information processing method of the embedded equipment, which is used for solving the problem that the embedded equipment in the prior art cannot record the abnormal information due to system abnormality.
In order to achieve the above purpose, the technical scheme provided by the invention is as follows:
an anomaly information processing method of an embedded device includes the following steps:
when the system is abnormal, calling a driving program of a driving layer to acquire abnormal information of the system, and storing the abnormal information into an abnormal information storage area on a memory;
the control processor is restarted, and after the restarting of the processor is completed, the abnormal information is read from the abnormal information storage area of the memory and is stored into the file system area of the memory;
the abnormal information storage area is an area on the memory for storing abnormal information of a system, and the file system area is an area on the memory for storing data required by the embedded equipment during working.
According to the technical scheme provided by the invention, when the system application is abnormal, the abnormal information is stored in the memory by adopting the driving program of the driving layer, so that even if the system is abnormal, the abnormal information cannot be influenced, and the problem that the embedded equipment cannot record the abnormal information due to the abnormal system in the prior art is solved.
Further, when the system is abnormal, the abnormal information is acquired through the task stack of the system.
The abnormal information is acquired through the task stack of the system, and the acquisition method is simple, convenient and accurate.
Further, after the abnormal information of the system is obtained, the abnormal information is packaged, the packaged abnormal information comprises head information, and the head information comprises an abnormal information mark, an abnormal information type, an abnormal information length and an abnormal information recording time of the abnormal information.
The abnormal information can be conveniently read by packing the abnormal information and adding the head information.
Further, if the processor of the embedded device is a multi-core processor, after the abnormal information of the system is obtained when the system is abnormal, the interrupt of the current core processor is closed, and the operation of other core processors is closed.
For the multi-core processor, the abnormal information processing can be performed by only ensuring the operation of the current core processor when the abnormal information of the system is processed, so that the waste of electric energy can be reduced by closing other core processors.
The embedded equipment comprises a processor and a memory with a power-down maintaining function, wherein the memory is connected with the processor, an abnormal information storage area for storing abnormal information of a system and a file system area for storing data required by the operation of the embedded equipment are arranged on the memory, and the processor is used for executing the following abnormal information processing method:
when the system is abnormal, calling a driving program of a driving layer to acquire abnormal information of the system, and storing the abnormal information into an abnormal information storage area on a memory;
the control processor is restarted, and after the restarting of the processor is completed, the abnormal information is read from the abnormal information storage area of the memory and is stored into the file system area of the memory;
the abnormal information storage area is an area on the memory for storing abnormal information of a system, and the file system area is an area on the memory for storing data required by the embedded equipment during working.
According to the technical scheme provided by the invention, when the system application is abnormal, the abnormal information is stored in the memory by adopting the driving program of the driving layer, so that even if the system is abnormal, the abnormal information cannot be influenced, and the problem that the embedded equipment cannot record the abnormal information due to the abnormal system in the prior art is solved.
Further, when the system is abnormal, the abnormal information is acquired through the task stack of the system.
The abnormal information is acquired through the task stack of the system, and the acquisition method is simple, convenient and accurate.
Further, after the abnormal information of the system is obtained, the abnormal information is packaged, the packaged abnormal information comprises head information, and the head information comprises an abnormal information mark, an abnormal information type, an abnormal information length and an abnormal information recording time of the abnormal information.
The head information is added to the abnormal information when the abnormal information is stored, so that the abnormal information can be conveniently read.
Further, if the processor of the embedded device is a multi-core processor, after the abnormal information of the system is obtained when the system is abnormal, the interrupt of the current core processor is closed, and the operation of other core processors is closed.
For the multi-core processor, the abnormal information processing can be performed by only ensuring the operation of the current core processor when the abnormal information of the system is processed, so that the waste of electric energy can be reduced by closing other core processors.
Further, the memory comprises at least one Flash chip.
The Flash chip is used as a memory, so that the speed of processing abnormal information of the system can be increased.
Drawings
FIG. 1 is a schematic diagram of an embedded device and an anomaly information processing method thereof in an embodiment of the embedded device according to the present invention;
FIG. 2 is a flowchart of recording anomaly information in an embodiment of an embedded device of the present invention;
FIG. 3 is an illustration of exception information after header information is added in an embodiment of an embedded device of the present invention;
FIG. 4 is a flowchart of reading exception information in an embodiment of an embedded device of the present invention.
Detailed Description
The technical scheme of the invention is further described below with reference to the specific embodiments.
Embedded device embodiment:
the embodiment provides an embedded device, which comprises a processor and a memory, as shown in fig. 1, wherein the memory in the embodiment adopts a Flash chip with a power-down maintaining function, a file system area and an abnormal information storage area are arranged on the Flash chip, wherein the file system area stores data required by the embedded device during operation, and when a system is abnormal, abnormal information is recorded in the abnormal information storage area, so that the problem that the embedded device cannot record the abnormal information due to the abnormal system is solved.
The process of processing the abnormal information by the embedded device provided in this embodiment includes two parts, namely recording the abnormal information and reading the abnormal information, and the processing process is described below with reference to fig. 2, 3 and 4.
The flow of recording the exception information of the embedded device provided in this embodiment is shown in fig. 2, and when the system is abnormal, the exception includes a system service exception, an application exception, a watchdog reset, and the like, firstly, the exception information is obtained through a task stack of the system, and the interrupt of the current processor is closed; because the embedded device provided by the embodiment adopts the multi-core processor, after the system abnormality occurs, the interrupt of the current core processor is closed, the operation of other core processors is also closed, and only the current core processor is kept to work continuously; and then, the obtained abnormal information is packed to form a data frame, and then, a driving program of a driving layer is called, and the packed abnormal information is written into an abnormal information storage area of the Flash chip.
The data frame packed by the anomaly information is shown in fig. 3, and the data frame includes a frame header and data Msg. The frame header includes an abnormality information flag, an abnormality information type, an abnormality information length, and a recording time corresponding to the abnormality information.
The abnormal information mark is expressed by Flag and is used for identifying whether the corresponding abnormal information is valid, if so, the abnormal information mark is set to be 1, otherwise, the abnormal information mark is set to be 0;
the TYPE of the abnormal information is represented by TYPE, and is used for representing the TYPEs of the abnormal information of the pair, such as system abnormality, watchdog information and the like, which have different information TYPEs;
the length of the abnormal information is represented by LEN, and is used for recording the length of the abnormal information of the pair, wherein the length of the abnormal information does not comprise the length of the head information;
the abnormal information recording TIME is expressed by TIME and is used for recording the occurrence TIME of the abnormal information;
the data Msg represents the acquired abnormality information.
When the processor acquires the abnormal information in the system, acquiring the type, the length and the acquisition time of the abnormal information, setting an abnormal information mark of the head information of the abnormal information as 1, setting the type of the abnormal information as the type of the abnormal information, setting the length of the abnormal information as the length of the abnormal information, setting the recording time of the abnormal information as the recording time of the abnormal information, and recording the abnormal information into the Msg.
And after the abnormal information is packed into a data frame and stored in an abnormal information storage area of the Flash chip, the processor of the embedded device is controlled to restart.
When the system is abnormal, the normal operation of the driver layer program is not affected, so that the abnormal information is written into the abnormal information storage area of the Flash chip through the driver layer driver in a calling mode, and the abnormal information can be stored into the abnormal information storage area without being affected by the abnormality of the application layer. The driver is a read-write driver of the Flash chip and is used for reading data from a task stack related to abnormality and writing the data into an abnormality information storage area of the Flash chip.
After restarting the processor of the embedded device, reading the abnormal information, wherein the reading process is as shown in fig. 4:
after restarting the processor, the processor scans the abnormal information storage area of the Flash chip, for example, starts scanning from a starting address, and reads head information in the abnormal information stored in the abnormal information storage area; if the abnormal information mark in the head information is 0, judging that the abnormal information is invalid information; no processing is performed on the abnormal information; if the abnormality information flag of the abnormality information header information is 1, judging as effective information, acquiring the type of the abnormality information from the abnormality information type in the header information, acquiring the length of the abnormality information from the abnormality information length of the abnormality information header information, acquiring the occurrence time of the abnormality information from the abnormality information recording time of the abnormality information header information, then reading the abnormality information according to the type and the length of the abnormality information, and storing the abnormality information and the occurrence time of the abnormality information in a file system area of a Flash chip and generating a log for the user to refer. After one piece of information is stored, the read pointer is shifted to the frame head of the next piece of abnormal information until all pieces of abnormal information stored in the abnormal information storage area are read. After the processor reads the abnormality information stored in the abnormality information storage area, the abnormality information flag in the header information of the abnormality information is set to 0.
The memory in this embodiment includes only one Flash chip, and as other embodiments, a plurality of Flash chips may be provided to form a memory, where one or more Flash chips are used to store abnormal information, as an abnormal storage area of the entire memory, and other one or more Flash chips are used in a file system.
In this embodiment, the memory is a Flash chip, and as other embodiments, other memories with a power-down holding function may be used.
Method embodiment:
the present embodiment provides an anomaly information processing method for an embedded device, which includes two parts, namely recording anomaly information and reading anomaly information, and is the same as the anomaly information processing method in the embodiment of the embedded device, and the processing method has been described in detail in the embodiment of the embedded device, and is not described here.
It will be appreciated by those skilled in the art that embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
Finally, it should be noted that: the above embodiments are only for illustrating the technical aspects of the present invention and not for limiting the same, and although the present invention has been described in detail with reference to the above embodiments, it should be understood by those of ordinary skill in the art that: modifications and equivalents may be made to the specific embodiments of the invention without departing from the spirit and scope of the invention, which is intended to be covered by the claims.
Claims (7)
1. An abnormality information processing method of an embedded device, characterized by comprising the steps of:
when the system application layer is abnormal, the processor packages the obtained abnormal information into a data frame, calls a driving program of the driving layer to obtain the abnormal information of the system, and stores the abnormal information into an abnormal information storage area on the memory; the anomalies include system service anomalies, application anomalies, and watchdog resets; the driver is a read-write driver of the memory and is used for reading data from a task stack related to abnormality and writing the data into an abnormality information storage area on the memory;
the control processor is restarted, and after the restarting of the processor is completed, the abnormal information is read from the abnormal information storage area of the memory and is stored into the file system area of the memory;
the abnormal information storage area is an area on the memory for storing abnormal information of a system, and the file system area is an area on the memory for storing data required by the embedded equipment during working.
2. The abnormality information processing method of an embedded device according to claim 1, characterized in that after obtaining abnormality information of a system, the abnormality information is packed, the packed abnormality information includes header information including an abnormality information flag, an abnormality information type, an abnormality information length, and an abnormality information recording time of the abnormality information.
3. The method for processing exception information of an embedded device according to claim 1, wherein if the processor of the embedded device is a multi-core processor, after obtaining exception information of the system when the system is abnormal, the interrupt of the current core processor is turned off, and the operations of other core processors are turned off.
4. The embedded equipment comprises a processor and a memory with a power-down maintaining function, wherein the memory is connected with the processor, and is characterized in that an abnormal information storage area for storing abnormal information of a system and a file system area for storing data required by the operation of the embedded equipment are arranged on the memory, and the processor is used for executing the following abnormal information processing method:
when the system application layer is abnormal, the processor packages the obtained abnormal information into a data frame, calls a driving program of the driving layer to obtain the abnormal information of the system, and stores the abnormal information into an abnormal information storage area on the memory; the anomalies include system service anomalies, application anomalies, and watchdog resets; the driver is a read-write driver of the memory and is used for reading data from a task stack related to abnormality and writing the data into an abnormality information storage area on the memory;
the control processor is restarted, and after the restarting of the processor is completed, the abnormal information is read from the abnormal information storage area of the memory and is stored into the file system area of the memory;
the abnormal information storage area is an area on the memory for storing abnormal information of a system, and the file system area is an area on the memory for storing data required by the embedded equipment during working.
5. The embedded device of claim 4, wherein the system's anomaly information is obtained and packaged, the packaged anomaly information including header information including an anomaly information tag, an anomaly information type, an anomaly information length, and an anomaly information recording time of the anomaly information.
6. The embedded device of claim 4, wherein if the processor of the embedded device is a multi-core processor, after obtaining exception information of the system when the system is abnormal, shutting down interrupts of a current core processor and shutting down operations of other core processors.
7. The embedded device of claim 4, wherein the memory comprises at least one Flash chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910641477.0A CN110750375B (en) | 2019-07-16 | 2019-07-16 | Embedded equipment and abnormal information processing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910641477.0A CN110750375B (en) | 2019-07-16 | 2019-07-16 | Embedded equipment and abnormal information processing method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN110750375A CN110750375A (en) | 2020-02-04 |
| CN110750375B true CN110750375B (en) | 2023-07-21 |
Family
ID=69275805
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910641477.0A Active CN110750375B (en) | 2019-07-16 | 2019-07-16 | Embedded equipment and abnormal information processing method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110750375B (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107357666A (en) * | 2017-06-26 | 2017-11-17 | 西安微电子技术研究所 | A kind of multi-core parallel concurrent system processing method based on hardware protection |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9239743B2 (en) * | 2012-10-11 | 2016-01-19 | Ittiam Systems (P) Ltd. | Method and architecture for exception and event management in an embedded software system |
| JP6287055B2 (en) * | 2013-10-24 | 2018-03-07 | 富士通株式会社 | Information processing apparatus, information collection method, and information collection program |
| CN105183576B (en) * | 2015-09-21 | 2018-02-13 | 上海斐讯数据通信技术有限公司 | The method and system of abnormal information is collected after a kind of collapse for embedded OLT |
| CN106682162B (en) * | 2016-12-26 | 2021-03-09 | 浙江宇视科技有限公司 | Log management method and device |
| CN107704356B (en) * | 2017-06-12 | 2019-06-28 | 平安科技（深圳）有限公司 | Exception stack information acquisition method, device and computer readable storage medium |
| CN108363659B (en) * | 2018-02-23 | 2021-06-29 | 青岛海信移动通信技术股份有限公司 | Method and device for processing abnormity of electronic equipment |
-
2019
- 2019-07-16 CN CN201910641477.0A patent/CN110750375B/en active Active
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107357666A (en) * | 2017-06-26 | 2017-11-17 | 西安微电子技术研究所 | A kind of multi-core parallel concurrent system processing method based on hardware protection |
Non-Patent Citations (1)
| Title |
|---|
| 基于堆栈回溯的异常处理;朱剑锋;缪万胜;康介祥;;计算机工程与设计(第12期);全文 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN110750375A (en) | 2020-02-04 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US8245195B2 (en) | System and method for debugging a computer program | |
| CN101101794B (en) | Memory testing | |
| CN102968353A (en) | Fail address processing method and fail address processing device | |
| CN110704236B (en) | On-line checking method for chip flash data and computer storage medium | |
| CN106201900A (en) | Interrupt the method for flash memory clear program, controller and storage device | |
| CN104216771A (en) | Restarting method and device for software program | |
| CN114371814B (en) | Data processing method and device and solid state disk | |
| CN109542341B (en) | Read-write IO monitoring method, device, terminal and computer readable storage medium | |
| CN110750375B (en) | Embedded equipment and abnormal information processing method thereof | |
| CN103019865B (en) | Virtual machine monitoring method and system | |
| JP2010102454A (en) | Information processing apparatus and information processing program | |
| US7085086B2 (en) | Apparatus and method for reducing errors in writing to a storage medium | |
| CN103123603B (en) | The method of debug system and the operation of execution debug system | |
| CN103440181A (en) | Method and system for modifying files | |
| CN104239201A (en) | Memory read-write monitoring method in flexible single-step system | |
| CN111813748B (en) | File system mounting method and device, electronic equipment and storage medium | |
| EP3159756A1 (en) | Method of debugging a plc program by using a general-purpose microprocessor | |
| CN106095631B (en) | Multi-cycle non-pipeline CPU dynamic debugging method based on finite state machine | |
| CN111143182B (en) | Analysis method, device and storage medium for process behavior | |
| CN109508446B (en) | Log processing method and device | |
| CN110795421A (en) | Method for preventing dirty data from being generated | |
| CN116701042B (en) | Memory data retention method, retention device and related equipment | |
| CN105389234A (en) | Hardware detection method and apparatus | |
| CN101477489B (en) | Method, apparatus and system for preserving operating system information | |
| US20070179635A1 (en) | Method and article of manufacure to persistently deconfigure connected elements |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |