CN110750375A - Embedded equipment and abnormal information processing method thereof - Google Patents

Embedded equipment and abnormal information processing method thereof Download PDF

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Publication number
CN110750375A
CN110750375A CN201910641477.0A CN201910641477A CN110750375A CN 110750375 A CN110750375 A CN 110750375A CN 201910641477 A CN201910641477 A CN 201910641477A CN 110750375 A CN110750375 A CN 110750375A
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China
Prior art keywords
abnormal information
information
abnormal
memory
exception
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Granted
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CN201910641477.0A
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CN110750375B (en
Inventor
宋彦锋
沈沉
杨芳
陈献庆
徐云松
张荣良
许英豪
许美椿
信亚磊
牛勇永
刘一涛
孔剑虹
朱钰
郑志勤
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State Grid Corp of China SGCC
Xuji Group Co Ltd
XJ Electric Co Ltd
Electric Power Research Institute of State Grid Liaoning Electric Power Co Ltd
Xuchang XJ Software Technology Co Ltd
Original Assignee
State Grid Corp of China SGCC
Xuji Group Co Ltd
XJ Electric Co Ltd
Electric Power Research Institute of State Grid Liaoning Electric Power Co Ltd
Xuchang XJ Software Technology Co Ltd
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Publication of CN110750375A publication Critical patent/CN110750375A/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0721Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU]
    • G06F11/0724Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU] in a multiprocessor or a multi-core unit
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0766Error or fault reporting or storing
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0793Remedial or corrective actions
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

The invention provides an embedded device and an abnormal information processing method thereof, wherein the abnormal information processing method comprises the following steps: when the system is abnormal, calling a driving program of a driving layer to acquire abnormal information of the system and storing the abnormal information into an abnormal information storage area on a memory; and controlling the processor to restart, reading the abnormal information from the abnormal information storage area of the memory after the processor is restarted, and storing the abnormal information into the file system area of the memory. According to the technical scheme provided by the invention, when the system is abnormal, the abnormal information is stored in the memory by adopting the driving program of the driving layer, so that the storage of the system cannot be influenced even if the system is abnormal, and the problem that the embedded equipment cannot record the abnormal information due to the system abnormality in the prior art is solved.

Description

Embedded equipment and abnormal information processing method thereof
Technical Field
The invention belongs to the technical field of embedded equipment abnormal information processing, and particularly relates to embedded equipment and an abnormal information processing method thereof.
Background
The embedded device has inevitable defects of hardware or software, and during the running process of the embedded device, due to the existence of the defects or due to the influence of environmental factors, the embedded device is likely to be abnormal or even crash.
In order to reduce the defects of the embedded device, when the embedded device is recorded to be abnormal, the abnormal information of the embedded device needs to be recorded to generate a log, so that a basis is provided for searching and discharging the abnormal reason. However, in some special cases, such as when the file system is abnormal due to a system abnormality, the embedded device will not be able to log, or the log is recorded in a mess.
Disclosure of Invention
The invention aims to provide an embedded device, which is used for solving the problem that the embedded device in the prior art cannot record abnormal information due to system abnormality; the method is used for solving the problem that the embedded equipment in the prior art cannot record the abnormal information of the embedded equipment due to system abnormity.
In order to achieve the purpose, the technical scheme provided by the invention is as follows:
an abnormal information processing method of an embedded device comprises the following steps:
when the system is abnormal, calling a driving program of a driving layer to acquire abnormal information of the system and storing the abnormal information into an abnormal information storage area on a memory;
controlling the processor to restart, reading the abnormal information from the abnormal information storage area of the memory after the processor is restarted, and storing the abnormal information into the file system area of the memory;
the abnormal information storage area is an area used for storing the abnormal information of the system on the memory, and the file system area is an area used for storing data required by the embedded equipment during working on the memory.
According to the technical scheme provided by the invention, when the system application is abnormal, the abnormal information is stored in the memory by adopting the driving program of the driving layer, so that the storage cannot be influenced even if the system is abnormal, and the problem that the embedded equipment cannot record the abnormal information due to the system abnormality in the prior art is solved.
Further, when the system is abnormal, the abnormal information is obtained through the task stack of the system.
The abnormal information is obtained through the task stack of the system, and the obtaining method is simple, convenient and accurate.
Further, the system packages the abnormal information after acquiring the abnormal information, and the packaged abnormal information includes header information, where the header information includes an abnormal information flag, an abnormal information type, an abnormal information length, and an abnormal information recording time of the abnormal information.
The abnormal information is packaged and the header information is added, so that the abnormal information can be conveniently read.
Further, if the processor of the embedded device is a multi-core processor, the interrupt of the current core processor is closed and the operation of other core processors is closed after the abnormal information of the system is acquired when the system is abnormal.
For the multi-core processor, when processing the abnormal information of the system, the abnormal information processing can be carried out only by ensuring the current core processor to run, so that the waste of electric energy can be reduced by closing other core processors.
An embedded device comprises a processor and a memory which is connected with the processor and has a power-down maintaining function, wherein an abnormal information storage area used for storing abnormal information of a system and a file system area used for storing data required by the embedded device during working are arranged on the memory, and the processor is used for executing the following abnormal information processing method:
when the system is abnormal, calling a driving program of a driving layer to acquire abnormal information of the system and storing the abnormal information into an abnormal information storage area on a memory;
controlling the processor to restart, reading the abnormal information from the abnormal information storage area of the memory after the processor is restarted, and storing the abnormal information into the file system area of the memory;
the abnormal information storage area is an area used for storing the abnormal information of the system on the memory, and the file system area is an area used for storing data required by the embedded equipment during working on the memory.
According to the technical scheme provided by the invention, when the system application is abnormal, the abnormal information is stored in the memory by adopting the driving program of the driving layer, so that the storage cannot be influenced even if the system is abnormal, and the problem that the embedded equipment cannot record the abnormal information due to the system abnormality in the prior art is solved.
Further, when the system is abnormal, the abnormal information is obtained through the task stack of the system.
The abnormal information is obtained through the task stack of the system, and the obtaining method is simple, convenient and accurate.
Further, the system packages the abnormal information after acquiring the abnormal information, and the packaged abnormal information includes header information, where the header information includes an abnormal information flag, an abnormal information type, an abnormal information length, and an abnormal information recording time of the abnormal information.
When the abnormal information is stored, the head information is added to the abnormal information, so that the abnormal information can be conveniently read.
Further, if the processor of the embedded device is a multi-core processor, the interrupt of the current core processor is closed and the operation of other core processors is closed after the abnormal information of the system is acquired when the system is abnormal.
For the multi-core processor, when processing the abnormal information of the system, the abnormal information processing can be carried out only by ensuring the current core processor to run, so that the waste of electric energy can be reduced by closing other core processors.
Further, the memory comprises at least one Flash chip.
The Flash chip is used as a memory, so that the speed of processing abnormal information of the system can be increased.
Drawings
Fig. 1 is a schematic diagram of an embedded device and an abnormal information processing method thereof according to an embodiment of the embedded device of the present invention;
FIG. 2 is a flowchart of recording exception information in an embodiment of an embedded device according to the present invention;
FIG. 3 is a diagram illustrating exception information after header information is added in an embodiment of an embedded device according to the present invention;
FIG. 4 is a flowchart illustrating reading exception information in an embodiment of an embedded device according to the present invention.
Detailed Description
The technical solution of the present invention will be further explained with reference to the specific embodiments.
The embodiment of the embedded device comprises:
the embodiment provides an embedded device, which comprises a processor and a memory, as shown in fig. 1, the memory in the embodiment adopts a Flash chip with a power-down holding function, the Flash chip is provided with a file system area and an abnormal information storage area, the file system area stores data required by the embedded device during operation, and when the system is abnormal, the abnormal information is recorded in the abnormal information storage area, so that the problem that the embedded device cannot record the abnormal information due to the system abnormality is solved.
The embedded device provided in this embodiment processes exception information, which is described below with reference to fig. 2, fig. 3, and fig. 4, and includes two parts, namely, recording exception information and reading exception information.
The flow of recording exception information of the embedded device provided by this embodiment is as shown in fig. 2, when an exception occurs in a system, where the exception includes a system service exception, an application exception, a watchdog reset, and the like, first, the exception information is obtained through a task stack of the system, and an interrupt of a current processor is closed; because the embedded device provided by the embodiment adopts the multi-core processor, after the system exception occurs, the interrupt of the current core processor is closed, the operation of other core processors is also closed, and only the current core processor is kept to continue working; and then packaging the acquired abnormal information to form a data frame, calling a driving program of a driving layer, and writing the packaged abnormal information into an abnormal information storage area of the Flash chip.
The data frame packed with the exception information is shown in fig. 3, and includes a header Head and data Msg. The header Head includes an abnormal information flag corresponding to the abnormal information, an abnormal information type, an abnormal information length, and a recording time.
The abnormal information Flag is represented by Flag and is used for identifying whether the corresponding abnormal information is valid or not, if so, the abnormal information Flag is set to be 1, otherwise, the abnormal information Flag is set to be 0;
the TYPE of the abnormal information is represented by TYPE, and is used for representing the TYPE of the abnormal information, such as system abnormality, watchdog information and the like, which have different information TYPEs;
the length of the abnormal information is expressed by LEN and is used for recording the length of the abnormal information of the pair, and the length of the abnormal information does not include the length of the head information of the abnormal information;
the abnormal information recording TIME is represented by TIME and is used for recording the TIME of the occurrence of the abnormal information;
the data Msg indicates the acquired abnormality information.
When the processor acquires the abnormal information in the system, acquiring the type, the length and the acquisition time of the abnormal information, then setting the abnormal information flag of the header information of the abnormal information to be 1, setting the type of the abnormal information to be the type of the abnormal information, setting the length of the abnormal information to be the length of the abnormal information, setting the recording time of the abnormal information to be the recording time of the abnormal information, and recording the abnormal information into the Msg.
And packaging the abnormal information into a data frame and storing the data frame in an abnormal information storage area of the Flash chip, and controlling the processor of the embedded equipment to restart.
When the system is abnormal, the normal operation of the driver layer program cannot be influenced, so that the abnormal information is written into the abnormal information storage area of the Flash chip through the driver program of the driver layer in a calling mode, and the abnormal information can be stored into the abnormal information storage area without being influenced by the abnormality of the application layer. The driver is a read-write driver of the Flash chip and is used for reading data from the task stack related to the abnormality and writing the data into the abnormal information storage area of the Flash chip.
The processor of the embedded device reads the abnormal information after restarting, and the reading process is as shown in fig. 4:
when the processor is restarted, the processor scans an abnormal information storage area of the Flash chip, for example, scanning is started from an initial address, and head information in the abnormal information stored in the abnormal information storage area is read; if the abnormal information mark in the head information is 0, judging that the abnormal information is invalid information; the exception information is not processed; if the abnormal information mark of the abnormal information header information is 1, the abnormal information is judged to be valid information, the type of the abnormal information is obtained from the abnormal information type in the header information, the length of the abnormal information is obtained from the abnormal information length of the abnormal information header information, the occurrence time of the abnormal information is obtained from the abnormal information recording time of the abnormal information header information, then the abnormal information is read according to the type and the length of the abnormal information, and the abnormal information and the occurrence time of the abnormal information are stored in a file system area of a Flash chip and a log is generated so as to be convenient for a user to refer. After storing one piece of information, the reading pointer is shifted to the frame head of the next abnormal information until all the abnormal information stored in the abnormal information storage area is read. After the processor reads the abnormal information stored in the abnormal information storage area, the abnormal information flag in the header information of the abnormal information is set to 0.
The memory in this embodiment includes only one Flash chip, and as another embodiment, a plurality of Flash chips may be provided to form a memory, where one or more Flash chips are used to store exception information and serve as an exception storage area of the entire memory, and one or more other Flash chips are used in a file system.
In this embodiment, the memory is a Flash chip, and as another embodiment, other memories with a power-down retention function may be used.
The method comprises the following steps:
the embodiment provides an exception information processing method for an embedded device, which includes two parts of recording exception information and reading exception information, and the processing method is the same as the exception information processing method in the embodiment of the embedded device, and is described in detail in the embodiment of the embedded device, and will not be described here.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solutions of the present invention and not for limiting the same, and although the present invention is described in detail with reference to the above embodiments, those of ordinary skill in the art should understand that: modifications and equivalents may be made to the embodiments of the invention without departing from the spirit and scope of the invention, which is to be covered by the claims.

Claims (9)

1. An abnormal information processing method of an embedded device is characterized by comprising the following steps:
when the system is abnormal, calling a driving program of a driving layer to acquire abnormal information of the system and storing the abnormal information into an abnormal information storage area on a memory;
controlling the processor to restart, reading the abnormal information from the abnormal information storage area of the memory after the processor is restarted, and storing the abnormal information into the file system area of the memory;
the abnormal information storage area is an area used for storing the abnormal information of the system on the memory, and the file system area is an area used for storing data required by the embedded equipment during working on the memory.
2. The method for processing exception information for embedded device according to claim 1, wherein when an exception occurs in the system, the exception information is obtained through a task stack of the system.
3. The method for processing the abnormal information of the embedded device according to claim 1, wherein the abnormal information of the system is obtained and then packaged, and the packaged abnormal information includes header information, and the header information includes an abnormal information flag, an abnormal information type, an abnormal information length, and an abnormal information recording time of the abnormal information.
4. The method according to claim 1, wherein if the processor of the embedded device is a multi-core processor, the interrupt of the current core processor is closed and the operations of the other core processors are closed after the exception information of the system is acquired when the system is in an exception.
5. An embedded device comprises a processor and a memory which is connected with the processor and has a power-down maintaining function, wherein the memory is provided with an abnormal information storage area for storing abnormal information of a system and a file system area for storing data required by the embedded device during working, and the processor is used for executing the following abnormal information processing method:
when the system is abnormal, calling a driving program of a driving layer to acquire abnormal information of the system and storing the abnormal information into an abnormal information storage area on a memory;
controlling the processor to restart, reading the abnormal information from the abnormal information storage area of the memory after the processor is restarted, and storing the abnormal information into the file system area of the memory;
the abnormal information storage area is an area used for storing the abnormal information of the system on the memory, and the file system area is an area used for storing data required by the embedded equipment during working on the memory.
6. The embedded device according to claim 5, wherein when an exception occurs in the system, the exception information is obtained through a task stack of the system.
7. The embedded device of claim 5, wherein the exception information of the system is obtained and then packaged, and the packaged exception information includes header information, and the header information includes an exception flag, an exception type, an exception length, and an exception recording time of the exception information.
8. The embedded device according to claim 5, wherein if the processor of the embedded device is a multi-core processor, the interrupt of the current core processor is closed and the operations of the other core processors are closed after the exception information of the system is acquired when the system is in an exception.
9. The embedded device of claim 5, wherein the memory comprises at least one Flash chip.
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