CN110750216A - Hard disk type configuration method and die - Google Patents
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- CN110750216A CN110750216A CN201910983367.2A CN201910983367A CN110750216A CN 110750216 A CN110750216 A CN 110750216A CN 201910983367 A CN201910983367 A CN 201910983367A CN 110750216 A CN110750216 A CN 110750216A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0629—Configuration or reconfiguration of storage systems
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
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Abstract
The embodiment of the invention discloses a hard disk type configuration method and a die, wherein the method comprises the following steps: the method comprises the steps that a controller in a hard disk type configuration die is connected through an I2C bus channel, identification pins of the hard disk type are set, and corresponding input/output (IO) pins are set to be in different states according to predefined hard disk types; the controller is communicated with a HOST HOST end, so that the HOST HOST end identifies the corresponding hard disk type by identifying the state of the corresponding input/output (IO) pin, and switches different hard disk types to configure and test the hard disk equipment of the corresponding type. The embodiment of the invention can switch different hard disk types through the I2C bus.
Description
Technical Field
The invention relates to a hard disk device technology, in particular to a hard disk type configuration method and a hard disk type configuration mold.
Background
With the improvement of the technological level and the rapid development of the internet industry, the demand and the day of people for data storage are greatly increased. The academic society continuously updates the transmission standard of the storage device, and various large hard disk manufacturers continuously release different types of hard disk products so as to meet the market demands. Currently, the mainstream types of hard disk devices are classified into three types, namely, Serial Advanced Technology Attachment (SATA) hard disks, Serial Attached SCSI (SAS) hard disks, and Non-Volatile Memory (NVME) hard disks. Different hard disk types have respective product advantages, and computer product designers need to select by combining performance and cost. As market demands are diversified, the design demands and the day by consumers for being compatible with different hard disk types are greatly increased. In 2017, the SFF committee of the industry organization introduced an SFF-8639 protocol standard connector capable of being compatible with three hard disk types of SATA/SAS/NVME at the same time. Since then, the computer industry, and particularly the server area, continues to have a variety of design products that simultaneously support a variety of different hard disk types.
For server products, the inserted hard disk type is identified first, and then different hard disk types are configured and resource distributed differently. Therefore, the tester needs to perform function tests on different hard disk types, and confirms that the product has normal functions on different hard disk types, which brings about a small challenge to the test.
In the existing technical scheme, in the test process, one hard disk slot can only be simultaneously inserted into one hard disk type. The tester firstly inserts a hard disk device, and the hard disk device is replaced after the test is finished, so that the operation is repeated until all the supported hard disk types are tested.
The existing test mode causes higher cost, a large amount of hard disk equipment is needed when batch test is carried out, and the supported types of the hard disk equipment need to complete functional test; the operation is complicated, and the hard disk needs to be replaced manually by a tester.
Disclosure of Invention
In order to solve the foregoing technical problems, embodiments of the present invention provide a method and a mold for configuring hard disk types, which can switch different hard disk types through an I2C bus, so as to implement configuration and testing of different types of hard disk devices.
In order to achieve the object of the present invention, in one aspect, an embodiment of the present invention provides a method for configuring a hard disk type, including:
the method comprises the steps that a controller in a hard disk type configuration die is connected through an I2C bus channel, identification pins of the hard disk type are set, and corresponding input/output (IO) pins are set to be in different states according to predefined hard disk types;
the controller is communicated with a HOST HOST end, so that the HOST HOST end identifies the corresponding hard disk type by identifying the state of the corresponding input/output (IO) pin, and switches different hard disk types to configure and test the hard disk equipment of the corresponding type.
Further, the method comprises:
the controller is a complex programmable logic device CPLD, the CPLD receives the HOST end configuration instruction through an I2C bus, and the hard disk type configuration is carried out through the corresponding input/output IO pin.
Further, the corresponding input/output IO pin includes:
and selecting three pins pin to respectively and correspondingly control the pin states so as to switch three hard disk types of SATA/SAS/NVME, wherein the SATA/SAS/NVME is a serial hard disk, a serial SCSI hard disk and a nonvolatile memory standard hard disk respectively.
Further, the pin status control comprises: and switching different combinations of the GND state and the Open state of the three pins pin respectively.
Further, the method comprises:
the CPLD configures a CPLD I2C bus address, and when the CPLD receives a first instruction, the hard disk type is an SAS or SATA type; and when a second instruction is received, the hard disk type is an NVME type.
On the other hand, an embodiment of the present invention further provides a hard disk type configuration mold, including:
the setting module is connected with a controller in a hard disk type configuration mould through an I2C bus channel, sets a hard disk type identification pin, and sets a corresponding input/output (IO) pin to be in different states according to a predefined hard disk type;
and the switching module is used for communicating the controller with a HOST HOST end so that the HOST HOST end identifies the corresponding hard disk type by identifying the state of the corresponding input/output (IO) pin, and switches different hard disk types to configure and test the hard disk equipment of the corresponding type.
Further, the configuring the mold includes:
the controller is a Complex Programmable Logic Device (CPLD) and is used for receiving the HOST end configuration instruction through an I2C bus and configuring the hard disk type through the corresponding input/output (IO) pin.
Further, the corresponding input/output IO pin includes:
and the three pins pin are respectively used for correspondingly controlling the pin states so as to switch three hard disk types of SATA/SAS/NVME, wherein the SATA/SAS/NVME is a serial hard disk, a serial SCSI hard disk and a nonvolatile memory standard hard disk respectively.
Further, the three pins pin are configured to:
and switching different combinations of the GND state and the Open state of the three pins pin respectively.
Further, the setup module is configured to:
the CPLD configures a CPLD I2C bus address, and when the CPLD receives a first instruction, the hard disk type is an SAS or SATA type; and when a second instruction is received, the hard disk type is an NVME type.
The embodiment of the invention connects a controller in a hard disk type configuration mould through an I2C bus channel, sets a hard disk type identification pin, and sets a corresponding input/output IO pin to be in different states according to a predefined hard disk type; the controller is communicated with a HOST HOST end, so that the HOST HOST end identifies the corresponding hard disk type by identifying the state of the corresponding input/output (IO) pin, and switches different hard disk types to configure and test the hard disk equipment of the corresponding type. The embodiment of the invention can switch different hard disk types through the I2C bus.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
Drawings
The accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the example serve to explain the principles of the invention and not to limit the invention.
FIG. 1 is a flow chart of a configuration method of hard disk types according to an embodiment of the present invention;
FIG. 2 is a block diagram of a hard disk mold design in a hard disk type configuration method according to an embodiment of the present invention;
fig. 3 is a schematic diagram of a CPLD circuit in the configuration method of the hard disk type according to the embodiment of the present invention;
fig. 4 is a drawing interface diagram in the configuration method of hard disk types according to the embodiment of the present invention;
fig. 5 is a schematic diagram of a hard disk configuration IO circuit in the hard disk type configuration method according to the embodiment of the present invention;
fig. 6 is a structural diagram of a hard disk type configuration mold according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail below with reference to the accompanying drawings. It should be noted that the embodiments and features of the embodiments in the present application may be arbitrarily combined with each other without conflict.
The steps illustrated in the flow charts of the figures may be performed in a computer system such as a set of computer-executable instructions. Also, while a logical order is shown in the flow diagrams, in some cases, the steps shown or described may be performed in an order different than here.
Fig. 1 is a flowchart of a configuration method of a hard disk type according to an embodiment of the present invention, and as shown in fig. 1, the method according to the embodiment of the present invention includes the following steps:
step 101: the method comprises the steps that a controller in a hard disk type configuration die is connected through an I2C bus channel, identification pins of the hard disk type are set, and corresponding input/output (IO) pins are set to be in different states according to predefined hard disk types;
the I2C bus is a simple, bi-directional two-wire synchronous serial bus developed by Philips.
Specifically, the embodiment of the invention describes a hard disk mold capable of configuring hard disk types through an I2C bus, and a tester can switch different hard disk types through an I2C bus. A tester can perform a hard disk type judgment test and a corresponding software and hardware resource allocation test through the die, and cannot perform a hard disk performance test. The hard disk performance test needs to be completed by adopting a product model object supported by design.
The embodiment of the invention connects a Controller (Controller) in a hard disk die through an I2C bus channel in the specification of an SFF-8639 protocol standard connector, and sets the identification pin of the hard disk type, thereby completing the configuration of the hard disk type.
Step 102: the controller is communicated with a HOST HOST end, so that the HOST HOST end identifies the corresponding hard disk type by identifying the state of the corresponding input/output (IO) pin, and switches different hard disk types to configure and test the hard disk equipment of the corresponding type.
For example, the grounds P10 and P4 in the corresponding IO pins are set to GND, and E6 is set to Open, at this time, the hard disk module is of an SAS/SATA type; wherein, SATA/SAS is serial hard disk and serial SCSI hard disk.
P10 and E6 are set to Open, P4 is set to GND, and the hard disk drive is in a Quad PCIE (NVME) type state. Wherein the NVME is a nonvolatile memory standard hard disk.
Further, the method comprises:
the controller is a Complex Programmable Logic Device (CPLD), and the CPLD receives the HOST configuration instruction through an I2C bus and configures the hard disk type through the corresponding input/output IO pin.
Further, the corresponding input/output IO pin includes:
and selecting three pins pin to respectively and correspondingly control the pin state so as to switch three hard disk types of SATA/SAS/NVME.
Further, the pin status control comprises: and switching different combinations of the GND state and the Open state of the three pins pin respectively.
Further, the method comprises:
the CPLD configures a CPLD I2C bus address, and when the CPLD receives a first instruction, the hard disk type is an SAS or SATA type; and when a second instruction is received, the hard disk type is an NVME type.
Specifically, a design block diagram of the hard disk mold in the embodiment of the present invention is shown in fig. 2:
the embodiment of the invention is based on the SFF-8639 protocol standard connector. The SFF committee promulgates a number of standards in tandem indicating that the 8639 connector can be compatible with a number of types of memory devices, and the identification of the memory devices is determined by the corresponding pin levels. The protocol specification is as shown in the following table:
| PRSNT# | IfDet# | IfDet2# | |
| P10 | P4 | E6 | Device Type Installed |
| Gnd | Gnd | Open | SAS/SATA |
| Gnd | Open | Open | Undefined |
| Open | Gnd | Open | Quad PCIe |
| Open | Open | Open | Bay Empty |
| Gnd | Gnd | Gnd | Undefined |
| Gnd | Open | Gnd | Undefined |
| Open | Gnd | Gnd | SFF-TA-1001 PCIe |
| Open | Open | Gnd | Gen-Z |
in the method of the embodiment of the invention, a complex programmable logic device CPLD is selected as a Controller, the CPLD is communicated with a HOST HOST end through an I2C bus channel, corresponding input and output IO are set to be in different states, and the HOST end can identify the corresponding hard disk type by identifying the state of a corresponding pin.
The method of the embodiment of the invention comprises the application of a CPLD power supply module and a CPLD IO module, and the following sub-modules illustrate specific implementation modes:
power supply of the CPLD:
the SFF-8639 protocol specifies P13/P14/P15 as 12V power pin (powerpin), P7/P8/P9 as 5Vpowerpin, and E3 as 3.3V powerpin. The voltage required by the CPLD is 3.3V, and 3.3V can be directly led out from a pin E3 to supply power for the CPLD. However, in order to ensure the normal function of the CPLD during the larger power consumption, the embodiment of the invention selects 12V as the dc DCDC voltage reduction circuit to provide a power supply scheme for the CPLD. Because 12V has 3 power supply pin feet to supply power, the device can support larger power consumption. The schematic diagram of the CPLD circuit is shown in fig. 3:
CPLD IO：
the CPLD needs to communicate with the HOST end through an I2C bus channel, receive a configuration instruction, and perform hard disk type configuration on configuration pins through IO. The IO pins to be led out are as follows:
the Joint Test Action Group (JTAG) IO pin includes: the test data input TDI, the test mode selection TMS, the test clock input TCK, the test data output TDO, the power interface P3V3 and the ground GND are used for burning CPLD codes, and the codes comprise I2C bus configuration logic and pin configuration logic. The CPLD end selects a CPLD fixed JTAG interface to be led out, and the drawing of the led-out interface is shown as figure 4.
The I2C bus pins include: the SFF-8639 protocol specifies that E23/E24 pin bits are SMBCLK and SMBDAT respectively, the SMBCLK and the SMBDAT are used for information interaction with a hard disk, and an I2CController and a pull-up resistor are usually designed at a HOST HOST end of a connector supporting the SFF-8639 protocol standard. The CPLD end of the hard disk mold can realize communication with the HOST end only by being configured to correspond to the I2C Controller.
The hard disk configuration IO pin comprises: the SFF-8639 protocol specifies that P10/P4/E6 sets pins for Device Type (Device Type), and the pin states are GND and Open. The CPLD has rich General-purpose input/output (GPIO) resources, and three pins are selected to respectively and correspondingly control the pin states. In order to facilitate the pin control of the CPLD and avoid the influence of IO configuration inside the CPLD on the pin configuration, the CMOS is selected for isolation and comprises the CMOS1, the CMOS2 and the CMOS3, when the CPLD outputs high level, the CMOS is conducted, and a corresponding pin of the connector is grounded; when the CPLD outputs low level, the CMOS is closed, and the corresponding pin of the connector is in an OPEN state. The schematic diagram of the hard disk configuration IO circuit is shown in fig. 5:
the following examples further illustrate the invention by way of specific embodiments:
the method provided by the embodiment of the invention is used for designing a hard disk mould, particularly a hard disk type configuration mould, and comprises the following implementation steps;
burning CPLD codes, and configuring the bus address of CPLD I2C as 0xE 2; when receiving the instruction 01, setting P10 and P4 as GND, and setting E6 as Open, wherein the hard disk die is of SAS/SATA type; when 02 is received, P10 and E6 are set to Open, P4 is set to GND, and the hard disk drive is in the Quad PCIE (NVME) state.
And the HOST end is accessed to test the connectivity and the performance.
According to the technical scheme of the embodiment of the invention, a hardware mould for configuring the hard disk type through the I2C bus can be designed according to the steps, and part of test work related to the hard disk can be completed at lower cost; the hard disk type can be configured through an I2C bus command, and the hard disk does not need to be replaced manually; the internal code of the die is controllable, and the code can be designed according to the test requirement.
Therefore, the embodiment of the invention realizes the configuration of the hard disk type, and particularly configures the hard disk type through the I2C bus.
It should be noted that the technical solution of the embodiment of the present invention can be extended to a hard disk high speed path, and complete switching of hard disk types can be completed by switching different high speed paths through an I2C bus.
Fig. 6 is a structural diagram of a hard disk type configuration mold according to an embodiment of the present invention, and as shown in fig. 6, another aspect of the hard disk type configuration mold according to the embodiment of the present invention includes:
the setting module 601 is connected with a controller in a hard disk type configuration die through an I2C bus channel, sets a hard disk type identification pin, and sets corresponding input/output (IO) pins to be in different states according to predefined hard disk types;
a switching module 602, configured to communicate between the controller and a HOST, so that the HOST identifies a corresponding hard disk type by identifying the state of the corresponding input/output IO pin, and switches between different hard disk types to configure and test a corresponding type of hard disk device.
Further, the configuring the mold includes:
the controller is a Complex Programmable Logic Device (CPLD) and is used for receiving the HOST end configuration instruction through an I2C bus and configuring the hard disk type through the corresponding input/output (IO) pin.
Further, the corresponding input/output IO pin includes:
and the three pins pin are respectively used for correspondingly controlling the pin states so as to switch three hard disk types of SATA/SAS/NVME, wherein the SATA/SAS/NVME is a serial hard disk, a serial SCSI hard disk and a nonvolatile memory standard hard disk respectively.
Further, the three pins pin are configured to:
and switching different combinations of the GND state and the Open state of the three pins pin respectively.
Further, the setting module 601 is configured to:
the CPLD configures a CPLD I2C bus address, and when the CPLD receives a first instruction, the hard disk type is an SAS or SATA type; and when a second instruction is received, the hard disk type is an NVME type.
In summary, in the embodiment of the present invention, the I2C bus channel is connected to the controller in the configuration mold of the hard disk type, the identification pin of the hard disk type is set, and the corresponding input/output IO pin is set to be in different states according to the predefined hard disk type; the controller is communicated with a HOST HOST end, so that the HOST HOST end identifies the corresponding hard disk type by identifying the state of the corresponding input/output (IO) pin, and switches different hard disk types to configure and test the hard disk equipment of the corresponding type. The embodiment of the invention can switch different hard disk types through the I2C bus.
Although the embodiments of the present invention have been described above, the above description is only for the convenience of understanding the present invention, and is not intended to limit the present invention. It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (10)
1. A hard disk type configuration method is characterized by comprising the following steps:
the method comprises the steps that a controller in a hard disk type configuration die is connected through an I2C bus channel, identification pins of the hard disk type are set, and corresponding input/output (IO) pins are set to be in different states according to predefined hard disk types;
the controller is communicated with a HOST HOST end, so that the HOST HOST end identifies the corresponding hard disk type by identifying the state of the corresponding input/output (IO) pin, and switches different hard disk types to configure and test the hard disk equipment of the corresponding type.
2. The method for configuring hard disk types according to claim 1, comprising:
the controller is a complex programmable logic device CPLD, the CPLD receives the HOST end configuration instruction through an I2C bus, and the hard disk type configuration is carried out through the corresponding input/output IO pin.
3. The method according to claim 2, wherein the corresponding IO pin comprises:
and selecting three pins pin to respectively and correspondingly control the pin states so as to switch three hard disk types of SATA/SAS/NVME, wherein the SATA/SAS/NVME is a serial hard disk, a serial SCSI hard disk and a nonvolatile memory standard hard disk respectively.
4. The method of claim 3, wherein the pin status control comprises: and switching different combinations of the GND state and the Open state of the three pins pin respectively.
5. The method for configuring hard disk types according to claim 4, comprising:
the CPLD configures a CPLD I2C bus address, and when the CPLD receives a first instruction, the hard disk type is an SAS or SATA type; and when a second instruction is received, the hard disk type is an NVME type.
6. A hard disk type configuration die, comprising:
the setting module is connected with a controller in a hard disk type configuration mould through an I2C bus channel, sets a hard disk type identification pin, and sets a corresponding input/output (IO) pin to be in different states according to a predefined hard disk type;
and the switching module is used for communicating the controller with a HOST HOST end so that the HOST HOST end identifies the corresponding hard disk type by identifying the state of the corresponding input/output (IO) pin, and switches different hard disk types to configure and test the hard disk equipment of the corresponding type.
7. The hard disk type configuration die of claim 6, comprising:
the controller is a Complex Programmable Logic Device (CPLD) and is used for receiving the HOST end configuration instruction through an I2C bus and configuring the hard disk type through the corresponding input/output (IO) pin.
8. The hard disk type configuration die of claim 7, wherein the corresponding input/output (IO) pin comprises:
and the three pins pin are respectively used for correspondingly controlling the pin states so as to switch three hard disk types of SATA/SAS/NVME, wherein the SATA/SAS/NVME is a serial hard disk, a serial SCSI hard disk and a nonvolatile memory standard hard disk respectively.
9. The hard disk type configuration die of claim 8, wherein the three pins pin are configured to:
and switching different combinations of the GND state and the Open state of the three pins pin respectively.
10. The hard disk type configuration die of claim 9, wherein the setup module is configured to:
the CPLD configures a CPLD I2C bus address, and when the CPLD receives a first instruction, the hard disk type is an SAS or SATA type; and when a second instruction is received, the hard disk type is an NVME type.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115061958A (en) * | 2022-07-05 | 2022-09-16 | 中国长城科技集团股份有限公司 | Hard disk identification method, identification system, storage medium and computer equipment |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN115061958A (en) * | 2022-07-05 | 2022-09-16 | 中国长城科技集团股份有限公司 | Hard disk identification method, identification system, storage medium and computer equipment |
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Application publication date: 20200204 |