CN103616937B - A kind of mainboard, PCIE network interface card and server system - Google Patents
A kind of mainboard, PCIE network interface card and server system Download PDFInfo
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Abstract
The invention discloses a kind of mainboard, PCIE network interface card and server system, the program is by being connected the part pin transmitting auxiliary signal in PCIE standard sockets with the chip in BMC system, multiplexing transmission NCSI signal, realize the communication between BMC system and PCIE network interface card, from without additionally increasing cable, wire and cable connector and loaded down with trivial details manufacturing installation process, just can realize supporting the PCIE network interface card of NCSI function in PCIE standard sockets, avoid manufacture present in prior art install loaded down with trivial details, the problem of high cost.
Description
Technical field
The present invention relates to the network controller side band interface (Network of back-level server outband management
Controller Sideband Interface, NCSI) technical field, especially relate to a kind of mainboard, PCIE
Network interface card and server system.
Background technology
In server system, generally include processor system and baseboard management controller (Baseboard
Management Controller, BMC) system, wherein, processor system and interface thereof are process business
Band in system, its interface is referred to as band inner joint；BMC system and interface thereof are to realize system monitoring management
Band external system, its interface is referred to as band external tapping.Band inner joint and band external tapping are the most all Ethernet interfaces.
In tradition is applied, in band, Ethernet interface and out-of-band ethernet interface are separate from, such as Fig. 1
Shown in, processor system is gone out high-speed peripheral device interconnection (Peripheral Component Interconnect
Express, PCIE) bus, it is connected to carry interior ethernet controller (to be called for short by Ethernet interface in band
PCIE network interface card) on, the in-band information of transmission processor system；And the band external information that BMC system monitoring arrives
Then transmitted by out-of-band ethernet interface.
Currently in order to simplification networking, the network proposing a kind of back-level server outband management in prior art controls
Device side band interface (Network Controller Sideband Interface, NCSI) technology, as in figure 2 it is shown,
In this NCSI technology, BMC system is gone out NCSI bus, is connected on PCIE network interface card, and passes through PCIE
The network interface correspondence with foreign country of network interface card, and do not conflict mutually with the in-band communications of this network interface so that Ethernet interface in band
Unite two into one with out-of-band ethernet interface, while cost-effective, in turn simplify networking.
At present, in order to make this server system realize above-mentioned NCSI technology, existing solution is at clothes
All reserving wire and cable connector on mainboard in business device system and PCIE network interface card, PCIE network interface card inserts PCIE mark
After quasi-slot, by cable, the NCSI signal in BMC system in mainboard is accessed PCIE network interface card.Also
That is, in order to make PCIE network interface card be capable of NCSI function, need extra two cables of increase to connect
Device and single line cable, this method exists to manufacture installs loaded down with trivial details, increases material and process and assemble cost
Defect.
Summary of the invention
The embodiment of the present invention provides a kind of mainboard, PCIE network interface card and server system, in order to solve existing skill
The manufacturing that in art, PCIE network interface card realizes existing during NCSI function is installed loaded down with trivial details, the problem of high cost.
First aspect, it is provided that a kind of mainboard, including:
Processor system, baseboard management controller BMC system and to be used for connecting high-speed peripheral device interconnection total
The PCIE standard sockets of line PCIE network interface card, wherein:
Described PCIE standard sockets is transmitted pin and the chip in described processor system of non-auxiliary signal
Connect, to realize the communication between described processor system and described PCIE network interface card；
Described PCIE standard sockets is transmitted the pin of auxiliary signal with the chip in described BMC system even
Connect, the network controller side band interface NCSI signal of multiplexing transmission back-level server outband management, to realize
Communication between described BMC system and described PCIE network interface card.
In conjunction with first aspect, in the implementation that the first is possible, described auxiliary signal includes:
Retain RSVD signal, joint test behavior tissue JTAG signal and System Management Bus SMBus
At least one in signal, wherein:
Described SMBus signal includes: SMBus data SMDAT signal and SMBus clock SMCLK
At least one in signal；
Described JTAG signal includes: jtag test reset TRST signal, and jtag test clock inputs
Tck signal, jtag test data input TDI signal, jtag test data output TDO signal and
At least one in jtag test model selection tms signal.
In conjunction with the first possible implementation of first aspect, in the implementation that the second is possible, institute
State and the pin of transmission auxiliary signal does not comprise the pin transmitting described JTAG TRST signal, and transmission institute
The pin stating JTAG TRST signal processes ground connection by resistive pull-downs.
The second in conjunction with first aspect, the first possible implementation of first aspect or first aspect can
In the implementation of energy, described NCSI signal includes:
Reference input clock signal REF_CLK, receives data valid signal CRS_DV, and first receives number
The number of it is believed that RXD [1], second receives data signal RXD [0], sends and enables signal TX_EN, first
Data signal TXD [1] and second is sent to send at least one in data signal TXD [0].
Second aspect, it is provided that a kind of high-speed peripheral device interconnection Bus PC IE network interface card, including with on mainboard
The interface that PCIE standard sockets connects, wherein:
The interface corresponding with the pin transmitting non-auxiliary signal in described PCIE standard sockets, is used for transmitting
Non-auxiliary signal, the interface corresponding with the pin transmitting auxiliary signal in described PCIE standard sockets, use
In the network controller side band interface NCSI signal of multiplexing transmission back-level server outband management, to realize
State the communication between PCIE standard sockets and described PCIE network interface card.
The third aspect, it is provided that a kind of server system, including the mainboard described in any of the above-described item and described above
PCIE network interface card.
In the embodiment of the present invention, by by PCIE standard sockets is transmitted the part pin of auxiliary signal with
Chip in BMC system connects, and multiplexing transmission NCSI signal realizes BMC system and PCIE net
Communication between card, from without additionally increasing cable, wire and cable connector and loaded down with trivial details manufacturing installation
Process, it becomes possible to realize supporting the PCIE network interface card of NCSI function in PCIE standard sockets, it is to avoid existing
Have present in technology manufacture install loaded down with trivial details, the problem of high cost.
Accompanying drawing explanation
Fig. 1 is the application schematic diagram of server system in prior art；
Fig. 2 is the application schematic diagram that in prior art, server system realizes NCSI technology；
The structural representation of a kind of server system that Fig. 3 provides for the embodiment of the present invention；
Fig. 4 realizes the application schematic diagram of NCSI technology for a kind of server system that the embodiment of the present invention provides.
Detailed description of the invention
The manufacturing in order to solve to exist when PCIE network interface card in prior art realizes NCSI function is installed numerous
Trivial, the problem of high cost, embodiments provide a kind of mainboard, PCIE network interface card and server system
System.In this technical scheme, by PCIE standard sockets will be transmitted part pin and the BMC of auxiliary signal
Chip in system connects, and multiplexing transmission NCSI signal realizes between BMC system and PCIE network interface card
Communication, from without additionally increasing cable, wire and cable connector and loaded down with trivial details manufacturing installation process,
Just can realize supporting the PCIE network interface card of NCSI function in PCIE standard sockets, it is to avoid prior art
Present in manufacture install loaded down with trivial details, the problem of high cost.
Below in conjunction with Figure of description, embodiments of the invention are illustrated, it will be appreciated that described herein
Embodiment be merely to illustrate and explain the present invention, be not limited to the present invention.And in the feelings do not conflicted
Under condition, embodiment and the feature of embodiment in this explanation can be combined with each other.
The embodiment of the present invention provides a kind of mainboard, and this mainboard specifically includes that the management control of processor system, substrate
Device BMC system processed and for connecting the PCIE standard sockets of high-speed peripheral device interconnection Bus PC IE network interface card,
Wherein:
The pin transmitting non-auxiliary signal in PCIE standard sockets is connected with the chip in processor system, with
Realize the communication between processor system and PCIE network interface card；
The pin transmitting auxiliary signal in PCIE standard sockets is connected with the chip in BMC system, and multiplexing passes
Defeated NCSI signal, to realize the communication between BMC system and PCIE network interface card.
Wherein, auxiliary signal can include at least one of following signal:
Retain RSVD signal, joint test behavior tissue JTAG signal and System Management Bus SMBus
Signal, and SMBus signal can specifically include at least one in following signal: SMBus data SMDAT
Signal and SMBus clock SMCLK signal；JTAG signal can specifically include in following signal at least one
Kind: jtag test reset TRST signal, jtag test clock input tck signal, jtag test number
According to input TDI signal, jtag test data output TDO signal and jtag test model selection TMS
Signal.
Above-mentioned NCSI signal can specifically include at least one in following signal: reference input clock signal
REF_CLK, receives data valid signal CRS_DV, and first receives data signal RXD [1], and second connects
Receiving data signal RXD [0], send and enable signal TX_EN, first sends data signal TXD [1] and the
Two send data signal TXD [0].
It should be noted that the embodiment of the present invention can be, but not limited to above-mentioned seven kinds of NCSI signals, due to
Above-mentioned seven kinds of NCSI signals can meet the application scenarios of the overwhelming majority, therefore preferential in the embodiment of the present invention
Select this seven kinds of NCSI signals.
Further, since PCIE standard sockets is according to the difference of bus bit wide and all differences, can be divided into X1,
, under above-mentioned each type, all there is the pin of RSVD signal in X4, X8 and X16 type, therefore to
Drawing of RSVD signal can selected with the PCIE network interface card of the PCIE X1 type of compatible bus bit wide minimum
During foot multiplexing transmission NCSI signal, can preferentially select the pin of two RSVD signals under X1 type
Carry out multiplexing.According to user's needs, it is also possible to other auxiliary signals under multiplexing X4, X8 or X16 type,
Such as RSVD signal.
Meanwhile, in order to make PCIE standard sockets can either the compatible PCIE network interface card supporting NCSI signal, again
Energy compatible with PCI E standard network interface card, does not the most support the PCIE network interface card of NCSI signal, makes PCIE standard network interface card
Can normally work, when selecting the pin of multiplexing transmission NCSI signal, it is not recommended that select JTAG TRST
The pin of signal, can process ground connection by the pin of transmission JTAG TRST signal by resistive pull-downs, make
PCIE standard network interface card cannot be introduced into JTAG mode of operation, thus avoids PCIE standard network interface card issuable
Operation irregularity.It should be noted that when the pin multiplexing not selecting JTAG signal transmits NCSI signal,
The pin of JTAG TRST signal can not do resistive pull-downs process.
Concrete, the pin of transmission auxiliary signal is connected with the chip in BMC system, multiplexing transmission NCSI
During signal, the multiplexing relation between auxiliary signal and the NCSI signal of selection can arbitrarily be arranged in pairs or groups, and such as selects
Auxiliary signal include: RSVD1 signal, RSVD2 signal, JTAG tck signal, JTAG TDI
Signal, JTAG TDO signal, JTAG tms signal and SMBus SMDAT signal, and select
NCSI signal includes: REF_CLK, CRS_DV, RXD [0], RXD [1], TX_EN, TXD [0]
With TXD [1], then the multiplexing relation between them can be: REF_CLK multiplexing RSVD1 signal,
CRS_DV multiplexing RSVD2 signal, RXD [0] multiplexing JTAG tck signal, RXD [1] multiplexing JTAG
TDI signal, TX_EN multiplexing JTAG TDO signal, TXD [0] multiplexing JTAG tms signal, TXD [1]
Multiplexing SMBus SMDAT signal.
Accordingly, the embodiment of the present invention additionally provides a kind of PCIE network interface card, and this PCIE network interface card includes with main
The interface that PCIE standard sockets on plate connects, wherein, transmits non-auxiliary letter in PCIE standard sockets
Number the corresponding interface of pin, be used for transmitting non-auxiliary signal, with transmission auxiliary in PCIE standard sockets
The interface that the pin of signal is corresponding, for multiplexing transmission NCSI signal, to realize PCIE standard sockets
And the communication between PCIE network interface card.
Conceiving based on foregoing invention, the embodiment of the present invention also proposed a kind of server system, as it is shown on figure 3,
For the structural representation of this server system, including the mainboard 31 and PCIE network interface card 32 in above-described embodiment,
Below this server system is realized NCSI technology to illustrate.As shown in Figure 4, for this server
System realizes the application schematic diagram of the application schematic diagram of NCSI technology.
Mainboard 31, including processor system 311, BMC system 312 and for connecting PCIE network interface card
PCIE standard sockets 313, wherein:
PCIE standard sockets 313 is transmitted pin and the chip in processor system 311 of non-auxiliary signal
Connect, to realize the communication between processor system 311 and PCIE network interface card 32；
The pin transmitting auxiliary signal in PCIE standard sockets 313 is connected with the chip in BMC system 312,
Multiplexing transmission NCSI signal, to realize the communication between BMC system 312 and PCIE network interface card 32；
PCIE network interface card 32, including the interface being connected with the PCIE standard sockets 313 on mainboard 31, wherein:
The interface corresponding with the pin transmitting non-auxiliary signal in PCIE standard sockets 313, is used for transmitting
Non-auxiliary signal, the interface corresponding with the pin transmitting auxiliary signal in PCIE standard sockets 313, use
In multiplexing transmission NCSI signal, to realize leading between PCIE standard sockets 313 and PCIE network interface card 32
Letter.
It will be understood by those skilled in the art that embodiments of the invention can be provided as method, device (equipment),
Or computer program.Therefore, the present invention can use complete hardware embodiment, complete software implementation,
Or combine the form of embodiment in terms of software and hardware.And, the present invention can use one or more its
In include the computer-usable storage medium of computer usable program code and (include but not limited to disk storage
Device, CD-ROM, optical memory etc.) form of the upper computer program implemented.
The present invention is with reference to method, device (equipment) and computer program according to embodiments of the present invention
Flow chart and/or block diagram describe.It should be understood that can by computer program instructions flowchart and/or
Flow process in each flow process in block diagram and/or square frame and flow chart and/or block diagram and/or square frame
In conjunction with.These computer program instructions can be provided to general purpose computer, special-purpose computer, Embedded Processor
Or the processor of other programmable data processing device is to produce a machine so that by computer or other
The instruction that the processor of programmable data processing device performs produce for realizing in one flow process of flow chart or
The device of the function specified in multiple flow processs and/or one square frame of block diagram or multiple square frame.
These computer program instructions may be alternatively stored in and computer or the process of other programmable datas can be guided to set
In the standby computer-readable memory worked in a specific way so that be stored in this computer-readable memory
Instruction produce and include the manufacture of command device, this command device realizes in one flow process or multiple of flow chart
The function specified in flow process and/or one square frame of block diagram or multiple square frame.
These computer program instructions also can be loaded in computer or other programmable data processing device, makes
Sequence of operations step must be performed to produce computer implemented place on computer or other programmable devices
Reason, thus the instruction performed on computer or other programmable devices provides for realizing flow chart one
The step of the function specified in flow process or multiple flow process and/or one square frame of block diagram or multiple square frame.
Although preferred embodiments of the present invention have been described, but those skilled in the art once know base
This creativeness concept, then can make other change and amendment to these embodiments.So, appended right is wanted
Ask and be intended to be construed to include preferred embodiment and fall into all changes and the amendment of the scope of the invention.
Obviously, those skilled in the art can carry out various change and modification without deviating from this to the present invention
Bright spirit and scope.So, if the present invention these amendment and modification belong to the claims in the present invention and
Within the scope of its equivalent technologies, then the present invention is also intended to comprise these change and modification.
Claims (9)
1. a mainboard, it is characterised in that including: processor system, baseboard management controller BMC system
Unite and for connecting the PCIE standard sockets of high-speed peripheral device interconnection Bus PC IE network interface card, wherein:
Described PCIE standard sockets is transmitted pin and the chip in described processor system of non-auxiliary signal
Connect, to realize the communication between described processor system and described PCIE network interface card；
Described PCIE standard sockets is transmitted the pin of auxiliary signal with the chip in described BMC system even
Connect, the network controller side band interface NCSI signal of multiplexing transmission back-level server outband management, to realize
Communication between described BMC system and described PCIE network interface card.
2. mainboard as claimed in claim 1, it is characterised in that described auxiliary signal includes:
Retain RSVD signal, joint test behavior tissue JTAG signal and System Management Bus SMBus
At least one in signal, wherein:
Described SMBus signal includes: SMBus data SMDAT signal and SMBus clock SMCLK
At least one in signal；
Described JTAG signal includes: jtag test reset TRST signal, and jtag test clock inputs
Tck signal, jtag test data input TDI signal, jtag test data output TDO signal and
At least one in jtag test model selection tms signal.
3. mainboard as claimed in claim 2, it is characterised in that in the pin of described transmission auxiliary signal
Do not comprise the pin transmitting described JTAG TRST signal, and transmit the pin of described JTAG TRST signal
Ground connection is processed by resistive pull-downs.
4. the mainboard as described in claims 1 to 3 is arbitrary, it is characterised in that described NCSI signal includes:
Reference input clock signal REF_CLK, receives data valid signal CRS_DV, and first receives number
The number of it is believed that RXD [1], second receives data signal RXD [0], sends and enables signal TX_EN, first
Data signal TXD [1] and second is sent to send at least one in data signal TXD [0].
5. a high-speed peripheral device interconnection Bus PC IE network interface card, inserts including with the PCIE standard on mainboard
The interface that groove connects, it is characterised in that wherein:
The interface corresponding with the pin transmitting non-auxiliary signal in described PCIE standard sockets, is used for transmitting
Non-auxiliary signal, the interface corresponding with the pin transmitting auxiliary signal in described PCIE standard sockets, use
In the network controller side band interface NCSI signal of multiplexing transmission back-level server outband management, to realize
State the communication between PCIE standard sockets and described PCIE network interface card.
6. a server system, it is characterised in that include mainboard and high-speed peripheral device interconnection Bus PC IE
Network interface card, wherein:
Described mainboard, including processor system, baseboard management controller BMC system and described for connecting
The PCIE standard sockets of PCIE network interface card, wherein: described PCIE standard sockets is transmitted non-auxiliary signal
Pin is connected with the chip in described processor system, to realize described processor system and described PCIE net
Communication between card；Described PCIE standard sockets is transmitted the pin of auxiliary signal and described BMC system
In chip connect, the network controller side band interface NCSI of multiplexing transmission back-level server outband management letter
Number, to realize the communication between described BMC system and described PCIE network interface card；
Described PCIE network interface card, including the interface being connected with described PCIE standard sockets, wherein: with described
PCIE standard sockets is transmitted the interface that the pin of non-auxiliary signal is corresponding, is used for transmitting non-auxiliary signal,
The interface corresponding with the pin transmitting auxiliary signal in described PCIE standard sockets, props up for multiplexing transmission
Hold the network controller side band interface NCSI signal of server outband management, to realize described PCIE standard
Communication between slot and described PCIE network interface card.
7. system as claimed in claim 6, it is characterised in that described auxiliary signal includes:
Retain RSVD signal, joint test behavior tissue JTAG signal and System Management Bus SMBus
At least one in signal, wherein:
Described SMBus signal includes: SMBus data SMDAT signal and SMBus clock SMCLK
At least one in signal；
Described JTAG signal includes: jtag test reset TRST signal, and jtag test clock inputs
Tck signal, jtag test data input TDI signal, jtag test data output TDO signal and
At least one in jtag test model selection tms signal.
8. system as claimed in claim 7, it is characterised in that in the pin of described transmission auxiliary signal
Do not comprise the pin transmitting described JTAG TRST signal, and transmit the pin of described JTAG TRST signal
Ground connection is processed by resistive pull-downs.
9. the system as described in as arbitrary in claim 6～8, it is characterised in that described NCSI signal includes:
Reference input clock signal REF_CLK, receives data valid signal CRS_DV, and first receives number
The number of it is believed that RXD [1], second receives data signal RXD [0], sends and enables signal TX_EN, first
Data signal TXD [1] and second is sent to send at least one in data signal TXD [0].
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| Application Number | Priority Date | Filing Date | Title |
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| CN201310616581.7A CN103616937B (en) | 2013-11-27 | 2013-11-27 | A kind of mainboard, PCIE network interface card and server system |
Applications Claiming Priority (1)
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| CN201310616581.7A CN103616937B (en) | 2013-11-27 | 2013-11-27 | A kind of mainboard, PCIE network interface card and server system |
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| CN103616937B true CN103616937B (en) | 2016-09-28 |
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Families Citing this family (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103984391A (en) * | 2014-05-29 | 2014-08-13 | 浪潮电子信息产业股份有限公司 | High density and high bandwidth server main board |
| CN104202195B (en) * | 2014-09-10 | 2018-05-04 | 华为技术有限公司 | Method, baseboard management controller and the server of server Unified Communication |
| CN105354165A (en) * | 2015-12-09 | 2016-02-24 | 浪潮电子信息产业股份有限公司 | PCIE network card and server system |
| CN105791052A (en) * | 2016-04-01 | 2016-07-20 | 浪潮电子信息产业股份有限公司 | Method for batch testing of network cards with NCSI function |
| CN105897471A (en) * | 2016-04-05 | 2016-08-24 | 浪潮电子信息产业股份有限公司 | Out-of-band management system and out-of-band management method |
| CN106126394B (en) * | 2016-08-22 | 2019-02-19 | 浪潮(北京)电子信息产业有限公司 | The method and system of out of band supervision management acquisition PCIE device assets information |
| CN106452965B (en) * | 2016-11-01 | 2019-05-14 | 郑州云海信息技术有限公司 | A kind of method of automatic verifying network interface card NCSI stability |
| CN107463456A (en) * | 2017-08-04 | 2017-12-12 | 郑州云海信息技术有限公司 | A kind of system and method for lifting double netcard NCSI management system switching efficiencies |
| CN107483246A (en) * | 2017-08-17 | 2017-12-15 | 郑州云海信息技术有限公司 | A kind of service unit with multiple network equipments, service unit switching system and switching method |
| CN107395527A (en) * | 2017-08-30 | 2017-11-24 | 济南浪潮高新科技投资发展有限公司 | A kind of outband management system and method |
| CN107888222B (en) * | 2017-11-16 | 2020-08-25 | 苏州浪潮智能科技有限公司 | Circuit structure and method for optimizing NCSI signal quality |
| CN108009114B (en) * | 2017-12-08 | 2020-09-29 | 苏州浪潮智能科技有限公司 | Structure for optimizing equal length of NCSI clock signal line |
| CN108429741B (en) * | 2018-02-28 | 2021-06-29 | 郑州云海信息技术有限公司 | Method and system for realizing NCSI protocol |
| CN109408432A (en) * | 2018-09-04 | 2019-03-01 | 深圳市宝德计算机系统有限公司 | A kind of buckle for supporting NCSI |
| CN109828933B (en) * | 2019-01-30 | 2020-10-23 | 苏州浪潮智能科技有限公司 | NCSI function network card and method for realizing NCSI function of network card |
| US11140780B2 (en) * | 2019-06-10 | 2021-10-05 | Mellanox Technologies, Ltd. | Networking cards with increased performance |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102193582A (en) * | 2010-03-02 | 2011-09-21 | 鸿富锦精密工业（深圳）有限公司 | Mainboard expanding device |
| CN103098039A (en) * | 2012-10-17 | 2013-05-08 | 华为技术有限公司 | High-speed peripheral-device interconnected-bus port configuration method and apparatus |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5801921A (en) * | 1996-11-19 | 1998-09-01 | Symex, Inc. | Integrated data, voice, and video communication network |
| US7216191B2 (en) * | 2001-02-14 | 2007-05-08 | Berkeley Process Control, Inc. | System for programmed control of signal input and output to and from cable conductors |
-
2013
- 2013-11-27 CN CN201310616581.7A patent/CN103616937B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102193582A (en) * | 2010-03-02 | 2011-09-21 | 鸿富锦精密工业（深圳）有限公司 | Mainboard expanding device |
| CN103098039A (en) * | 2012-10-17 | 2013-05-08 | 华为技术有限公司 | High-speed peripheral-device interconnected-bus port configuration method and apparatus |
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