CN110729314A - 光学感测装置 - Google Patents

光学感测装置 Download PDF

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CN110729314A
CN110729314A CN201810785007.7A CN201810785007A CN110729314A CN 110729314 A CN110729314 A CN 110729314A CN 201810785007 A CN201810785007 A CN 201810785007A CN 110729314 A CN110729314 A CN 110729314A
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optical sensing
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semiconductor substrate
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谢丞聿
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United Microelectronics Corp
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Abstract

本发明公开一种光学感测装置，其包括半导体基底、沟槽隔离元件、及光电二极管。半导体基底具有相对的背半导体表面及前半导体表面。背半导体表面具有纹理表面。沟槽隔离元件从背半导体表面延伸至前半导体表面。光电二极管在半导体基底中。

Description

光学感测装置
技术领域
本发明涉及一种光学感测装置，且特别是涉及一种背照式影像感测器。
背景技术
随着电脑和通讯工业的发展，高效率的光学感测装置例如影像感测器的需求随之增加，其可应用在各种领域，例如数码相机、摄录影机、个人通讯系统、游戏元件、监视器、医疗用的微相机、机器人等。
背照式影像感测器为现今一种常见的高效率影像感测装置，且由于背照式影像感测器可以整合于传统的半导体制作工艺制作，因此具有制作成本较低、元件尺寸较小以及积集度较高的优点。此外，背照式影像感测器还具有低操作电压、低功率消耗、高量子效率(quantum efficiency)、低噪声(read-out noise)以及可根据需要进行随机存取(randomaccess)等优势，因此已广泛应用在现有的电子产品上。
随着元件尺寸的持续缩小以及半导体制作工艺的进步，背照式影像感测器的尺寸日益微缩。但是，除了尺寸要求之外，背照式影像感测器更面临光电转换效率(photo-electric conversion efficiency)、灵敏度(sensitivity)、低噪声(noise)等要求。
发明内容
本发明的目的在于提供一种光学感测装置，以解决上述问题。
本发明提出一种光学感测装置包括半导体基底、沟槽隔离元件、及光电二极管。半导体基底具有相对的背半导体表面及前半导体表面。背半导体表面具有纹理表面。沟槽隔离元件从背半导体表面延伸至前半导体表面。光电二极管在半导体基底中。
为了对本发明的上述及其他方面有更佳的了解，下文特举实施例，并配合所附的附图详细说明如下：
附图说明
图1为一实施例的光学感测装置的剖面示意图；
图2为一实施例中面对半导体基底的背半导体表面时的示意图；
图3为一实施例的光学感测装置的剖面示意图；
图4为一实施例中面对半导体基底的背半导体表面时的示意图；
图5为一实施例的光学感测装置的剖面示意图；
图6为一实施例的光学感测装置的剖面示意图；
图7为一实施例的光学感测装置的剖面示意图。
具体实施方式
以下以一些实施例做说明。需注意的是，本发明并非显示出所有可能的实施例，未于本发明提出的其他实施态样也可能可以应用。再者，附图上的尺寸比例并非按照实际产品等比例绘制。因此，说明书和图示内容仅作叙述实施例之用，而非作为限缩本发明保护范围之用。另外，实施例中的叙述，例如细部结构、制作工艺步骤和材料应用等等，仅为举例说明之用，并非对本发明欲保护的范围做限缩。实施例的步骤和结构各的细节可在不脱离本发明的精神和范围内根据实际应用制作工艺的需要而加以变化与修饰。以下是以相同/类似的符号表示相同/类似的元件做说明。
图1绘示根据一实施例的光学感测装置102的剖面示意图。光学感测装置102包括半导体基底104、沟槽隔离元件106与光电二极管(photodiode)108。
半导体基底104包括任意适当的半导体材料。一实施例中，半导体基底104是一硅基底，可由硅构成。其它实施例中，半导体基底104例如是一含硅(silicon-containing)基底、一三五族覆硅(III-V group-on-silicon)基底例如氮化镓覆硅(GaN-on-silicon)基底、一石墨烯覆硅基底(graphene-on-silicon)或一硅覆绝缘(silicon-on-insulator，SOI)基底等，但不限于此。半导体基底104可内形成有多个感光元件。实施例中，感光元件至少包含一感测区域，例如光电二极管(photodiode)108。感光元件也可包含电荷耦合元件(charge-coupled device，CCD)、互补式金属氧化物半导体(complementary metal-oxide-semiconductor，CMOS)影像感测器(CMOS image sensor，CIS)、主动式图元感测器(active-pixel sensor，API)或被动式图元感测器(passive-pixel sensor，PPI)等。
半导体基底104具有相对的背半导体表面104B及前半导体表面104F。背半导体表面104B具有纹理表面。实施例中，纹理表面是具有在第一方向D1、第二方向D2及/或第三方向D3上纳米至微米尺寸变化的纹理单元的表面。纹理单元可以是但不限于圆锥、角锥、台柱、突起、微透镜、球状结构、量子点、倒置特征等，包括它们的组合。
图2绘示一实施例中面对半导体基底104的背半导体表面104B时的示意图。图1中所示的半导体基底104的剖面部分可类似沿图2的AB线的剖面部分。可同时参照图1及图2，此实施例中，纹理表面是具有微米尺寸变化的表面。例如纹理表面可包括数个纹理单元P。纹理单元P各可包括第一侧面部分S1、第二侧面部分S2与底部分BS，底部分BS在相对的第一侧面部分S1及第二侧面部分S2之间。纹理单元P各可还包括相对的第三侧面部分S3及第四侧面部分S4，邻接在第一侧面部分S1及第二侧面部分S2之间。底部分BS可为第三侧面部分S3及第四侧面部分S4之间的交界面。第一侧面部分S1、第二侧面部分S2、第三侧面部分S3及第四侧面部分S4可为往远离底部分BS的方向(如第一方向D1)逐渐张开的倾斜表面，并与底部分BS定义出凹口单元。纹理表面的顶部分TS位在凹口单元之间。凹口单元可具有微米级尺寸。例如，但不限于，在第二方向D2上最大的开口尺寸可约为1微米。纹理表面可利用对背半导体表面104B进行光刻蚀刻制作工艺形成。光刻蚀刻制作工艺可例如包括使用光致抗蚀剂及/或硬掩模的步骤。附图中，第一方向D1、第二方向D2与第三方向D3可彼此交错。例如第一方向D1可为X方向，第二方向D2可为Y方向，第三方向D3可为Z方向，可实质上彼此互相垂直。
请参照图1，沟槽隔离元件106形成在半导体基底104中，可用以隔离感光元件。沟槽隔离元件106从背半导体表面104B延伸至前半导体表面104F。沟槽隔离元件106的相对表面是分别露出背半导体表面104B与前半导体表面104F。沟槽隔离元件106可包括折射率不同于半导体基底104的材料，例如绝缘材料，例如包括、但不限于氧化物例如氧化硅。沟槽隔离元件106可用以将入射光反射进入感光元件例如光电二极管108，从而提升光感测效率，并能避免邻近像素光线干扰，从而提高感测准确度。
请参照图1，感光元件，例如光电二极管108可具有厚的厚度，例如感光元件(如光电二极管108)的厚度(即第一方向D1的尺寸)大于半导体基底104的最大厚度的一半，或大于半导体基底104的最大厚度的2/3，或大于半导体基底104的最大厚度的3/4，或大于半导体基底104的最大厚度的4/5，并可小于半导体基底104的最大厚度。半导体基底104的最大厚度例如是前半导体表面104F与背半导体表面104B的最高凸起处(例如背半导体表面104B的纹理表面的顶部分TS)之间的间距。感光元件，例如光电二极管108可具有厚的厚度，厚度可从1微米至十数微米，能帮助提升感测光线的路径长度。
请参照图1，抗反射层110可配置在背半导体表面104B上。抗反射层110可邻接背半导体表面104B，并具有与背半导体表面104B的纹理表面互补的相反纹理表面。网状结构112可配置在背半导体表面104B上，例如配置在抗反射层110。网状结构112可定义出开口112O的阵列。一实施例中，沟槽隔离元件106可对应网状结构112，即在第三方向D3上彼此重叠。网状结构112可包括反射材料，例如金属，或其它合适的材料。网状结构112可包括导电材料，例如金属，并可为浮接(floating)或接地(grounded)。网状结构112可用以将光线反射进入感光元件例如光电二极管108，从而提升光感测效率，并能避免邻近像素光线干扰，从而提高感测准确度。
透镜114，例如微透镜阵列，可配置在背半导体表面104B上。例如在一实施例中，透光层116可配置在抗反射层110与网状结构112上，透镜114可配置在透光层116上。此实施例中，网状结构112仅占透光层116的部分厚度，且网状结构112与透镜114可通过透光层116互相分离。透光层116可包括、但不限于氧化物，例如氧化硅、氮氧化硅等。一实施例中，可视需求配置彩色滤光层，例如、但不限于配置在透镜114与透光层116之间。透镜114可对入射光线产生折射作用从而将光线更加集中导向半导体基底104中的感光元件例如光电二极管108。
一实施例中，光学感测装置102是一背照式影像感测器。一实施例中，光学感测装置102是一红外线感测器，例如可用以感测远红外线。一实施例中，光学感测装置102的像素可由半导体基底104被沟槽隔离元件106环绕的区域单元定义。一实施例中，像素是由网状结构112环绕的数个区域定义，或网状结构112的开口112O可对应像素/半导体基底104被沟槽隔离元件106环绕的区域单元。一实施例中，光学感测装置102的像素可分别对应透镜114的单元，及/或感光元件例如光电二极管108，诸如此类。
实施例的光学感测装置102中，半导体基底104的背半导体表面104B的纹理表面可对光线产生绕射效应，从而提升感测光线的路径长度。光电二极管108具有厚的厚度，能帮助提升感测光线的路径长度。沟槽隔离元件106延伸贯穿整个半导体基底104的厚度，能有效避免邻近像素之间的光线干扰。因此能提升光线的量子效率，从而提高光学感测装置102的感测效率及准确性。
图3绘示根据另一实施例的光学感测装置202的剖面示意图，其与图1的光学感测装置102的差异说明如下。此实施例中，半导体基底204的背半导体表面204B的纹理表面是纳米尺寸。图4绘示一实施例中面对半导体基底204的背半导体表面204B时的示意图。请同时参照图3及图4，一实施例中，背半导体表面204B的纹理表面可利用对露出沟槽隔离元件106的背半导体表面204B进行蚀刻制作工艺，例如飞秒激光方法或其它合适的方法形成纳米级尺寸孔洞204BH而形成。孔洞204BH的尺寸(例如第一方向D1上的尺寸，及/或第二方向D2上的尺寸，及/或第三方向D3上的尺寸)可为100nm以下，例如、但不限于40nm、50nm等等。此实施例的纹理表面具有纳米尺寸纹理，比起具有更大尺寸纹理的背半导体表面104B的光学感测装置102，能使得光线具有更佳的量子效应，从而提升装置的感光效能。
图5绘示根据另一实施例的光学感测装置302的剖面示意图，其与图3的光学感测装置202的差异说明如下。半导体基底304的背半导体表面304B具有透镜形状表面。透镜形状表面例如是半导体基底304的厚度在往远离沟槽隔离元件106的横方向(平行第二方向D2)上逐渐变厚造成的类凸弧状表面轮廓。透镜形状表面可利用激光尖峰退火(Laser-Spike Annealing，简称LSA)方法形成。透镜形状表面能提升光线路径的集中，降低串扰(crosstalk；X-talk)，且透镜形状表面可具有纳米尺寸的纹理表面以造成较佳的光线量子效应。沟槽隔离元件306不但露出背半导体表面304B，更延伸埋至抗反射层110中。沟槽隔离元件306可通过抗反射层110隔离网状结构112。
图6绘示根据另一实施例的光学感测装置402的剖面示意图，其与图5的光学感测装置302的差异说明如下。光学感测装置402可更包括晶体管。晶体管可配置在半导体基底304的前半导体表面304F上。一实施例中，晶体管可包括形成在前半导体表面304F上的介电层418，及形成在介电层418上的栅结构420(如栅电极层)。晶体管也可包括源极与漏极，可利用注入离子的方式形成在半导体基底304中。掺杂的源极与漏极其中之一可电连接至感光元件例如光电二极管108。例如源极与漏极其中之一电连接至光电二极管108的P型掺杂部分与N型掺杂部分其中之一。晶体管可对应像素配置。其它实施例中，晶体管与其它元件相对关系的概念也可应用至例如图1与图3的实施例中。
图7绘示根据另一实施例的光学感测装置502的剖面示意图，其与图6的光学感测装置402的差异说明如下。网状结构512穿过透光层116，并接触透镜114。网状结构512在第一方向D1上的尺寸(例如厚度)可等于透光层116在第一方向D1上的尺寸(例如厚度)。
综上所述，根据实施例的概念的光学感测装置可具有以下优点。半导体基底的背半导体表面的纹理表面可对光线产生绕射效应，从而提升感测光线的路径长度，提高量子效率。光电二极管具有厚的厚度，能帮助提升感测光线的路径长度。沟槽隔离元件及/或可用以将入射光反射进入感光元件例如光电二极管，从而提升光感测效率，并能避免邻近像素光线干扰，从而提高感测准确度。透镜可对入射光线产生折射作用从而将光线更加集中导向半导体基底中的感光元件例如光电二极管。半导体基底的背半导体表面可具有透镜形状表面，能提升光线路径的集中，降低串扰。因此，根据实施例的概念的光学感测装置可具有良好的感测效率及感测准确性。
综上所述，虽然结合以上实施例公开了本发明，然而其并非用以限定本发明。本发明所属技术领域中具有通常知识者，在不脱离本发明的精神和范围内，可作各种的更动与润饰。因此，本发明的保护范围应当以附上的权利要求所界定的为准。

Claims (18)

1.一种光学感测装置，其特征在于，包括：
半导体基底，具有相对的背半导体表面及前半导体表面，其中该背半导体表面具有纹理表面；
沟槽隔离元件，从该背半导体表面延伸至该前半导体表面；及
光电二极管，在该半导体基底中。
2.如权利要求1所述的光学感测装置，其中该纹理表面是具有纳米至微米尺寸表面的表面。
3.如权利要求1所述的光学感测装置，其中该背半导体表面具有透镜形状表面，该透镜形状表面具有该纹理表面。
4.如权利要求1所述的光学感测装置，包括像素，该像素是由该半导体基底被该沟槽隔离元件环绕的区域定义。
5.如权利要求1所述的光学感测装置，还包括网状结构，配置在该背半导体表面上。
6.如权利要求5所述的光学感测装置，包括数个像素，其中该网状结构定义数个开口，该些开口对应该些像素。
7.如权利要求5所述的光学感测装置，还包括：
透光层，在该网状结构上；及
透镜，在该透光层上。
8.如权利要求7所述的光学感测装置，其中该网状结构穿过该透光层，并接触该透镜。
9.如权利要求7所述的光学感测装置，其中该网状结构与该透镜是通过该透光层互相分离。
10.如权利要求5所述的光学感测装置，其中该网状结构包括反射材料。
11.如权利要求5所述的光学感测装置，其中该网状结构包括金属。
12.如权利要求1所述的光学感测装置，还包括抗反射层，在该背半导体表面上。
13.如权利要求12所述的光学感测装置，其中该沟槽隔离元件埋至该抗反射层中。
14.如权利要求12所述的光学感测装置，其中该抗反射层具有与该半导体基底的该背半导体表面的该纹理表面互补的表面。
15.如权利要求1所述的光学感测装置，其中该光学感测装置是背照式影像感测器。
16.如权利要求1所述的光学感测装置，其中该光学感测装置是红外线感测器。
17.如权利要求1所述的光学感测装置，还包括透镜，在该背半导体表面上。
18.如权利要求1所述的光学感测装置，还包括晶体管，形成在该半导体基底的该前半导体表面上。
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