CN110717201B - Gaussian sampling circuit capable of resisting simple power consumption analysis attack - Google Patents

Gaussian sampling circuit capable of resisting simple power consumption analysis attack Download PDF

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CN110717201B
CN110717201B CN201910866396.0A CN201910866396A CN110717201B CN 110717201 B CN110717201 B CN 110717201B CN 201910866396 A CN201910866396 A CN 201910866396A CN 110717201 B CN110717201 B CN 110717201B
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刘冬生
张聪
陈宇阳
陆家昊
金子睿
罗香华
卢楷文
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Huazhong University of Science and Technology
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Abstract

本发明公开了一种抗简单功耗分析攻击的高斯采样电路,包括:控制模块、随机数产生模块、二分比较模块、第一单口RAM、采样结果输出模块以及功耗信息掩盖模块;控制模块用于控制电路的状态转移和使能;随机数产生模块通过移位寄存器产生均匀分布的随机数;二分比较模块采用二分搜索算法定位随机数在具有高斯分布的分布累积函数表中的地址;采样结果输出模块将所定位的地址进行取模操作形成采样输出;功耗信息掩盖模块通过二分搜索随机数在伪分布累积函数表中的地址来产生随机功耗。本发明的电路能够有效掩盖采样过程的功耗信息,实现抵抗选择输入简单攻击分析的特性。

Figure 201910866396

The invention discloses a Gauss sampling circuit for resisting simple power consumption analysis attack, comprising: a control module, a random number generation module, a binary comparison module, a first single-port RAM, a sampling result output module and a power consumption information masking module; It is used for the state transfer and enable of the control circuit; the random number generation module generates uniformly distributed random numbers through the shift register; the binary comparison module uses the binary search algorithm to locate the address of the random number in the distribution accumulation function table with Gaussian distribution; the sampling result The output module performs a modulo operation on the located address to form a sampling output; the power consumption information masking module generates random power consumption by binary search for the address of the random number in the pseudo-distribution accumulation function table. The circuit of the invention can effectively cover the power consumption information of the sampling process, and realize the characteristic of resisting the simple attack analysis of the selected input.

Figure 201910866396

Description

Gaussian sampling circuit capable of resisting simple power consumption analysis attack
Technical Field
The invention belongs to the field of information security algorithm circuit implementation, and particularly relates to a Gaussian sampling circuit capable of resisting simple power consumption analysis attacks.
Background
With the development of quantum computing, the security of the traditional public key encryption system is threatened. The public key encryption system based on the lattice theory becomes a cryptosystem with great potential in the later quantum era due to the characteristics of quantum attack resistance, high-efficiency encryption efficiency, simple hardware implementation and the like.
In a common lattice theory-based cryptosystem, errors satisfying a discrete gaussian distribution are utilized to conceal secret information. Therefore, the gaussian sampling circuit is an important module for forming the hardware circuit of the cryptosystem based on the lattice theory. Although the lattice cryptosystem can effectively resist the attack of the quantum algorithm, the hardware circuit of the lattice cryptosystem is threatened by the attack of the side channel as the traditional public key cryptosystem. An attacker can recover a ciphertext and a secret key by using side channel information leaked by the Gaussian sampling circuit, so that the design of the Gaussian sampling circuit for resisting the side channel attack is necessary in order to realize a cipher system based on lattice theory in future daily application.
The side channel attack technique includes: time analysis attacks, power consumption analysis attacks, electromagnetic attacks, calculation fault attacks and the like. Among them, the power consumption analysis attack is recognized as a powerful means for stealing private information due to its characteristics of high efficiency, simple implementation and less resources required. According to the side channel information analysis principle, the power consumption analysis technique can be specifically divided into: simple power consumption analysis, differential power consumption analysis, correlation power consumption analysis and the like. The simple power consumption analysis technology can obtain the power consumption characteristics leaked when the equipment executes operation through selection input, and then compare and analyze the power consumption characteristics with the template power consumption curve so as to conjecture the private information. The method is a method for obtaining private information by observing and analyzing a small amount of power consumption curves. For the gaussian sampling circuit, the current research mainly focuses on resisting time analysis attack, and the research on resisting simple power analysis attack is few, so that the method has great significance for the design and research of the gaussian sampling circuit with the capacity of resisting simple power analysis attack.
Disclosure of Invention
Aiming at the defects of the prior art, the invention aims to provide a Gaussian sampling circuit resisting simple power consumption analysis attack, and aims to cover power consumption information in the Gaussian sampling process and solve the problem of resisting the attack of selecting and inputting simple power consumption analysis.
In order to achieve the purpose, the invention provides a Gaussian sampling circuit for resisting simple power consumption analysis attack, which comprises a control module, a random number generation module, a binary comparison module, a first single-port RAM, a sampling result output module and a power consumption information covering module, wherein the control module is used for generating a random number; the output end of the random number generation module is respectively connected with the input end of the binary comparison module and the input end of the power consumption information covering module, the output end of the first single-port RAM is connected with the other input end of the binary comparison module, and the input end of the sampling result output module is connected with the output end of the binary comparison module;
the control module is used for controlling state transition and enabling of the circuit; the random number generation module generates uniformly distributed random numbers through a shift register; the binary comparison module adopts binary search to locate the address of the random number in the distribution accumulation function table to obtain a sampling result under the probability value of the random number; the first single-port RAM is used for storing a distribution accumulation function table; the sampling result output module is used for carrying out modulus operation on the sampling result of the binary comparison module to generate output; the power consumption information covering module is used for covering the actual sampling power consumption information by comparing and generating random power consumption, and the resistance effect on simple power consumption attack is realized.
Preferably, the binary comparison module includes an address pointer register and a first comparator, an output end of the first comparator is connected to an input end of the address pointer register, and the first comparator is configured to compare data read by the first single-port RAM storing the distribution accumulation function table with the generated random number, and modify the address pointer register successively according to an output of the first comparator.
Preferably, the first single-port RAM stores a distribution accumulation function table having a gaussian distribution, addresses of which are gaussian sample values, and data stored at each address is a probability accumulation starting from an initial address to the address.
Preferably, the power consumption information masking module comprises a second single-port RAM storing the pseudo distribution cumulative function table, a shift register and a second comparator, and an output end of the second single-port RAM storing the pseudo distribution cumulative function table is connected with the second comparator and used for providing a second comparison data source and generating the random power consumption information.
Preferably, the power consumption information masking module uses binary search to locate the address of the random number in the pseudo-distribution cumulative function table to obtain the comparison result.
Preferably, the binary search gradually reduces the sampling range by setting the register pointer multiple times, and finally locates to the sampling result.
Preferably, the pseudo distribution accumulation function table stored in the second single-port RAM is the same in value as the distribution accumulation function table stored in the first single-port RAM, and the storage sequence is different.
According to the technical scheme, the random numbers which are uniformly distributed are generated through the random number generation module, the binary comparison module reads the distribution accumulation function stored in the single-port RAM under the action of the control module and compares the distribution accumulation function with the uniform random numbers, the address pointer register is updated through the binary search algorithm, the pointer address confirms the symbol and performs the modulus operation in the sampling result output module, and the sampling result is output, so that the sampling meeting the discrete Gaussian distribution is realized, the complexity in the sampling process is greatly reduced, and the operation efficiency of the circuit is improved. As a means for resisting simple power consumption attack, random power consumption is generated in each period of the sampling process through the power consumption information covering module, and power consumption information leaked out by the sampling circuit due to the execution of a sampling algorithm is covered, so that the attack of selecting and inputting simple power consumption analysis is effectively resisted.
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FIG. 1 is a schematic structural diagram of a Gaussian sampling circuit for resisting simple power analysis attacks provided by the invention;
fig. 2 is a flow chart of a binary search algorithm of the gaussian sampling circuit provided by the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention. In addition, the technical features involved in the embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
Fig. 1 is a structural diagram of a gaussian sampling circuit for resisting simple power analysis attack according to an embodiment of the present invention, including a control module, a random number generation module, a binary comparison module, a first single-port RAM, a sampling result output module, and a power consumption information masking module; the output end of the random number generation module is respectively connected with the input end of the binary comparison module and the input end of the power consumption information covering module, the output end of the first single-port RAM is connected with the other input end of the binary comparison module, and the input end of the sampling result output module is connected with the output end of the binary comparison module;
the control module is used for controlling state transition and enabling of the circuit; the random number generation module generates uniformly distributed random numbers through a shift register; the binary comparison module adopts binary search to locate the address of the random number in the distribution accumulation function table to obtain a sampling result under the probability value of the random number; the first single-port RAM is used for reading a distribution accumulation function table as a first comparison data source; the sampling result output module is used for carrying out modulus operation on the sampling result of the binary comparison module to generate output; the power consumption information covering module is used for covering the actual sampling power consumption information by comparing and generating random power consumption, and the resistance effect on simple power consumption attack is realized.
Specifically, the random number generation module comprises a 112bit register and a shift circuit. The random number generation module takes an external 32-bit uniform random number generator as a random number source, a 112-bit register stores random numbers, and then a displacement circuit carries out displacement operation.
Specifically, the binary comparison module comprises an address pointer register and a first comparator, wherein the output end of the first comparator is connected with the input end of the address pointer register, and the binary comparison module is used for comparing data read by a first single-port RAM storing a distribution accumulation function table with a generated random number and gradually modifying the address pointer register according to the output of the first comparator. When the sampling is completed for a 112bit random number, the module performs a binary search according to the algorithm. The principle of the binary search algorithm is shown in fig. 2, and three pointers of min, max and mid represent the head and tail and the middle position of the binary interval respectively. During sampling, the range of sampled outputs always falls between { min, max }. Wherein, inputting the relevant parameters comprises: precision parameter λ, tail distribution parameter ZtSign bit s e {0,1}, uniform random number r e {0,1, …, (2)λ-1)}. By comparing the CDT values pointed by the random input and the intermediate value, the range of the interval where the sampling output value falls is reduced, and each comparison can reduce the current interval by half, so that the current interval is fixed by [ log ]2zt]A specific sampling result may be determined by the secondary comparison.
And comparing once in each clock cycle, updating the values of the pointers min and max of the register according to the comparison result to reduce the binary search interval, and accessing and reading the first single-port RAM for storing the CDT data by using the pointer mid as an address to obtain the data for comparison in the next cycle. And obtaining a result k through binary search of 6 clock periods. And the sampling result output circuit determines the sign of the sampling result according to the one-bit uniform random number and outputs the sign. Plus one initialization period, the sampler needs 8 periods for binary search and result output. Since the generation of 112 bits of random number for comparison requires only 4 cycles and the circuit implemented is independent of binary search. The sampler is thus designed in a pipelined structure, while the generation of the current sample value takes place, while the random number for the next sampling process is collected. Thus, a sample satisfying discrete Gaussian distribution can be generated by fixing 8 clock cycles, and the time analysis attack resistance is achieved.
Specifically, the first single-port RAM stores a distribution accumulation function table having a gaussian distribution.
Specifically, the power consumption information masking module comprises a second single-port RAM (CDT _ fail) storing a pseudo distribution accumulation function table, a Linear Feedback Shift Register (LFSR) and a 112bit second comparator, wherein an output end of the single-port RAM storing the pseudo distribution accumulation function table is connected with the second comparator and used for providing a second comparison data source and generating random power consumption information. The LFSR outputs a 6-bit random number rng _ FAKE as an address input to the CDT _ FAKE every cycle. The CDT _ FAKE stores CDT values t (x) in the same manner as the first single-port RAM, but the order of storage is randomly disturbed. And comparing the data read from the CDT _ FAKE with the 112bit random number to generate a comparison result FAKE _ flag output, wherein the result and the binary comparison module are independent. The output of the power consumption information covering module has no influence on the sampling result, and the power consumption information covering module has the functions of generating random power consumption in each period of the sampling process and covering the power consumption information leaked out by the sampling circuit due to the execution of the sampling algorithm, so that the attack of selecting and inputting simple power consumption analysis is effectively resisted.
It will be understood by those skilled in the art that the foregoing is only a preferred embodiment of the present invention, and is not intended to limit the invention, and that any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the scope of the present invention.

Claims (6)

1.一种抗简单功耗分析攻击的高斯采样电路,其特征在于,包括控制模块、随机数产生模块、二分比较模块、第一单口RAM、采样结果输出模块以及功耗信息掩盖模块;所述随机数产生模块的输出端分别与所述二分比较模块的输入端、所述功耗信息掩盖模块的输入端连接,所述第一单口RAM的输出端与所述二分比较模块的另一个输入端连接,所述采样结果输出模块的输入端与所述二分比较模块的输出端连接;1. a Gaussian sampling circuit against simple power consumption analysis attack, is characterized in that, comprises control module, random number generation module, binary comparison module, first single-port RAM, sampling result output module and power consumption information masking module; Described The output end of the random number generation module is respectively connected with the input end of the binary comparison module and the input end of the power consumption information masking module, and the output end of the first single-port RAM is connected with the other input end of the binary comparison module. connection, the input end of the sampling result output module is connected with the output end of the binary comparison module; 所述控制模块用于控制电路的状态转移和使能;所述随机数产生模块通过移位寄存器产生均匀分布的随机数;所述二分比较模块采用二分搜索定位随机数在分布累积函数表中的地址,得到该随机数概率值下的采样结果;所述第一单口RAM用于存放分布累积函数表;所述采样结果输出模块用于对所述二分比较模块的采样结果进行取模运算产生输出;所述功耗信息掩盖模块包括一个存放伪分布累积函数表的第二单口RAM、位移寄存器和第二比较器,所述存放伪分布累积函数表的第二单口RAM的输出端与所述第二比较器连接,用于提供第二比较数据源,产生随机功耗信息,实现对简单功耗攻击的抵抗作用。The control module is used to control the state transfer and enable of the circuit; the random number generation module generates a uniformly distributed random number through a shift register; the binary comparison module uses a binary search to locate the random number in the distribution accumulation function table. address to obtain the sampling result under the probability value of the random number; the first single-port RAM is used to store the distribution accumulation function table; the sampling result output module is used to perform a modulo operation on the sampling result of the binary comparison module to generate an output Described power consumption information masking module comprises a second single-port RAM, shift register and second comparator that store pseudo-distribution accumulation function table, the output end of the second single-port RAM of described storage pseudo-distribution accumulation function table and the The two comparators are connected to provide a second comparison data source, generate random power consumption information, and achieve resistance to simple power consumption attacks. 2.根据权利要求1所述的高斯采样电路,其特征在于,所述二分比较模块包括地址指针寄存器和第一比较器,所述第一比较器的输出端与所述地址指针寄存器的输入端连接,用于将存放分布累积函数表的第一单口RAM读取的数据与产生的随机数进行比较,根据第一比较器输出逐次修改地址指针寄存器。2. Gauss sampling circuit according to claim 1, is characterized in that, described binary comparison module comprises address pointer register and first comparator, the output end of described first comparator and the input end of described address pointer register The connection is used for comparing the data read by the first single-port RAM storing the distribution accumulation function table with the generated random number, and modifying the address pointer register successively according to the output of the first comparator. 3.根据权利要求2所述的高斯采样电路,其特征在于,所述分布累积函数表的分布累积函数为高斯分布函数,分布累积函数表的地址为高斯采样值,每个地址存放的数据为从初始地址开始到该地址的概率累积。3. Gauss sampling circuit according to claim 2, is characterized in that, the distribution accumulation function of described distribution accumulation function table is Gaussian distribution function, and the address of distribution accumulation function table is Gaussian sampling value, and the data that each address stores is The probability accumulates from the initial address to this address. 4.根据权利要求1所述的高斯采样电路,其特征在于,所述功耗信息掩盖模块采用二分搜索定位随机数在伪分布累积函数表中的地址,得到比较结果。4 . The Gaussian sampling circuit according to claim 1 , wherein the power consumption information masking module adopts binary search to locate the address of the random number in the pseudo-distribution accumulation function table to obtain the comparison result. 5 . 5.根据权利要求1或4所述的高斯采样电路,其特征在于,所述二分搜索通过多次设置寄存器指针,逐次缩小采样范围,最终定位到采样结果。5 . The Gaussian sampling circuit according to claim 1 or 4 , wherein the binary search is performed by setting the register pointer multiple times, narrowing the sampling range successively, and finally locating the sampling result. 6 . 6.根据权利要求1所述的高斯采样电路,其特征在于,所述第二单口RAM存放的伪分布累积函数表与第一单口RAM存放的分布累积函数表值相同,存放的顺序不同。6 . The Gaussian sampling circuit according to claim 1 , wherein the pseudo-distribution accumulation function table stored in the second single-port RAM has the same value as the distribution accumulation function table stored in the first single-port RAM, and the storage order is different. 7 .
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