CN110676902A - Bootstrap circuit and chip supporting quick charging - Google Patents
Bootstrap circuit and chip supporting quick charging Download PDFInfo
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- CN110676902A CN110676902A CN201910931822.4A CN201910931822A CN110676902A CN 110676902 A CN110676902 A CN 110676902A CN 201910931822 A CN201910931822 A CN 201910931822A CN 110676902 A CN110676902 A CN 110676902A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/007—Regulation of charging or discharging current or voltage
Abstract
The application provides a bootstrap circuit of quick charge, through setting up voltage detection module and switch module, makes voltage detection module control switch module's operating condition when charging to make under certain condition, make switch module be in the on-state, in order to realize the quick charge to voltage output.
Description
Technical Field
The present invention relates to the field of integrated circuit technologies, and in particular, to a bootstrap circuit and a chip for fast charging.
Background
With the continuous development of science and technology, more and more product applications all need power chips such as D class power amplifier and motor drive, and it all has advantages such as high voltage, drive capability are big and with low costs.
In order to reduce the chip area and the cost without sacrificing the driving capability, the traditional technical means is to replace an output power level power PMOS tube with a power NMOS tube, and in the high-voltage DMOS process, a DNMOS tube with the same on-resistance is three to four times smaller than a DPMOS tube, so that the chip area is greatly reduced.
The bootstrap circuit adopted in the chip can fully charge the capacitor and then enable a certain part in the amplifying circuit to generate a bootstrap phenomenon, so that the purposes of improving the voltage of the circuit and expanding the output dynamic range of the circuit are achieved, the voltage of the capacitor is superposed with the voltage of a power supply, and the voltage of the voltage output end of the bootstrap circuit is increased.
However, the current bootstrap circuit does not have the function of fast charging.
Disclosure of Invention
In view of the above, to solve the above problems, the present invention provides a bootstrap circuit and a chip supporting fast charging, and the technical solution of an embodiment of the present invention is as follows:
a bootstrap circuit for supporting fast charging, the bootstrap circuit comprising: the voltage detection circuit comprises a first field effect transistor, a capacitor, a switch module, a voltage detection module and a voltage difference generation module;
the drain electrode of the first field effect transistor is connected with the upper electrode plate of the capacitor through a first connecting node, and the first connecting node is connected with the voltage output end of the bootstrap circuit;
the grid electrode of the first field effect transistor is connected with the first end of the differential pressure generation module, the second end of the differential pressure generation module is connected with the lower pole plate of the capacitor through a second connection node, and the second connection node is connected with the first voltage input end of the bootstrap circuit;
the source electrode of the first field effect transistor is connected with a second voltage input end;
the first end of the switch module is connected with the second voltage input end, the second end of the switch module is connected with the voltage output end, and the third end of the switch module is connected with one end of the voltage detection module;
the other end of the voltage detection module is connected with the second voltage input end and is connected with a grid electrode of the first field effect transistor and a connection node of the voltage difference generation module;
when the voltage value of the first voltage input end is in a rising state, if the voltage detection module detects that the voltage difference value between the grid voltage of the first field effect transistor and the voltage value of the second voltage input end meets a preset voltage value, the switch module is controlled to be in a starting state, and the second voltage input end charges the capacitor through the switch module.
Preferably, in the bootstrap circuit, the first field effect transistor is an N-type field effect transistor.
Preferably, in the bootstrap circuit, the voltage detection module includes: second to fifth field effect transistors, a first current source, a second current source, and a third current source;
the grid electrode of the second field effect transistor is connected with the grid electrode of the third field effect transistor through a third connecting node, and the third connecting node is connected with the connecting node of the second current source and the fourth field effect transistor;
the source electrode of the second field effect transistor is connected with the source electrode of the third field effect transistor through a fourth connecting node, and the fourth connecting node is connected with the switch module;
the drain electrode of the second field effect transistor is connected with the connection node of the first current source and the fifth field effect transistor, and the drain electrode of the third field effect transistor is connected with the second voltage input end;
one end of the second current source is connected with the drain electrode of the fourth field effect transistor, and the other end of the second current source is connected with the second voltage input end;
the source electrode of the fourth field effect transistor is connected with the first end of the differential pressure generation module, and the grid electrode of the fourth field effect transistor is connected with the grid electrode of the fifth field effect transistor and connected to a bias voltage end;
one end of the first current source is connected with the drain electrode of the fifth field effect transistor, and the other end of the first current source is connected with the second voltage input end;
and the source electrode of the fifth field effect transistor is grounded through the third current source.
Preferably, in the bootstrap circuit, the first current source and the third current source are the same.
Preferably, in the bootstrap circuit, the second field effect transistor is an N-type field effect transistor, and the third to fifth field effect transistors are all P-type field effect transistors.
Preferably, in the bootstrap circuit described above, the voltage difference generation module includes: a first resistor and sixth to eighth field effect transistors;
the grid electrode of the sixth field effect transistor is connected with the source electrode and serves as the first end of the differential pressure generation module;
the drain electrode of the sixth field effect transistor is connected with the drain electrode of the seventh field effect transistor;
the grid electrode and the source electrode of the seventh field effect transistor are connected through a fifth connecting node, and the fifth connecting node is connected with the source electrode of the eighth field effect transistor;
the grid electrode of the eighth field effect transistor is connected with the source electrode, and the drain electrode of the eighth field effect transistor is connected with the first end of the first resistor;
and the second end of the first resistor is used as the second end of the voltage difference generation module and is connected with the first voltage input end.
Preferably, in the bootstrap circuit, the sixth field effect transistor and the eighth field effect transistor are both N-type field effect transistors;
the seventh field effect transistor is a P-type field effect transistor.
Preferably, in the bootstrap circuit, the switch module is a ninth field effect transistor;
the drain electrode of the ninth field effect transistor is connected with the second voltage input end;
the source electrode of the ninth field effect transistor is connected with the voltage output end;
and the grid electrode of the ninth field effect transistor is connected with the voltage detection module.
Preferably, in the bootstrap circuit, the ninth fet is a P-type fet.
A chip comprising the bootstrap circuit of any one of the above.
Compared with the prior art, the invention has the following beneficial effects:
the application provides a pair of bootstrap circuit makes through setting up voltage detection module and switch module voltage detection module control switch module's operating condition when charging to make under certain condition, make switch module be in the on-state, in order to realize the quick charge to voltage output.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a bootstrap circuit according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of another bootstrap circuit provided in the embodiment of the present invention;
FIG. 3 is a schematic structural diagram of a pressure difference generating module according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of another bootstrap circuit provided in the embodiment of the present invention;
fig. 5 is a waveform diagram of a bootstrap circuit according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in further detail below.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a bootstrap circuit according to an embodiment of the present invention.
The bootstrap circuit includes: a first field effect transistor MN1 and a capacitor CBTSP A switch module 11, a voltage detection module 12 and a voltage difference generation module 13;
wherein the drain of the first FET MN1 and the capacitor CBTSPThe upper pole plate of the bootstrap circuit is connected with a first connecting node, and the first connecting node is connected with a voltage output end VBTSP of the bootstrap circuit;
the gate of the first fet MN1 is connected to the first terminal of the differential pressure generating module 13, and the second terminal of the differential pressure generating module 13 is connected to the capacitor CBTSPThe lower pole plate of the bootstrap circuit is connected with a first voltage input end of the bootstrap circuit through a first connection node;
the source electrode of the first field effect transistor MN1 is connected with a second voltage input end;
the first end of the switch module 11 is connected to the second voltage input end, the second end is connected to the voltage output end, and the third end is connected to one end of the voltage detection module 12;
the other end of the voltage detection module 12 is connected to the second voltage input end, and is connected to a connection node between the gate of the first fet MN1 and the differential pressure generation module 13;
when the voltage value of the first voltage input end is in a rising state, if the voltage detection module 12 detects that the difference between the gate voltage of the first field effect transistor MN1 and the voltage VRGE of the second voltage input end satisfies a preset voltage value, the switch module 11 is controlled to be in a turn-on state, and the second voltage input end couples the capacitor C through the switch module 11BTSPAnd charging is carried out.
The first field effect transistor MN1 is an N-type field effect transistor.
In this embodiment, by providing the voltage detection module and the switch module, the voltage detection module controls the operating state of the switch module, so that the switch module is in an on state under a certain condition during charging, thereby realizing rapid charging of the voltage output terminal.
The specific working process is as follows:
when the voltage of the voltage output end is lower, the first field effect transistor MN1 is enabled to be turned on, and the second voltage input end is coupled to the capacitor C through the first field effect transistor MN1BTSPCharging is carried out when the capacitor C is chargedBTSPWhen the voltage of the upper plate is charged till the voltage of the upper plate is close to VIN + VBN1-VTH1, the first field effect tube MN1 is gradually turned off, when the voltage of the upper plate reaches VIN + VBN1-VTH1, the first field effect tube MN1 is turned off, and in the process that the first field effect tube MN1 is gradually turned off, the capacitor C is turned offBTSPWill gradually decrease. Where VIN is a voltage of the first voltage input terminal, VBN1 is a voltage provided by the voltage difference generating module 13, and VTH1 is a turn-on threshold voltage of the first fet NM 1.
When the voltage VIN of the first voltage input terminal rises, the capacitor CBTSPThe voltage difference between the two terminals, the voltage VBTSP at the voltage output terminal will rise, and the gate voltage of the first fet MN1 will also rise, wherein the gate voltage of the first fet MN1 is VBN1+ VIN.
Because a current source is arranged between the gate of the first field effect transistor MN1 and the second voltage input end, the gate voltage of the first field effect transistor MN1 is difficult to rise to the voltage VREG of the second voltage input end, and because the first field effect transistor MN1 opens the threshold voltage VTH1, when the voltage VBTSP of the voltage output end rises to VIN + VBN1-VTH1, the first field effect transistor MN1 is turned off, and in this case, the voltage VBTSP of the voltage output end is difficult to rise to VREG.
Therefore, in the embodiment of the present application, by providing the voltage detection module 12 for detecting the gate voltage of the first fet MN1, when it is detected that the gate voltage of the first fet MN1 rises to a certain value in the rising process of the voltage VIN of the first voltage input end, for example, when a voltage difference between the gate voltage of the first fet MN1 and the voltage VRGE of the second voltage input end satisfies a preset voltage value, the switch module 11 is in an on state, and the second voltage input end continues to apply to the capacitor C through the branch where the switch module 11 is locatedBTSPCharging to charge the voltage VBTSP at the voltage output endTo VREG, thereby making the capacitor CBTSPThe voltage difference is VREG-VIN, and the purpose of quick charging is realized.
In the early stage of the charging process, the first field effect transistor MN1 is in an on state, and the second voltage input terminal is opposite to the capacitor CBTSPAnd charging is carried out. When the voltage of the voltage output end continuously rises, the first field effect transistor MN1 is disconnected; correspondingly, the voltage detection module 12 enables the switch module 11 to be in the on state, and the second voltage input end continues to be opposite to the capacitor CBTSPAnd charging is carried out.
Further, referring to fig. 2, fig. 2 is a schematic structural diagram of another bootstrap circuit provided in the embodiment of the present invention.
The voltage detection module 12 includes: second to fifth field effect transistors, a first current source IB1, a second current source IB2 and a third current source IB 3;
wherein the gate of the second fet MN2 and the gate of the third fet MP3 are connected by a third connection node, and the third connection node is connected to the connection node of the second current source IB2 and the fourth fet MP 2;
the source of the second fet MN2 is connected to the source of the third fet MP3 via a fourth connection node, and the fourth connection node is connected to the switch module 11;
the drain electrode of the second field effect transistor MN2 is connected with the connection node of the first current source IB1 and the fifth field effect transistor MP1, and the drain electrode of the third field effect transistor MP3 is connected with the second voltage input end;
one end of the second current source IB2 is connected to the drain of the fourth fet MP2, and the other end is connected to the second voltage input terminal;
the source of the fourth fet MP2 is connected to the first end of the voltage difference generating module 13, and the gate thereof is connected to the gate of the fifth fet MP1 and connected to a bias voltage terminal;
one end of the first current source IB1 is connected to the drain of the fifth fet MP1, and the other end is connected to the second voltage input terminal;
the source of the fifth fet MP1 is grounded via the third current source IB 3.
Further, according to the above embodiment of the present invention, the first current source IB1 and the third current source IB3 are the same.
Further, based on the above embodiments of the present invention, the second fet MN2 is an N-type fet, and the third to fifth fets are all P-type fets.
Further, based on the above-mentioned embodiment of the present invention, referring to fig. 3, fig. 3 is a schematic structural diagram of a pressure difference generating module according to an embodiment of the present invention.
The differential pressure generating module includes: a first resistor R1 and sixth to eighth field effect transistors;
the grid electrode and the source electrode of the sixth field effect transistor MN3 are connected and used as the first end of the voltage difference generation module;
the drain electrode of the sixth field effect transistor MN3 is connected with the drain electrode of the seventh field effect transistor MP 6;
the gate and the source of the seventh fet MP6 are connected by a fifth connection node, and the fifth connection node is connected to the source of the eighth fet MN 4;
the grid electrode of the eighth field-effect transistor MN4 is connected with the source electrode, and the drain electrode of the eighth field-effect transistor MN4 is connected with the first end of the first resistor R1;
a second end of the first resistor R1 is connected to the first voltage input end as a second end of the voltage difference generating module.
The sixth field-effect transistor MN3 and the eighth field-effect transistor MN4 are both N-type field-effect transistors;
the seventh field effect transistor MP6 is a P-type field effect transistor.
In this embodiment, the sum of | VGS |, and IB2 | R1 of three field effect transistors are superimposed to obtain VBN1, that is, VBN1 | VGS _ N3+ | VGS _ P6 | + VGS _ N4+ IB2 | R1.
Due to the series design of the three field effect transistors, the required IB2 and R1 values become small, and further power consumption and resistance area are saved.
Further based on the above-mentioned embodiment of the present invention, referring to fig. 4, fig. 4 is a schematic structural diagram of another bootstrap circuit provided in the embodiment of the present invention.
The switch module is a ninth field effect transistor MP 4;
the drain electrode of the ninth field effect transistor MP4 is connected with the second voltage input end;
the source electrode of the ninth field effect transistor MP4 is connected with the voltage output end;
the gate of the ninth fet MP4 is connected to the voltage detection module 13.
Wherein, the ninth field effect transistor MP4 is a P-type field effect transistor.
Based on all the above embodiments of the present invention, the following describes a specific operation process of the bootstrap circuit.
Referring to fig. 5, fig. 5 is a waveform diagram of a bootstrap circuit according to an embodiment of the present invention.
The voltage VREG of the second voltage input terminal is set to VBN1+ VH2, where VH2 is the high level voltage of the first voltage input terminal VIN.
The VBP1 is the bias voltage of MP2 and MP1, and by designing VBP1, MP1 and MP2, IB 2: IB1 ═ M: 1, (W/L)MP2：(W/L)MP1M: 1, when the voltage VIN at the first voltage input terminal is at a low level VL2, making VREG-i VGS 1 i > Vthp i, VREG-i VGS _ MP2 i > Vthp i and VREG-VBP2 > Vthn, the purpose of which is as follows:
when the voltage VIN at the first voltage input terminal rises to a certain degree, MP2 enters a linear region, so that VBP3-VBP2 > Vthn, and when MP3 is turned off and MN2 is turned on, MP4 is turned on, and the voltage VBTSP at the voltage output terminal is pulled up rapidly.
The voltage difference generation module is used for generating a VBN1 voltage, namely a voltage difference value VBTSP-VIN of the bootstrap capacitor.
When the voltage VIN of the first voltage input terminal is at the low level VL2, the current IB2 flows through the MP2 and the voltage difference generating module, the gate voltage of MN1 is VBN1+ VIN, MN1 turns on the bootstrap capacitor CBTSPCharging is performed so that VBTSP-VIN becomes VBN 1. Since the gate voltage VBN1+ VL2 of MN1 is relatively not high, MP2 operates in the saturation region, therebyIn IB 2: IB1 ═ M: 1 and (W/L)MP2：(W/L)MP1M: 1, so VBP2 is VBP3, MN2 is off, MP3 is on, and the gate voltage of MP4 is pulled down to the voltage VREG of the second voltage input terminal, so that MP4 is off.
When the voltage VIN of the first voltage input terminal rises from the low level VL2 to the high level VH2, MN1 is turned on to the bootstrap capacitor CBTSPAnd charging is carried out.
When the voltage VIN of the first voltage input terminal rises from the low level VL2 to approach the high level VH2, the bootstrap capacitor CBTSPIn the process that the voltage of the upper plate rises to be close to VBN1+ VH2-Vthn, MN1 enters a subthreshold region and even a turn-off region, and if MP4 is not available, a bootstrap capacitor CBTSPThe voltage of the upper plate can not rise any more, resulting in a bootstrap capacitor CBTSPThe voltage difference between the upper and lower substrates is less than VBN 1.
However, after the MP4 is set, when the gate voltage VBN1+ VIN of MN1 also becomes VBN1+ VH2, the circuit design VREG — VH2+ VBBN1 will make MP2 enter the linear region, so that VBP3 becomes close to VREG — VBN1+ VH2, so VGS _ N2 — VBP3-VBP2 — VREG-VBP2 > Vthn of MN 2.
At this time, MP2 is turned on, the gate voltage of MP4 is connected to VBP2, and since VREG-VGS _ MP1 | > Vthp |, by biasing VBP1, MP4 is turned on, and the bootstrap capacitor C is connected to the bootstrap capacitor CBTSPFast charging to VREG is performed so that bootstrap capacitor CBTSPThe voltage difference between the two ends rises to VBN1 quickly, and the bootstrap capacitor C is further improvedBTSPThe fast response speed of the display.
When the voltage VIN of the first voltage input end is changed from a high level VH2 to VL2, the bootstrap capacitor C is enabled to be realized through the characteristic that the voltage difference between the two ends of the capacitor is not abrupt changeBTSPThe upper plate voltage VBTSP is reduced along with VIN, so that the voltage difference between two ends of the capacitor cannot be suddenly changed.
Furthermore, as shown in fig. 5, the voltage VBTSP of the voltage output terminal will automatically increase and decrease with the increase of the first voltage input terminal VIN, and the bootstrap capacitor C thereof will decreaseBTSPThe voltage difference across is VBN1 at all times.
Based on all the above embodiments of the present invention, in another embodiment of the present invention, a chip is further provided, where the chip includes the bootstrap circuit described above, and can achieve the purpose of fast charging and discharging.
The fast-charging bootstrap circuit and the fast-charging bootstrap chip provided by the present invention are described in detail above, and a specific example is applied in the present document to explain the principle and the implementation of the present invention, and the description of the above embodiment is only used to help understanding the method and the core idea of the present invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.
It should be noted that, in the present specification, the embodiments are all described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments may be referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.
It is further noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include or include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (10)
1. A bootstrap circuit for supporting fast charging, the bootstrap circuit comprising: the voltage detection circuit comprises a first field effect transistor, a capacitor, a switch module, a voltage detection module and a voltage difference generation module;
the drain electrode of the first field effect transistor is connected with the upper electrode plate of the capacitor through a first connecting node, and the first connecting node is connected with the voltage output end of the bootstrap circuit;
the grid electrode of the first field effect transistor is connected with the first end of the differential pressure generation module, the second end of the differential pressure generation module is connected with the lower pole plate of the capacitor through a second connection node, and the second connection node is connected with the first voltage input end of the bootstrap circuit;
the source electrode of the first field effect transistor is connected with a second voltage input end;
the first end of the switch module is connected with the second voltage input end, the second end of the switch module is connected with the voltage output end, and the third end of the switch module is connected with one end of the voltage detection module;
the other end of the voltage detection module is connected with the second voltage input end and is connected with a grid electrode of the first field effect transistor and a connection node of the voltage difference generation module;
when the voltage value of the first voltage input end is in a rising state, if the voltage detection module detects that the voltage difference value between the grid voltage of the first field effect transistor and the voltage value of the second voltage input end meets a preset voltage value, the switch module is controlled to be in a starting state, and the second voltage input end charges the capacitor through the switch module.
2. The bootstrap circuit of claim 1, wherein the first field effect transistor is an N-type field effect transistor.
3. The bootstrap circuit of claim 1, wherein the voltage detection module comprises: second to fifth field effect transistors, a first current source, a second current source, and a third current source;
the grid electrode of the second field effect transistor is connected with the grid electrode of the third field effect transistor through a third connecting node, and the third connecting node is connected with the connecting node of the second current source and the fourth field effect transistor;
the source electrode of the second field effect transistor is connected with the source electrode of the third field effect transistor through a fourth connecting node, and the fourth connecting node is connected with the switch module;
the drain electrode of the second field effect transistor is connected with the connection node of the first current source and the fifth field effect transistor, and the drain electrode of the third field effect transistor is connected with the second voltage input end;
one end of the second current source is connected with the drain electrode of the fourth field effect transistor, and the other end of the second current source is connected with the second voltage input end;
the source electrode of the fourth field effect transistor is connected with the first end of the differential pressure generation module, and the grid electrode of the fourth field effect transistor is connected with the grid electrode of the fifth field effect transistor and connected to a bias voltage end;
one end of the first current source is connected with the drain electrode of the fifth field effect transistor, and the other end of the first current source is connected with the second voltage input end;
and the source electrode of the fifth field effect transistor is grounded through the third current source.
4. The bootstrap circuit of claim 3, wherein the first current source and the third current source are the same.
5. The bootstrap circuit of claim 3, wherein the second FET is an N-type FET, and the third to fifth FETs are P-type FETs.
6. The bootstrap circuit of claim 1, wherein the voltage difference generation module comprises: a first resistor and sixth to eighth field effect transistors;
the grid electrode of the sixth field effect transistor is connected with the source electrode and serves as the first end of the differential pressure generation module;
the drain electrode of the sixth field effect transistor is connected with the drain electrode of the seventh field effect transistor;
the grid electrode and the source electrode of the seventh field effect transistor are connected through a fifth connecting node, and the fifth connecting node is connected with the source electrode of the eighth field effect transistor;
the grid electrode of the eighth field effect transistor is connected with the source electrode, and the drain electrode of the eighth field effect transistor is connected with the first end of the first resistor;
and the second end of the first resistor is used as the second end of the voltage difference generation module and is connected with the first voltage input end.
7. The bootstrap circuit of claim 6, wherein the sixth field effect transistor and the eighth field effect transistor are both N-type field effect transistors;
the seventh field effect transistor is a P-type field effect transistor.
8. The bootstrap circuit of claim 1, wherein the switch module is a ninth field effect transistor;
the drain electrode of the ninth field effect transistor is connected with the second voltage input end;
the source electrode of the ninth field effect transistor is connected with the voltage output end;
and the grid electrode of the ninth field effect transistor is connected with the voltage detection module.
9. The bootstrap circuit of claim 8, wherein the ninth fet is a P-type fet.
10. A chip comprising a bootstrap circuit as claimed in any one of claims 1 to 9.
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