CN110674614A - Signal eye diagram analysis method based on RX MASK central dot matrix - Google Patents

Signal eye diagram analysis method based on RX MASK central dot matrix Download PDF

Info

Publication number
CN110674614A
CN110674614A CN201910864147.8A CN201910864147A CN110674614A CN 110674614 A CN110674614 A CN 110674614A CN 201910864147 A CN201910864147 A CN 201910864147A CN 110674614 A CN110674614 A CN 110674614A
Authority
CN
China
Prior art keywords
mask
signal
eye diagram
margin
effective
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201910864147.8A
Other languages
Chinese (zh)
Other versions
CN110674614B (en
Inventor
王彦辉
郑浩
李川
张春林
刘骁
胡晋
张弓
於凌
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Wuxi Jiangnan Computing Technology Institute
Original Assignee
Wuxi Jiangnan Computing Technology Institute
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Wuxi Jiangnan Computing Technology Institute filed Critical Wuxi Jiangnan Computing Technology Institute
Priority to CN201910864147.8A priority Critical patent/CN110674614B/en
Publication of CN110674614A publication Critical patent/CN110674614A/en
Application granted granted Critical
Publication of CN110674614B publication Critical patent/CN110674614B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Abstract

The invention provides a signal eye diagram analysis method based on an RX MASK central dot matrix, which relates to the technical field of storage system engineering and comprises the following steps: s1: acquiring a stored data signal simulation eye pattern; s2: customizing the specification and size of the effective Rx MASK; s3: counting effective Rx MASK central dot matrixes; s4: analyzing and evaluating the stored signal eye diagram based on the MASK central dot matrix; s5: the optimal center point is obtained along with the swing margin and the timing margin. The signal eye diagram analysis method based on the RX MASK center dot matrix optimizes interconnection topological parameters, optimizes access and storage signal channels, quantificationally stores data signal eye diagram quality judgment standards, ensures that a storage system has sufficient design margins, can simulate the operation process of a training mechanism, selects the most appropriate central point according to the swing amplitude and time sequence priority weight proportion, and calculates the corresponding swing amplitude margin and time sequence margin.

Description

Signal eye diagram analysis method based on RX MASK central dot matrix
Technical Field
The invention relates to the technical field of storage system engineering,
in particular, the invention relates to a signal eye diagram analysis method based on an RX MASK central dot matrix.
Background
The important component of the computer system structure, the advanced storage system, has decisive influence on the performance index, the integration scale and the stable operation of the whole system. At present, a conventional high-speed parallel memory circuit technology, ddr (double data rate) series memories are widely used. Compared with DDR2/3, the access speed of the new generation DDR4 and the future DDR5 is greatly improved, and the requirement on the design capability of an access signal channel is also more severe. Unlike previous generations where the Vih/Vil decision level was defined, the DDR4 SDRAM Specification Standard JESD79-4B defines the data signal receiver Rx MASK size. Here, a rectangular MASK is defined, whose center point coordinates (VMIDPOINT, TDQS) require that the waveform/eye pattern of the signal not enter the MASK to ensure a certain level of error rate. For example, DDR4-3200 corresponds to MASK regions with a height of 110mV and a width of 0.23UI to achieve a 1E-16 BER level, where 1 UI = 312.5 ps.
Based on the JEDEC standard definition, Rx MASK is implanted into the simulated eye diagram, and the conventional method can only preliminarily judge whether one memory access signal channel design can meet the standard requirement. For example, scientific placement of the Rx MASK ensures that traces within the eye diagram for storing data signals do not enter the Rx MASK, even if JEDEC standard electrical requirements are met. At this time, the conventional method has several problems that are difficult to solve. The first problem is that the standard Rx MASK is only the minimum requirement to ensure correct identification, and in some cases, the system design lacks sufficient design margin and is difficult to resist the adverse operating environment and other SI/PI noise effects. The second problem is that there are many combinations of DDR memory interconnect topology parameters, such as drive internal Resistance (RON), termination (RODT), transmission channel (Z0), load condition (SR/DR), etc., and it is sometimes difficult to quantify what kind of parameter combination has a larger system design margin. The third problem is that, unlike the previous generations using SSTL-12 (Fixed VREF), DDR4 uses POD-12 interface circuit technology, the training phase must consider not only the Timing (Timing) condition, but also the varying reference Voltage (Variable VREF) condition, i.e., it is necessary to consider both the signal swing (Voltage) and Timing (Timing) together. The fourth problem is that the actual regulation capability of the VREF voltage, the timing parameter, of the memory control training is ignored. A fifth problem is that the 1/4 trace within the signal eye does not necessarily exhibit a monotonic (increasing or decreasing) behavior, and this irregular eye pattern places new higher requirements on the center point (VMIDPOINT, TDQS) selection.
In summary, the conventional method is difficult to effectively determine the eye diagram quality of the stored data signal, and is difficult to scientifically and reasonably select the optimal central point position, so how to design a reasonable signal eye diagram analysis method based on the RX MASK central dot matrix becomes a problem that needs to be solved urgently at present.
Disclosure of Invention
The invention aims to provide a signal eye diagram analysis method based on an RX MASK central dot matrix, which is convenient for simulating the practical process steps of memory control training, comprehensively analyzes the signal swing amplitude and the time sequence margin, scientifically guides the selection of access and memory interconnection topological parameters and the design of an access and memory signal channel.
In order to achieve the purpose, the invention is realized by adopting the following technical scheme:
a method for analyzing an eye diagram of a signal based on an RX MASK central lattice, the method comprising the steps of:
s1: acquiring a stored data signal simulation eye pattern for developing analysis;
s2: customizing the specification and size of the effective Rx MASK;
s3: counting effective Rx MASK central dot matrixes;
s4: analyzing and evaluating the stored signal eye diagram based on the MASK central dot matrix;
s5: and obtaining the optimal central point and the corresponding swing margin and timing margin.
Preferably, the step S3 includes:
s31: programming and calculating an inner edge trace of the eye diagram of the stored data signal;
s32: traversing (gridding) all possible effective Rx MASK center points according to the training stepping parameters;
s33: counting the center points of all effective Rx MASKs located inside the eye pattern but not intersecting the trace line inside the eye pattern;
s34: and carrying out statistics to judge the quality of the eye diagram of the stored data signal.
Preferably, in step S34, the statistical content includes the number of central points and the V/T area occupied by the calculated central dot matrix.
As a preferred embodiment of the present invention, when step S1 is executed, pre-simulation or post-simulation is performed on the stored data signal, and at least one simulation test can be performed to obtain different simulation eye diagrams by using a circuit-level simulation tool for different parameter combinations of the DDR memory interconnect topology.
As a preferred embodiment of the present invention, step S2 is executed to simulate quantifiable noise introduced by the stored data signal, analyze the influence of the signal noise on the signal swing and timing margin, and add to obtain the specification size of the effective Rx MASK based on the JEDEC standard Rx MASK.
Preferably, step S3 is performed by programmatically calculating a center lattice that satisfies the effective Rx MASK based on the stored eye pattern of the data signal and the training adjustment steps.
Preferably, in step S3, the training adjustment step parameters include a sampling clock timing adjustment granularity and a reference power swing adjustment granularity.
Preferably, in step S4, the parameters for analyzing and evaluating the eye diagram of the stored signal include the number of central points, distribution and area size of the effective Rx MASK determination.
As a preferred embodiment of the present invention, when step S5 is executed, the interconnect topology parameters and the access signal channels are evaluated to determine whether they are good or bad, and whether they are good or not, and the interconnect topology parameters and the access signal channels are optimized, and the optimal central point and the corresponding swing margin and timing margin are obtained according to the weight ratio of the swing and timing priority.
The signal eye diagram analysis method based on the RX MASK central dot matrix has the beneficial effects that: optimizing interconnection topological parameters, optimizing a memory access signal channel, considering the influence of quantifiable and controlled noise, quantifying the eye diagram quality evaluation standard of the memory data signal, and ensuring that the memory system still has sufficient design margin. In addition, the working process of a training mechanism can be simulated, the most appropriate central point is selected according to the weight proportion of the swing amplitude and the time sequence priority, and the corresponding swing amplitude margin and the corresponding time sequence margin are calculated.
Drawings
FIG. 1 is a schematic flow chart of a signal eye diagram analysis method based on an RX MASK central lattice according to the present invention;
FIG. 2 is a schematic diagram of a central lattice search process of a signal eye diagram analysis method based on an RX MASK central lattice according to the present invention;
FIG. 3 is a signal eye diagram and a Rx MASK center dot diagram of a signal eye diagram analysis method based on an RX MASK center dot diagram according to the present invention.
Detailed Description
The following are specific examples of the present invention and further describe the technical solutions of the present invention, but the present invention is not limited to these examples.
Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that: the relative arrangement of the modules and steps set forth in these embodiments and steps do not limit the scope of the invention unless specifically stated otherwise.
Meanwhile, it should be understood that the flows in the drawings are not merely performed individually for convenience of description, but a plurality of steps are performed alternately with each other.
The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses.
Techniques, methods, and systems known to those of ordinary skill in the relevant art may not be discussed in detail, but are intended to be part of the specification where appropriate.
Based on JEDEC standard definition, Rx MASK is implanted into the simulated eye pattern, the conventional method can only preliminarily judge whether one memory access signal channel design can meet the standard requirement, the conventional method is difficult to effectively judge the quality of the memory data signal eye pattern, and is difficult to scientifically and reasonably select the optimal central point position.
Example one
As shown in fig. 1 to 3, which are only one embodiment of the present invention, the present invention provides a method for analyzing an eye diagram of a signal based on an RX MASK central lattice, the method comprising the following steps:
s1: acquiring a stored data signal simulation eye pattern for developing analysis;
the pre-simulation or the post-simulation is carried out on the stored data signals, and at least one simulation test can be carried out by utilizing a circuit-level simulation tool according to different parameter combinations of the DDR memory interconnection topology to obtain different simulation eye diagrams.
Generally, aiming at different parameter combinations of the DDR memory interconnection topology, all the parameter combinations are combined once, simulation design is sequentially executed, multiple simulation tests are carried out, and simulation eye diagrams corresponding to all the parameter combinations are obtained.
S2: customizing the specification and size of the effective Rx MASK;
after acquiring the simulation eye diagrams corresponding to all the parameter combinations, the specification size of the effective Rx MASK is obtained by addition based on the JEDEC standard RxMASK according to the simulation storage data signal.
S3: counting effective Rx MASK central dot matrixes;
it should be noted that the method for performing step S3, that is, calculating and finding the central lattice satisfying the effective Rx MASK specifically includes:
s31: programming and calculating an inner edge trace of the eye diagram of the stored data signal;
s32: traversing (gridding) all possible effective Rx MASK center points according to the training stepping parameters;
s33: counting the center points of all effective Rx MASKs located inside the eye pattern but not intersecting the trace line inside the eye pattern;
s34: and carrying out statistics to judge the quality of the eye diagram of the stored data signal.
Actually, when step S34 is executed, the statistical content includes the number of central points and the V/T area occupied by the calculated central dot matrix. That is to say, the number of the central points can be counted or the V/T area occupied by the central dot matrix can be calculated by different methods, but both methods can be executed, so that the purpose is to count the distribution of the central dot matrix, and the quality of the eye diagram of the stored data signal can be conveniently judged.
And, after obtaining the distribution of the central lattice, drawing a diagram, for example, as shown in fig. 3, two straight lines in the diagram are specification size boundaries of the custom Rx MASK, an outer arc area is a simulated eye diagram under the original parameter combination of the stored data signal, and an inner shadow area is a calculated and found central lattice distribution area of the effective Rx MASK.
S4: analyzing and evaluating the stored signal eye diagram based on the MASK central dot matrix;
s5: and obtaining the optimal central point and the corresponding swing margin and timing margin.
Generally speaking, the stored signal eye diagram is analyzed and evaluated based on the MASK center lattice, and the swing margin and the timing margin of the eye diagram can be respectively deduced according to the number, the distribution condition and the area size of the central points judged by the effective Rx MASK, and further, the optimal central point and the corresponding swing margin and timing margin are obtained.
The signal eye diagram analysis method based on the RX MASK central dot matrix optimizes interconnection topological parameters, optimizes access and storage signal channels, considers the influence of quantifiable and controlled noise, quantifies the evaluation standard of the quality of the stored data signal eye diagram, and ensures that a storage system still has sufficient design margin. In addition, the working process of a training mechanism can be simulated, the most appropriate central point is selected according to the weight proportion of the swing amplitude and the time sequence priority, and the corresponding swing amplitude margin and the corresponding time sequence margin are calculated.
Example two
Still referring to fig. 1 to 3, which are still one embodiment of the present invention, in order to make the method for analyzing an eye diagram of a signal based on an RX MASK central lattice according to the present invention more convenient to perform and more accurate, the present invention further has the following designs:
first, step S2 is executed to simulate the quantifiable noise condition introduced by the stored data signal, analyze the influence of the signal noise on the signal swing and timing margin, and add to obtain the specification size of the effective RxMASK based on the JEDEC standard Rx MASK.
Then, in step S3, the center lattice that satisfies the effective Rx MASK is calculated programmatically based on the stored data signal eye pattern and the training adjustment steps.
Of course, the training adjustment step parameters include sampling clock timing adjustment granularity and reference supply swing adjustment granularity.
In step S4, the parameters for analyzing and evaluating the eye diagram of the stored signal include the number of central points, distribution, and area size of the effective Rx MASK determination.
Finally, when step S5 is executed, the interconnect topology parameters, the advantages and disadvantages of the access signal channel, and whether the access signal channel is amplitude friendly or time sequence friendly are judged, and the interconnect topology parameters and the access signal channel are optimized, and the optimal central point and the corresponding amplitude margin and time sequence margin are obtained according to the weight ratio of the amplitude and the time sequence priority.
It should be particularly noted that, when step S5 is executed, if the acquired signal eye pattern is an irregular eye pattern, it is necessary to delete the improper center point, and then perform the subsequent statistics, analysis and comparison.
The signal eye diagram analysis method based on the RX MASK central dot matrix optimizes interconnection topological parameters, optimizes access and storage signal channels, considers the influence of quantifiable and controlled noise, quantifies the evaluation standard of the quality of the stored data signal eye diagram, and ensures that a storage system still has sufficient design margin. In addition, the working process of a training mechanism can be simulated, the most appropriate central point is selected according to the weight proportion of the swing amplitude and the time sequence priority, and the corresponding swing amplitude margin and the corresponding time sequence margin are calculated.
While certain specific embodiments of the present invention have been described in detail by way of illustration, it will be understood by those skilled in the art that the foregoing is illustrative only and is not limiting of the scope of the invention, as various modifications or additions may be made to the specific embodiments described and substituted in a similar manner by those skilled in the art without departing from the scope of the invention as defined in the appending claims. It should be understood by those skilled in the art that any modifications, equivalents, improvements and the like made to the above embodiments in accordance with the technical spirit of the present invention are included in the scope of the present invention.

Claims (9)

1. A signal eye diagram analysis method based on an RX MASK central dot matrix is characterized by comprising the following steps:
s1: acquiring a stored data signal simulation eye pattern for developing analysis;
s2: customizing the specification and size of the effective Rx MASK;
s3: counting effective Rx MASK central dot matrixes;
s4: analyzing and evaluating the stored signal eye diagram based on the MASK central dot matrix;
s5: and obtaining the optimal central point and the corresponding swing margin and timing margin.
2. The method according to claim 1, wherein the step S3 is executed to include:
s31: programming and calculating an inner edge trace of the eye diagram of the stored data signal;
s32: traversing all possible effective Rx MASK central points according to the training stepping parameters;
s33: counting the center points of all effective Rx MASKs located inside the eye pattern but not intersecting the trace line inside the eye pattern;
s34: and carrying out statistics to judge the quality of the eye diagram of the stored data signal.
3. The method according to claim 2, wherein the method comprises the following steps:
when step S34 is executed, the statistical content includes the number of center points and the V/T area occupied by the calculated center dot matrix.
4. The method according to claim 1, wherein the method comprises the following steps:
when step S1 is executed, pre-simulation or post-simulation is performed on the stored data signal, and at least one simulation test can be performed to obtain different simulation eye diagrams by using a circuit-level simulation tool for different parameter combinations of the DDR memory interconnection topology.
5. The method according to claim 1, wherein the method comprises the following steps:
the step S2 is executed to specifically simulate the quantifiable noise condition introduced by the stored data signal, analyze the influence of the signal noise on the signal swing and the timing margin, and add and obtain the specification size of the effective Rx MASK based on the JEDEC standard Rx MASK.
6. The method according to claim 1, wherein the method comprises the following steps:
in step S3, the center lattice that satisfies the effective RxMASK is programmed and calculated based on the stored eye pattern of the data signal and the training adjustment steps.
7. The method according to claim 6, wherein the method comprises the following steps:
in step S3, the training adjustment step parameters include a sampling clock timing adjustment granularity and a reference power swing adjustment granularity.
8. The method according to claim 1, wherein the method comprises the following steps:
in step S4, the parameters for analyzing and evaluating the eye diagram of the stored signal include the number of central points, distribution and area size of the effective Rx MASK determination.
9. The method according to claim 1, wherein the method comprises the following steps:
when step S5 is executed, the interconnect topology parameters, the advantages and disadvantages of the access signal channel, and whether the access signal channel is friendly to swing or friendly to timing are judged, and the interconnect topology parameters and the access signal channel are optimized, and the optimal central point and the corresponding swing margin and timing margin are obtained according to the weight ratio of the swing and timing priority.
CN201910864147.8A 2019-09-12 2019-09-12 Signal eye diagram analysis method based on RX MASK center dot matrix Active CN110674614B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201910864147.8A CN110674614B (en) 2019-09-12 2019-09-12 Signal eye diagram analysis method based on RX MASK center dot matrix

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201910864147.8A CN110674614B (en) 2019-09-12 2019-09-12 Signal eye diagram analysis method based on RX MASK center dot matrix

Publications (2)

Publication Number Publication Date
CN110674614A true CN110674614A (en) 2020-01-10
CN110674614B CN110674614B (en) 2023-04-07

Family

ID=69077928

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201910864147.8A Active CN110674614B (en) 2019-09-12 2019-09-12 Signal eye diagram analysis method based on RX MASK center dot matrix

Country Status (1)

Country Link
CN (1) CN110674614B (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111863104A (en) * 2020-07-29 2020-10-30 展讯通信(上海)有限公司 Eye pattern determination model training method, eye pattern determination device, eye pattern determination apparatus, and medium
CN112861252A (en) * 2020-12-24 2021-05-28 中国航空工业集团公司成都飞机设计研究所 Self-defined lattice standard unit and lattice structure
CN114301556A (en) * 2022-03-10 2022-04-08 武汉普赛斯电子技术有限公司 Eye pattern template margin obtaining method and device, computer equipment and storage medium
WO2023164959A1 (en) * 2022-03-02 2023-09-07 长鑫存储技术有限公司 Signal eye pattern analysis system and method therefor

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090013290A1 (en) * 2007-07-03 2009-01-08 International Business Machines Corporation Method and System for Electromigration Analysis on Signal Wiring
CN109542658A (en) * 2018-11-01 2019-03-29 郑州云海信息技术有限公司 A kind of signal eye diagram bias correcting method and system based on SAS3.0

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090013290A1 (en) * 2007-07-03 2009-01-08 International Business Machines Corporation Method and System for Electromigration Analysis on Signal Wiring
CN109542658A (en) * 2018-11-01 2019-03-29 郑州云海信息技术有限公司 A kind of signal eye diagram bias correcting method and system based on SAS3.0

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
ZHAO REN 等: "《Eye Diagram Construction and Analysis in Digital Phosphor Oscilloscope》", 《 2010 INTERNATIONAL CONFERENCE ON INTELLIGENT COMPUTATION TECHNOLOGY AND AUTOMATION》 *
刘峰 等: "《基于Dual-Dirac模型的眼图抖动分析方法》", 《北京交通大学学报》 *

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111863104A (en) * 2020-07-29 2020-10-30 展讯通信(上海)有限公司 Eye pattern determination model training method, eye pattern determination device, eye pattern determination apparatus, and medium
CN111863104B (en) * 2020-07-29 2023-05-09 展讯通信(上海)有限公司 Eye diagram judgment model training method, eye diagram judgment device, eye diagram judgment equipment and medium
CN112861252A (en) * 2020-12-24 2021-05-28 中国航空工业集团公司成都飞机设计研究所 Self-defined lattice standard unit and lattice structure
CN112861252B (en) * 2020-12-24 2022-07-12 中国航空工业集团公司成都飞机设计研究所 Lattice standard unit and lattice structure for aircraft structure design and modeling
WO2023164959A1 (en) * 2022-03-02 2023-09-07 长鑫存储技术有限公司 Signal eye pattern analysis system and method therefor
CN114301556A (en) * 2022-03-10 2022-04-08 武汉普赛斯电子技术有限公司 Eye pattern template margin obtaining method and device, computer equipment and storage medium

Also Published As

Publication number Publication date
CN110674614B (en) 2023-04-07

Similar Documents

Publication Publication Date Title
CN110674614B (en) Signal eye diagram analysis method based on RX MASK center dot matrix
US10237097B2 (en) Worst case eye for multi-level pulse amplitude modulated links
US10936781B1 (en) Method for setting parameters in design of printed circuit board, device employing method, and non-transitory storage medium
CN104050197B (en) A kind of information retrieval system evaluating method and device
CN106897511A (en) Annulus tie Microstrip Antenna Forecasting Methodology
US8229724B2 (en) Signal transmission system evaluation apparatus and program, and signal transmission system design method
Berndt et al. Investigating the performance of genetic algorithm-based software test case generation
US7844932B2 (en) Method to identify timing violations outside of manufacturing specification limits
CN112511367A (en) Test method and test equipment
CN116245060A (en) Analysis method and device for digital circuit, electronic equipment and storage medium
CN115270687A (en) Chip layout method, device, equipment and storage medium
JP2018081354A (en) Simulation support apparatus, simulation support method and simulation support program
CN110688815A (en) Memory interface circuit hybrid modeling simulation method based on memory access code pattern
CN109522679B (en) Method and system for generating functional excitation vector based on classification processing
US10733347B2 (en) Statistical channel analysis with correlated input patterns
CN116992362A (en) Transformer fault characterization feature quantity screening method and device based on Xia Puli value
CN112560376A (en) Method for optimizing model parameters of semiconductor device
CN114065682A (en) Circuit yield analysis method based on multilayer perceptron neural network
Zhang et al. A fast signal integrity design model of printed circuit board based on monte-carlo tree
CN111833969A (en) Finished oil octane number prediction method, equipment and storage medium
CN110377971A (en) A kind of chip drives EQ value optimal value determines method and device
CN117555812B (en) Cloud platform automatic testing method and system
CN116911245B (en) Layout method, system, equipment and storage medium of integrated circuit
CN108648782A (en) The screening technique of the optimal pulse operation condition of phase transition storage
US6960930B2 (en) Method and apparatus for determining the minimum or maximum switching activity of a digital circuit

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant