CN110673878B - Instruction information query and execution debugging method based on instruction set simulator - Google Patents
Instruction information query and execution debugging method based on instruction set simulator Download PDFInfo
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Abstract
The invention relates to an instruction information query and execution debugging method based on an instruction set simulator, which comprises the following steps: loading a test stimulus to an instruction set simulator; starting an instruction set simulator to execute various instructions in the test excitation, and loading the device by entering a debug mode; setting various debugging breakpoints by using a unitil command according to needs; running the single or multiple instructions using a run command; checking whether a breakpoint condition is met, if not, continuing to operate, and if so, pausing to execute the instruction; inquiring all information in the instruction execution process through various different inquiry commands for analyzing whether errors exist or not; and checking whether the debugging is finished or not, finishing the debugging and exiting if the problem is found, and resetting the breakpoint and continuing the debugging if the debugging is not finished. The invention can effectively reduce the requirement on the debugging personnel, thereby improving the debugging efficiency.
Description
Technical Field
The invention relates to the technical field of microprocessor verification, in particular to an instruction information query and execution debugging method based on an instruction set simulator.
Background
Industry practice shows that the correctness of a microprocessor is mainly guaranteed by relying on verification work in the whole design flow of the microprocessor. Correctness verification of a microprocessor plays a crucial role in the overall flow of microprocessor design. With the ever-increasing scale of microprocessor design, verification becomes a bottleneck in modern design flow. The total cost of up to 80% is due to the verification task, and thus it can be seen that the verification efficiency is proportional to the chip design efficiency, and the higher the verification efficiency, the shorter the overall design cycle will be.
In the verification of the correctness of microprocessor design, simulation verification always occupies an absolute dominance. Analog verification of a microprocessor is done through an analog verification environment. The simulated verification environment comprises: design to be tested (dut), instruction set simulator (also called reference model), test platform (testbench, initialization reset, test excitation loading, signal monitoring and acquisition, etc.), result comparison. The result comparing function compares the result of the instruction execution in the design to be tested with the result of the instruction execution in the instruction set simulator, and if the results are found to be unequal, an error is reported. It can be seen that the instruction set simulator plays an important role in simulation verification.
The instruction set simulator generally refers to a model for simulating and executing various instructions in an instruction set of a microprocessor, and is mainly implemented by writing in high-level languages such as C + + and the like to simulate the execution of instructions of a real microprocessor, that is, to simulate the main flow and operation of the design of the real microprocessor. The method mainly comprises instruction pipeline operation and memory access pipeline operation. An instruction pipeline operation comprising: instruction fetching, decoding, transmitting and executing (integer operation instruction, floating point operation instruction and access instruction). The access pipeline operation, namely the access flow of the storage space, comprises: virtual-real substitution of access addresses, boundary crossing and permission check of the access addresses, hit or not of Cache caches of the high-speed storage, access of main memory space outside cores and the like.
The instruction set simulator is an abstract model of an instruction behavior level of microprocessor design, so that the instruction set simulator corresponding to different microprocessor designs does not need to be modified too much as long as the instruction set is not changed. Even if some design details are adjusted, the instruction set simulator corresponding to the design details can realize the same function only by a small amount of modification. That is, the instruction set simulator is well-survivable. Therefore, instruction set simulators have generally been implemented before the development of the RTL level design code of a new microprocessor matures. At this time, the large-scale operating system program can be run through the instruction set simulator, so that the error of the operating system program can be found as early as possible, and a foundation is laid for the future operating system program test on the real microprocessor design.
The large-scale operating system program is operated through the instruction set simulator, once a fault occurs in the simulation process, the GDB is used for analyzing the instruction operation condition in the instruction set simulator, but the GDB captures bug in a mode that related instructions with unequal breakpoint positioning are set, then functions or statements are gradually jumped in the instruction set simulator by building a high-level language, and the GDB only walks inside a mass function in the instruction set simulator to obtain required information. It becomes very difficult for a verifier unfamiliar with the development of instruction set simulators to use the GDB debugging tool for querying instruction information and debugging instruction execution.
Disclosure of Invention
The invention aims to solve the technical problem of providing an instruction information query and execution debugging method based on an instruction set simulator, which can effectively reduce the requirements on debugging personnel, thereby improving the debugging efficiency.
The technical scheme adopted by the invention for solving the technical problems is as follows: the method for inquiring and executing the debugging of the instruction information based on the instruction set simulator comprises the following steps:
(1) Operating the instruction set simulator test instruction set, and locking and recording the operation track of the instruction set simulator in the operation process;
(2) And entering a debugging mode, recording information generated by each instruction in the instruction set simulator, and inquiring the information generated by the simulated instruction through an inquiry command.
In the step (1), the test stimulus is simulated by operating the instruction set simulator in the single-core simulation environment.
And (3) calling a function interactive _ run () when entering a debugging mode by inputting a command run + step number in the step (2), so that the instruction set simulator realizes the execution function of the instruction and outputs the instruction execution information.
And (3) calling a function interactive _ run () when entering a debugging mode by inputting a command run + step number in the step (2), so that the instruction set simulator realizes the execution function of the instruction and outputs the instruction execution information.
In the step (2), by inputting a command unity + a specific breakpoint condition, a function interactive _ unity () is called, and the running test stimulus is stopped to an instruction meeting the condition by the specific breakpoint condition; the breakpoint judgment condition of the uniform function comprises a single or combined state of a core number, a thread number, a pc value, a CSR register value, an IOR register value and a physical address and reg register value.
In the step (2), when the query command is inst, calling a function show _ cur _ inst (), and outputting a core number, a thread number, an instruction name, a corresponding register value and instruction entry information of the current instruction in the simulation environment of the instruction set simulator.
And (3) calling a function show _ pc () when the query command is pc in the step (2), and outputting address information of an instruction stream generated by the current instruction in the instruction set simulator simulation environment and a corresponding core number and a thread number.
In the step (2), when the query command is allor, calling a function show _ all _ IOR (), collecting an IO register in the instruction set simulator, accessing an initial position and an end position of the IOR in the instruction set simulator through an address, and outputting the IO register and corresponding parameters one by utilizing a circulation function; and when the query command is ior + register name, calling a function show _ ior (), recording all IO registers in the instruction set simulator, comparing the register names in the input command one by one, and outputting the matched IO register object.
In the step (2), when the query command is an allcsr, calling a function show _ all _ CSR (), collecting all CSR registers in the instruction set simulator, accessing the initial position and the tail position of the CS registers in the instruction set simulator through addresses, and outputting the CSR registers and corresponding parameters one by utilizing a circulation function; when the query command is CSR + register name, the function show _ CSR () is called, all CSR registers in the instruction set simulator are recorded, and then the register names in the input command are compared one by one, and the matched CSR register object is output.
In the step (2), when the query command is reg + register name, calling the function show _ reg (), collecting the register states with the serial numbers of 0-31 in the instruction set simulator environment, comparing the register names in the input command one by one, and outputting the value of the matched register.
In the step (2), when the query command is mem + physical address, the function show _ mem () is called, the instruction mapped by the physical address pair is directly positioned, and the value of the register storage space of the physical address is output.
Advantageous effects
Due to the adoption of the technical scheme, compared with the prior art, the invention has the following advantages and positive effects: the invention locks and records the operation track of the instruction set simulator while operating the simulation environment of the instruction set simulator, thus when entering a debug mode, the information generated by each instruction in the instruction set simulator is recorded, and a meaningful value related to the instruction execution in the instruction set can be obtained through a series of query commands. In addition, in the debugging process, the setting object of the breakpoint condition is information related to instruction execution. When the logic condition of the values and the appointed values is established, the method is stopped and can be used for inquiring and debugging the subsequent instruction information.
Drawings
FIG. 1 is a level diagram of a GDB and query debugging according to the present invention;
FIG. 2 is a schematic diagram of the query and debug of instruction set simulator emulation instruction execution in an embodiment of the present invention;
FIG. 3 is a flow diagram of the query and debug execution of a simulated instruction of an instruction set simulator in an embodiment of the invention;
FIG. 4 is a diagram illustrating a query message scenario in an embodiment of the present invention;
fig. 5 is a schematic diagram of a breakpoint setting situation in the embodiment of the present invention.
Detailed Description
The invention will be further illustrated with reference to the following specific examples. It should be understood that these examples are for illustrative purposes only and are not intended to limit the scope of the present invention. Further, it should be understood that various changes or modifications of the present invention can be made by those skilled in the art after reading the teaching of the present invention, and these equivalents also fall within the scope of the claims appended to the present application.
The embodiment of the invention relates to an instruction information query and execution debugging method based on an instruction set simulator, and as shown in figure 1, the query debugging is positioned at an instruction set simulator layer in the embodiment, which is different from the traditional GDB debugging method. As shown in fig. 2 and 3, the basic steps include:
step 1, loading test excitation to an instruction set simulator;
step 2, starting the instruction set simulator to start executing various instructions in the test excitation, and loading the device by entering a debug mode;
step 3, setting various debugging breakpoints by using a unitil command as required;
step 4, using run command to run single or multiple instructions;
step 5, checking whether a breakpoint condition is met, if not, continuing to operate, and if so, suspending the instruction execution;
step 6, inquiring all information in the instruction execution process through a pc/reg/csr/ior/dtb/mem inquiry command for analyzing whether an error exists;
and 7, checking whether the debugging is finished or not, finishing the debugging and exiting if the problem is found, and returning to the step 3 to reset the breakpoint and continue the debugging if the debugging is not finished.
The inquiry function of the invention is realized by 9 inquiry commands, and the debugging function is realized by 2 debugging commands. The query and debug commands are shown in the following table:
the steps for implementing the query and debug commands in the apparatus of the present invention will be described in detail one by one.
The inst command is realized by calling a function show _ cur _ inst (), wherein the function show _ cur _ inst () is used for printing out a core number, a thread number, an instruction name, a corresponding register value and instruction entry information generated by a current instruction in an instruction set simulator simulation environment by using printf. The realization method comprises the following steps: 1, collecting an instruction code (inst _ code), an operation code (op _ name), a relevant register value (ra/rb/rc/rd) and an instruction count (pal _ num) of a current instruction in an instruction set simulator simulation. And 2, printing the information one by one.
The pc command is implemented by calling a function show _ pc () which prints out address information of an instruction stream generated by a current instruction in an instruction set simulator emulation environment and a corresponding core number and thread number using printf. The realization method comprises the following steps: 1, collecting instruction fetching address information (inst _ pc) of a current instruction in simulation of an instruction set simulator. 2, printing the information.
The allor command is realized by calling a function show _ all _ IOR (), the function collects IO registers in the instruction set simulator, the initial position and the tail position of the IOR in the instruction set simulator are accessed through addresses, and the IO registers and corresponding parameters are printed one by utilizing a for loop function. The realization method comprises the following steps: 1, collecting all IOR register names and register physical address information in an instruction set simulator simulation and writing the IOR register names and register physical address information into an IOR associated container (IOR _ vector). And 2, traversing the association container by using a loop statement through the iterator, and printing the information of all IORs in a format of IOR (IOR register name (physical address corresponding to the IOR)) one by one. And 3, counting the total number of all IOR registers and printing.
The ior command is realized by calling a function show _ ior (), the function records all IO registers in the instruction set simulator, then compares register names in the input command one by one, prints and outputs the matched IO register object, and prints out error reporting information and makes prompt help if the matched IO register object is not matched with the relevant IO register. It should be noted that the command also supports wildcard functions, such as: ior + MCU. The realization method comprises the following steps: analyzing the input parameters of the function and determining whether the parameters contain wildcards (#). 2, looking up the matched IOR register entry in the IOR association container (IOR _ vector), if there is no wildcard in the input parameters, only one matched entry can be found, if there is wildcard, several matched entries can be found. 3, if no matching IOR register entry is found, printing error information. And 4, if the matched IOR register entry is found, traversing the IOR association container by using a loop statement through the iterator, and printing all matched entry information one by one according to the format of IOR: IOR register name = IOR register value.
The allcsr command is realized by calling a function show _ all _ CSR (), wherein the function collects all CSR registers in the instruction set simulator, the initial position and the tail position of the CS registers in the instruction set simulator are accessed through addresses, and the CSR registers and corresponding parameters are printed one by utilizing a for loop function. The realization method comprises the following steps: 1, collecting all CSR register names and register physical address information in the simulation environment of the instruction set simulator, and writing the information into a CSR associated container (CSR _ vector). And 2, traversing the associated container by using a loop statement through an iterator, and printing all CSR information in a format of 'CSR: CSR register name (hexadecimal index number-decimal index number corresponding to the IOR)'. And 3, counting the total number of all CSR registers and printing.
The CSR command is realized by calling a function show _ CSR (), the function firstly records all CSR registers in the instruction set simulator, then carries out item-by-item comparison through register names in the input command, prints and outputs the matched CSR register object, and prints error information and makes prompt help if the register object is not matched with the related CSR register. It should be noted that the command also supports wildcard functions, such as: csr + ITB. The realization method comprises the following steps: analyzing the input parameters of the function and determining whether the parameters contain wildcards (#). 2, looking up the CSR register entry matched with the CSR in the CSR association container (CSR _ vector), if the input parameter has no wildcard, only one matched entry can be found, if the input parameter has wildcard, a plurality of matched entries can be found. 3, if no matched CSR register entry is found, printing error information. And 4, if the matched CSR register entries are found, traversing the CSR association container by using a loop statement through the iterator, and printing all matched entry information one by one according to a format of 'CSR: CSR register name = CSR register value'.
The reg command is implemented by calling a function show _ reg () that collects the state of registers numbered 0-31 within the instruction set simulator environment and then prints out the values of the desired registers therein. The register name in the command reg + register name may specify a specific integer, floating point, or vector register to print out the value of that register, such as: r8, f8, v8, may also specify a set of integer, floating point, or vector registers to output the values of all registers in the set, such as: ra, fa, va. The realization method comprises the following steps: the implementation method comprises the following steps: and 1, analyzing the input parameters of the function, and determining the type and number of the register to be inquired. And 2, if the register type to be inquired is not in an integer (r), a floating point (f) and a vector (v) or the register number is not in a 0.31, printing error information. And 3, collecting the value of the register to be inquired, and printing the value of the register according to a format of 'reg: register type register number = register value'. And 4, if the second character in the register character string to be inquired is ' a ', collecting the values of all registers of the type, and printing the values of all registers of the type line by line according to a ' reg: register type register number = register value.
The mem command is implemented by calling a function show _ mem () that locates directly to the instruction to which the physical address pair maps and prints out the value of the register memory space for that address. The command can not only print out the value of a certain address storage space, but also print out the value of a section of address storage space, such as: mem + starting physical address + ending physical address. The realization method comprises the following steps: analyzing the input parameter of the function to determine whether the address of the memory space to be inquired is a specific address space or a section of address space. And 2, collecting the value of the storage space to be inquired. And 3, printing the value of the storage space according to a format of 'mem: addr (physical address to be inquired) > the value of the storage space (64-bit hexadecimal)'. And 4, if the storage space to be inquired is a section of address space, collecting the address space by taking 64 as data as granularity, and printing the values of the storage space line by line according to the format in the step 3.
The dtb command is implemented by calling the show _ dtb () function. The function is realized by the following steps: and 1, analyzing the input parameters of the function, and determining the DTB type and the item number to be inquired. 2, if the type is L1, the entry information (shown in the following table) numbered as the entry number in the primary DTB is collected and printed out one by one in a fixed order. 3, if the type is L2L, collecting the item information (shown in the following table) numbered as item number in the secondary large page DTB, and printing one by one according to the same fixed sequence. 4, if the type is L2S, the item information (shown in the following table) numbered as the item number in the secondary small page DTB is collected and printed out one by one in the same fixed order.
| Number of | DTB entry field |
| 1 | valid |
| 2 | vtag |
| 3 | vpn |
| 4 | upn |
| 5 | pte.pa |
| 6 | pte.ukvh_w |
| 7 | pte.ukvh_r |
| 8 | pte.gh |
| 9 | pte.ks |
| 10 | pte.forbit |
| 11 | pte.fowbit |
The run command is realized by calling a function interactive _ run () that realizes an execution function of the instruction set emulator on the instruction, printing information of the instruction execution. The number of steps in the command line, which represents the number of pieces executed by the control instruction set simulator, may be a specified number of more instructions to be executed based on the current instruction execution condition, and may be 1 or N instructions. The number of steps in the command may also be unspecified, such that the instruction set simulator simulates execution of the instruction until completion of the exit, or until the next breakpoint. The realization mode is as follows: 1, analyzing the input parameters of the function and determining the number N of instructions to be executed. And 2, if the input parameter does not specify N, setting a long-execution identification variable (is _ run _ long) to true to inform the instruction set simulator to execute the instruction all the time, stopping the instruction until the next breakpoint, returning to the input state of the command line for receiving the query and debugging, or stopping the execution of the whole test excitation and exiting. If N is specified in the input parameter, the number of instructions to be suspended (num _ of _ stop2 run) is calculated according to the formula "cur _ count) + number of instructions to be executed N". When N =1, it means that a single instruction is executed, and when N >1, it means that N instructions are executed. And 4, before the instruction set simulator starts to execute one instruction, checking whether is _ run _ long is true, if true, executing the current instruction, if not, checking whether cur _ count is equal to num _ of _ stop2run, if not, executing the current instruction, if so, suspending executing the current instruction, and returning to a command line input receiving state for inquiring and debugging.
The neutral command is implemented by calling a function interactive _ neutral () that stops the running test stimulus to an instruction that satisfies the condition by a specific breakpoint condition. As shown in fig. 5, the breakpoint judgment condition of the neutral function includes a single or combined state such as a core number, a thread number, a pc value, a CSR register value, an IOR register value, a physical address, a reg register value, and the like. When the instruction set simulator tests the excitation, the unitil searches the latest qualified instruction through the specific breakpoint condition and stops. And printing out the core number, the thread number, the PC value, the instruction name, the register value and the instruction operation item number of the current instruction. The realization mode is as follows: and 1, analyzing the input parameters of the function, and determining the condition and the type of the breakpoint. And 2, checking the type of the breakpoint condition of the input parameter, and reporting an error if the type of the breakpoint condition is not within [ pc/reg/mem/csr/ior ]. And 3, if the type of the breakpoint condition is reg, checking the type of the register in the breakpoint condition. If the type is not within [ r (integer)/f (floating point)/v (vector) ] an error is reported, otherwise the number of the register in the check breakpoint condition is checked. If the number is not within [ 0..31 ], an error is reported, otherwise, the value of the register in the breakpoint condition is obtained, the instruction set simulator is informed to obtain the value of the register in the instruction set simulator before executing an instruction, and whether the value is the same as the value in the breakpoint condition is checked. If not, executing the current instruction; if the instruction is the same as the instruction, stopping executing the current instruction, and returning to the input state of the receiving command line for inquiring and debugging. And 4, if the type of the breakpoint condition is CSR, acquiring the name of the CSR in the breakpoint condition. It is checked whether the CSR name is present in a CSR association container (CSR _ vector). If not, an error is reported, otherwise, the value of the CSR in the breakpoint condition is obtained, the instruction set simulator is informed to obtain the value of the CSR in the instruction set simulator before executing an instruction, and whether the value is the same as the value in the breakpoint condition is checked. If not, executing the current instruction; if the instruction is the same as the instruction, stopping executing the current instruction, and returning to the input state of the receiving command line for inquiring and debugging. And 5, if the type of the breakpoint condition is IOR, acquiring the IOR name in the breakpoint condition. It is checked whether the IOR name exists in an IOR association container (IOR _ vector). If not, an error is reported, otherwise, the value of the IOR in the breakpoint condition is obtained, the instruction set simulator is informed to obtain the value of the IOR in the instruction set simulator before executing an instruction, and whether the value is the same as the value in the breakpoint condition is checked. If not, executing the current instruction; if the instruction is the same as the instruction, stopping executing the current instruction, and returning to the input state of the receiving command line for inquiring and debugging. And 6, if the type of the breakpoint condition is mem, acquiring the address in the breakpoint condition. And acquiring a value corresponding to the address in the breakpoint condition, informing the instruction set simulator of acquiring the value of the address space in the instruction set simulator before starting to execute one instruction, and checking whether the value is the same as the value in the breakpoint condition. If not, executing the current instruction; if the instruction is the same as the instruction, stopping executing the current instruction, and returning to the input state of the receiving command line for inquiring and debugging. And 7, if the type of the breakpoint condition is pc, acquiring a pc value in the breakpoint condition. And informing the instruction set simulator to acquire the PC value of the current instruction in the instruction set simulator before executing one instruction, and checking whether the value is the same as the value in the breakpoint condition. If not, executing the current instruction; if the instruction is the same as the instruction, stopping executing the current instruction, and returning to the input state of the receiving command line for inquiring and debugging.
Therefore, the invention provides a method for inquiring and executing debugging of instruction information based on an instruction set simulator, wherein an object for which an inquiry debugging function is oriented is the execution of each instruction of an instruction set. The inquiry function is realized by a series of inquiry commands, including: pc, inst, reg, ior, csr, allcsr, allior, mem, dtb, as shown in fig. 4. The debug function includes breakpoint settings that control execution of a single plurality of instructions and execution of the instructions. Controlling the execution of the single or multiple instructions is achieved by a run command, run N representing simulated execution of instructions in the N (N > = 1) instruction set. Breakpoint setting for instruction execution is achieved through a neutral command. The setting object of the interruption point condition of the neutral command is information related to instruction execution, and comprises the following steps: PC values, integer register values, floating point register values, vector register values, CSR values, IOR values, memory space values, as shown in fig. 5. When the logical conditions of the values and the specified values are satisfied, the method stops for inquiring and debugging the subsequent instruction information.
The invention can be integrated in the instruction set simulator, can obtain the relevant information of instruction execution in the test excitation at any time, and is convenient for the verification personnel to quickly position the error problem. In the invention, a simple command can realize the function which can be realized by the GDB only by a large number of command statements, even the function which can not be realized by the GDB at all. For example, in the present invention, a simple command queries all IORs or all CSRs' names, which includes a large number of translation actions that GDB may not be able to do at all when debugging the query. The invention is relatively friendly, the difficulty of the hands-on is low, the debugging efficiency is high, the device of the invention provides a series of inquiry and debugging commands, the command information inquiry and the command execution debugging when the command set simulator simulates and executes the command are more visual and efficient than the traditional GDB tool by flexibly using the commands, and even the debugging personnel who are not familiar with the program development of the command set simulator can easily use the commands. The device has almost no operation difficulty for general verification personnel, and can quickly find the error point of the instruction set simulator for simulating the instruction execution, thereby improving the error checking efficiency.
Claims (10)
1. An instruction information query and execution debugging method based on an instruction set simulator is characterized by comprising the following steps:
(1) Operating the instruction set simulator test instruction set, and locking and recording the operation track of the instruction set simulator in the operation process;
(2) And entering a debugging mode, recording information generated by each instruction in the instruction set simulator, and inquiring the information generated by the simulated instruction through an inquiry command.
2. The method for querying and executing debugging instruction information based on instruction set simulator of claim 1, wherein in step (1), the test stimulus is simulated by running the instruction set simulator in a single-core simulation environment.
3. The method as claimed in claim 1, wherein the step (2) calls the interactive _ run () function when entering the debug mode by inputting the command run + step number, so as to implement the instruction execution function of the instruction set simulator and output the instruction execution information.
4. The method for querying and executing debugging instruction information based on the instruction set simulator according to claim 1, wherein in the step (2), a function interactive _ unity () is called by inputting a command unity + specific breakpoint condition, and the running test stimulus is stopped to an instruction meeting the condition through the specific breakpoint condition; the breakpoint judgment condition of the uniform function comprises a single or combined state of a core number, a thread number, a pc value, a CSR register value, an IOR register value and a physical address and reg register value.
5. The method as claimed in claim 1, wherein in step (2), when the query command is inst, the function show _ cur _ inst () is called to output the core number, thread number, instruction name, corresponding register value and instruction entry information generated by the current instruction in the simulation environment of the instruction set simulator.
6. The method as claimed in claim 1, wherein in step (2), when the query command is pc, a call is made to the function show _ pc () to output address information of an instruction stream generated by the current instruction in the simulation environment of the instruction set simulator and the corresponding core number and thread number.
7. The method for querying and executing debugging instruction information based on the instruction set simulator of claim 1, wherein in the step (2), when the query command is an allor, a function show _ all _ IOR () is called to collect the IO register in the instruction set simulator, the initial position and the end position of the IOR in the instruction set simulator are accessed through addresses, and the IO register and the corresponding parameters are output one by using a circulation function; and when the query command is ior + register name, calling a function show _ ior (), recording all IO registers in the instruction set simulator, comparing the register names in the input command one by one, and outputting the matched IO register object.
8. The method for querying and executing debugging instruction information based on the instruction set simulator of claim 1, wherein in step (2), when the query command is allcsr, the function show _ all _ CSR () is called to collect all CSR registers in the instruction set simulator, the initial position and the end position of CS registers in the instruction set simulator are accessed through addresses, and then the CSR registers and corresponding parameters are output one by using a loop function; and when the query command is CSR + register names, calling a function show _ CSR (), recording all CSR registers in the instruction set simulator, comparing the register names in the input command one by one, and outputting the matched CSR register object.
9. The method as claimed in claim 1, wherein in step (2), when the query command is reg + register name, the function show _ reg () is called to collect the register states numbered 0-31 inside the environment of the instruction set simulator, and then the register names in the input command are compared one by one to output the values of the matched registers.
10. The method as claimed in claim 1, wherein when the query command is mem + physical address, the function show _ mem () is called in step (2) to directly locate the instruction mapped by the physical address pair and output the value of the register storage space of the physical address.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201910858616.5A CN110673878B (en) | 2019-09-11 | 2019-09-11 | Instruction information query and execution debugging method based on instruction set simulator |
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