CN110672907B - Voltage response test method for power electronic element - Google Patents

Voltage response test method for power electronic element Download PDF

Info

Publication number
CN110672907B
CN110672907B CN201810711678.9A CN201810711678A CN110672907B CN 110672907 B CN110672907 B CN 110672907B CN 201810711678 A CN201810711678 A CN 201810711678A CN 110672907 B CN110672907 B CN 110672907B
Authority
CN
China
Prior art keywords
output
pulse
voltage
pulse signal
modulation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201810711678.9A
Other languages
Chinese (zh)
Other versions
CN110672907A (en
Inventor
林逢杰
李冠翰
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Teco Electric and Machinery Co Ltd
Original Assignee
Teco Electric and Machinery Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Teco Electric and Machinery Co Ltd filed Critical Teco Electric and Machinery Co Ltd
Priority to CN201810711678.9A priority Critical patent/CN110672907B/en
Publication of CN110672907A publication Critical patent/CN110672907A/en
Application granted granted Critical
Publication of CN110672907B publication Critical patent/CN110672907B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/04Measuring peak values or amplitude or envelope of ac or of pulses
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/165Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/165Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
    • G01R19/16566Circuits and arrangements for comparing voltage or current with one or several thresholds and for indicating the result not covered by subgroups G01R19/16504, G01R19/16528, G01R19/16533
    • G01R19/16576Circuits and arrangements for comparing voltage or current with one or several thresholds and for indicating the result not covered by subgroups G01R19/16504, G01R19/16528, G01R19/16533 comparing DC or AC voltage with one threshold

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)

Abstract

The invention provides a voltage response test method of a power electronic element, which comprises the following steps: calculating and outputting a modulation pulse signal by using a pulse command generating module; using a filter to receive the modulated pulse signal and generate a modulated output wave; measuring a voltage overshoot peak value of a driving circuit to be measured by using an output voltage measuring module; and if the judgment result is negative, the pulse command generating module is used for modifying the modulation pulse signal until the voltage overshoot peak value is greater than an optimal voltage value for the first time.

Description

Voltage response test method for power electronic element
Technical Field
The present invention relates to a test method, and more particularly, to a voltage response test method for power electronic devices.
Background
At present, nearly 40% of the initial energy is converted into electricity for use, and the most important power generation method is thermal power generation. With the gradual exhaustion of fuel and the rising price of energy, the development of new energy, such as offshore wind power generation driven by former force, or the improvement of the transmission rate and the effective utilization rate of electric energy, becomes an important development direction.
The transmission rate and effective utilization rate of electric energy depend on the performance of semiconductor power switching devices (power electronic devices), and thus, a great deal of resources are invested in the academic world or the industrial world to develop and improve the power electronic devices. Among many power electronic devices, Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) and Insulated Gate Bipolar Transistors (IGBTs) are the most important and widely used power electronic devices.
When a user uses the power electronic device, the user inputs a square wave to drive the power electronic device, referring to fig. 1, fig. 1 is a block diagram showing a test performed by the power electronic device in the prior art. As shown in the figure, a tester (not shown) uses a square wave generator PA1 and an oscilloscope PA4 to test a to-be-tested driving circuit PA2, and the to-be-tested driving circuit PA2 is electrically connected to a load PA 3. The to-be-tested driving circuit PA2 includes a gate driving circuit PA21 and a power electronic device PA22, but not limited thereto, the number of the power electronic devices PA22 may be plural. The to-be-tested driving circuit PA2 is electrically connected to the square wave generator PA1 and the load PA3, the oscilloscope PA4 is used for obtaining the voltage and current waveform output by the to-be-tested driving circuit PA2 and is electrically connected to the to-be-tested driving circuit PA2, and the actual node falls between the power electronic element PA22 and the load PA 3.
The tester can manually adjust the output frequency by using the square wave generator PA1 to generate a square wave, but the waveform of the square wave cannot be adjusted. When the square wave is inputted to the gate driving circuit PA21, the driving power electronic element PA22 outputs a voltage and a current to the load PA 3. The oscilloscope PA4 is used to obtain the voltage and current waveforms output by the power electronic device PA22 for the tester to view, when the tester finds that the voltage overshoot peak in the voltage waveform is much higher than a voltage limit value or much lower than the voltage limit value, the gate resistor on the gate driving circuit PA21 needs to be adjusted and replaced, and the gate resistor is usually connected to the gate driving circuit PA21 by welding.
Therefore, if the gate resistance is adjusted, the gate resistance needs to be soldered and a new gate resistance needs to be soldered again, and if the new voltage overshoot peak value in the new output voltage current waveform measured after the soldering is still far higher or far lower than the voltage overshoot peak value, the gate resistance needs to be replaced again. Generally, if the output voltage overshoot peak value is too high, the power electronic device PA22 may be burned out, so that a general tester will prefer to use a gate resistor with a large resistance value to slow down the voltage rising slope, prolong the voltage rising time, and output a lower voltage overshoot peak value. After the voltage overshoot peak value is confirmed not to exceed the voltage limit value, the gate resistance with smaller resistance value is gradually changed to improve the rising slope of the voltage and reduce the rising time of the voltage, and then the output voltage overshoot peak value is improved until the voltage overshoot peak value exceeds the voltage limit value, and the gate resistance at the moment is recorded.
However, the tester needs to observe the voltage waveform on the oscilloscope PA4 and replace the gate resistor until the voltage overshoot peak in the voltage waveform exceeds the voltage limit, which is very labor intensive, and the process of unsoldering and rewelding the gate resistor may erroneously touch other electronic components on the gate driving circuit PA21 to cause short circuit. In addition, the gate resistor with a larger resistance value limits the rising time of the voltage, and further limits the switching frequency of the power electronic element PA22, and the gate resistor with a smaller resistance value or without using the gate resistor can reduce the rising time of the voltage and increase the switching frequency of the power electronic element PA22, but the voltage overshoot peak value may be too large, which may cause the damage of the power electronic element PA 22.
Disclosure of Invention
In view of the problems of the prior art, the peak voltage overshoot and the manual replacement of the gate resistor are observed manually. The present invention provides a voltage response testing method for power electronic devices, which utilizes a pulse command generating module, a filter and an output voltage measuring module to achieve the effect of automatic testing.
The present invention provides a voltage response testing method for power electronic device, which utilizes a pulse command generating module, a filter and an output voltage measuring module to test a driving circuit to be tested, and comprises the following steps: (a) calculating the pulse number of a reference pulse signal which is preset to be output under a reference state by using the pulse command generating module according to a built-in longest rising time and a pulse output period, so that the reference pulse signal comprises 1 st to Mth output pulses; (b) defining an elimination reference value N by using the pulse command generating module, and eliminating the Nth output pulse, the 2 Nth output pulse and the KN-th output pulse in the 1 st to Mth output pulses to form a modulation pulse signal which is preset to be output under a modulation state, wherein KN is less than or equal to the maximum integer of M; (c) outputting the modulation pulse signal by using the pulse command generating module; (d) using the filter to receive the modulated pulse signal, filtering to generate a modulated output wave, and outputting the modulated output wave to the driving circuit to be tested; (e) measuring a voltage overshoot peak value of the driving circuit to be measured by using the output voltage measuring module; (f) receiving the voltage overshoot peak value by using the pulse command generation module, and judging whether the voltage overshoot peak value is larger than an optimal voltage value; (g) if the determination result in the step (f) is negative, using the pulse command generating module to modify the modulation pulse signal by successively adding one of the KN, (K-1) N, (K-2) N, …, 2N eliminated output pulses to the modulation pulse signal, and then repeatedly executing the steps (c) to (g) until the modulation pulse signal obtained by one time of output pulse modification is such that the voltage overshoot peak value is greater than the optimized voltage value for the first time, defining the modulation pulse signal obtained by the modification as an optimized modulation pulse signal; and (h) causing the pulse command generating module to modify the reference pulse signal to output as the optimized modulated pulse signal.
Based on the above-mentioned necessary technical means, an accessory technical means derived from the present invention is that in the steps (a), (b), (c), (f), (g) and (h) of the voltage response test method of the power electronic device, the pulse command generating module comprises a pulse command calculating unit and a pulse command generating unit. And the pulse command calculation unit is used for calculating the reference pulse signal and the eliminated Nth, 2 Nth to KN-th output pulses. The pulse command generating unit is electrically connected with the pulse command calculating unit and used for receiving the reference pulse signal and the eliminated Nth, 2 Nth to KN-th output pulses so as to form a modulation pulse signal.
Based on the above-mentioned necessary technical means, an accessory technical means derived from the present invention is that in the steps (a), (b), (c), (f), (g) and (h) of the voltage response test method of the power electronic device, the pulse command generating module is a Field Programmable Gate Array (FPGA).
Based on the above-mentioned necessary technical means, a subsidiary technical means derived from the present invention is that in the steps (d) and (e) of the voltage response test method for power electronic devices, the driving circuit to be tested comprises: a gate driving circuit and a power electronic device. The grid drive circuit is electrically connected with the filter, is used for receiving the modulation output wave and is provided with a grid resistor. The power electronic element is electrically connected with the grid driving circuit and the load.
Based on the above-mentioned necessary technical means, an accessory technical means derived from the present invention is that in the step (e) of the voltage response testing method for the power electronic device, the output voltage measuring module is a voltmeter.
In view of the above, the voltage response testing method for power electronic devices provided by the present invention utilizes the pulse command generating module, the filter and the output voltage measuring module to sequentially add back the eliminated output pulses, so as to achieve the effect of automatic testing.
Drawings
FIG. 1 is a block diagram illustrating a prior art test of power electronics;
FIG. 2 is a flow chart showing a voltage response testing method for a power electronic device according to a preferred embodiment of the invention;
FIG. 3 is a block diagram showing a test system implementing the preferred embodiment of the present invention;
FIG. 4 is a schematic diagram of the pulse command generation module calculating the cancellation output pulse according to the preferred embodiment of the present invention;
FIG. 5 is a schematic diagram illustrating a modulated pulse signal output by the pulse command generating module according to a preferred embodiment of the present invention;
FIG. 6 is a schematic diagram showing waveforms of modulated output waves generated by filter filtering in a preferred embodiment of the present invention;
FIG. 7 is a diagram showing the output voltage waveform measured by the output voltage measuring module according to the preferred embodiment of the present invention;
FIG. 8 is another schematic diagram of the pulse command generation module calculating the cancellation output pulse according to the preferred embodiment of the invention;
FIG. 9 is another schematic diagram of the pulse command generating module outputting a modulated pulse signal according to the preferred embodiment of the invention;
FIG. 10 is a schematic diagram showing another waveform of the modulated output wave generated by the filter in the preferred embodiment of the invention; and
FIG. 11 is a waveform diagram of another output voltage measured by the output voltage measuring module according to the preferred embodiment of the present invention.
Description of the reference numerals
PA 1: square wave generator
PA 2: drive circuit to be tested
PA 21: gate drive circuit
PA 22: power electronic component
PA 3: load(s)
PA 4: oscilloscope
1: pulse command generation module
11: pulse command calculation unit
12: pulse command generating unit
2: filter with a filter element having a plurality of filter elements
3: output voltage measuring module
4: drive circuit to be tested
41: gate drive circuit
42: power electronic component
5: load(s)
P3, P6, P9, P12, P15, P18, P21, P24, P27, P30: output pulse
Detailed Description
Referring to fig. 2 and fig. 3, fig. 2 is a flow chart showing a voltage response testing method for a power electronic device according to a preferred embodiment of the invention; FIG. 3 is a block diagram of a test system implementing the preferred embodiment of the present invention. As shown in the figure, a voltage response testing method for power electronic devices is implemented by using a pulse command generating module 1, a filter 2 and an output voltage measuring module 3 for testing a driving circuit 4 to be tested, wherein the pulse command generating module 1 includes a pulse command calculating unit 11 and a pulse command generating unit 12, and the driving circuit 4 to be tested includes a gate driving circuit 41 and a power electronic device 42 and is electrically connected to a load 5. In the present embodiment, the pulse command generating module 1 is a Field Programmable Gate Array (FPGA), and the output voltage measuring module 3 is a voltmeter.
The voltage response test method of the power electronic element comprises the following steps S101 to S108:
step S101: the pulse command generating module 1 is used to calculate the pulse number of a reference pulse signal which is scheduled to be output in a reference state, wherein the reference pulse signal comprises the 1 st to Mth output pulses.
Step S102: the pulse command generating module 1 is used to define a cancellation reference value N and cancel the nth, 2 nth to KN output pulses in the reference pulse signal to form a modulated pulse signal.
Step S103: the pulse command generating module 1 is used to output the modulated pulse signal.
Step S104: the filter 2 is used to receive the modulated pulse signal and filter it to generate a modulated output wave which is output to the driving circuit 4 to be tested.
Step S105: the output voltage measurement module 3 is utilized to measure a voltage overshoot peak of the driving circuit 4 to be tested.
Step S106: the pulse command generating module 1 is utilized to determine whether the voltage overshoot peak value is larger than an optimized voltage value.
Step S107: the pulse command generating module 1 is used to modify the modulation pulse signal by successively adding one of the KN, K-1) N, K-2) N, … and 2N eliminated output pulses back to the modulation pulse signal.
Step S108: the pulse command generating module 1 is used to define the modulated pulse signal obtained by the modification as an optimized modulated pulse signal, and the optimized modulated pulse signal is used to output.
Referring to fig. 2 to 7, fig. 4 is a schematic diagram illustrating a pulse command generating module calculating an output pulse for cancellation according to a preferred embodiment of the invention; FIG. 5 is a schematic diagram illustrating a modulated pulse signal output by the pulse command generating module according to a preferred embodiment of the present invention; FIG. 6 is a waveform diagram illustrating the modulated output wave generated by the filter according to the preferred embodiment of the present invention; FIG. 7 is a graph showing the output voltage waveform measured by the output voltage measuring module according to the preferred embodiment of the present invention.
In step S101, the pulse command generating module 1 is used to calculate the number of pulses of a reference pulse signal predetermined to be output in a reference state according to a built-in longest rising time and a pulse output period, so that the reference pulse signal includes the 1 st to mth output pulses. More specifically, the calculation is performed by the pulse command calculation unit 11 in the pulse command generation module 1.
In the present embodiment, the built-in maximum rise time of the power electronic element 42 in the driving circuit 4 to be tested is 0.45 ms, the pulse output period of the pulse command generating module 1 is 0.015 ms, and a pulse command calculating unit 11 in the pulse command generating module 1 calculates the number of pulses of the reference pulse signal to be 30. It should be noted that, for better clarity of the figure, the pulse is not output from 0 th to 0.09 th milliseconds, so the output pulse starts to be generated only from 0.09 milliseconds, and the built-in longest rise time interval falls from 0.09 milliseconds to 0.54 milliseconds, and is 0.45 milliseconds in total, but not limited to this, and the output pulse may actually start to be generated directly from 0 second.
In step S102, the pulse command generation module 1 is used to define an elimination reference value N as 3 and eliminate the nth, 2 nth to KN output pulses in the reference pulse signal, where KN is less than or equal to the maximum positive integer of M. More specifically, the calculation is performed by the pulse command calculation unit 11 in the pulse command generation module 1. In the present embodiment, the pulse command generating module 1 should eliminate the 3 rd, 6 th, 9 th, 12 th, 15 th, … th, and 30 th output pulses, i.e. the output pulses P3, P6 th, P9 th, … th, and P30 th, to form the modulated pulse signal, and output the modulated pulse signal through the pulse command generating unit 12 in the pulse command generating module 1 (step S103). However, in the present embodiment, the description is directly from the elimination to the 3 rd, 6 th, 9 th, 12 th, and 15 th pulses, as shown in fig. 3 and 4, i.e., the output pulses P3, P6, P9, P12, and P15 are shown in the figures and are eliminated by the dashed lines. The difference between the modulated pulse signal and the reference pulse signal is that, in the modulated pulse signal, the 3 rd, 6 th, 9 th, 12 th, and 15 th output pulses are eliminated without being output, and thus, the number of pulses of the modulated pulse signal is 25.
In step S104, the filter 2 is used to receive the modulated pulse signal and filter the modulated pulse signal to generate a modulated output wave, as shown in fig. 5, and output the modulated output wave to the gate driving circuit 41 in the driving circuit 4 to be tested, and the gate driving circuit 41 drives the power electronic element 42 and outputs an output voltage and an output current. The gate driving circuit 41 has a gate resistor.
In step S105, the output voltage measuring module 3 is used to measure the output voltage waveform of the power electronic device 42 of the driving circuit 4 to be tested, as shown in fig. 6. Due to the characteristics of the power electronic element 42, a step response (step response) occurs in which oscillation occurs between an initial value and a final value after the step response reaches a steady state as appropriate, and the highest value of the oscillation is referred to as "voltage overshoot peak (overvoltage)".
If the voltage overshoot peak value is too high, the power electronic component 42 may be damaged, which is commonly referred to as burning. For example, an insulated gate bipolar transistor (hereinafter referred to as IGBT) rated at 600 volts gives an input voltage of 300 volts, and if the voltage overshoot peak exceeds 300 volts, the IGBT burns out because the voltage exceeds the rated 600 volts. Therefore, the power electronic component 42 cannot only see the input voltage and the final voltage value of the power electronic component after the steady state, and the voltage overshoot peak value of the intermediate oscillation needs to be considered.
Therefore, the tester may define the output optimized voltage value according to the use condition, and determine whether the voltage overshoot peak is greater than the optimized voltage value by using the pulse command generating module 1 (step S106). The optimized voltage value tester defines the optimized voltage value according to the usage status, the optimized voltage value built in the power electronic device 42, and so on. Continuing with the above example, the most common way is to define the optimum voltage as the middle of the nominal 600 volts and the input voltage of 300 volts, i.e., 450 volts. The optimum voltage is a safe distance from the nominal 600 volts because it is not guaranteed whether the peak voltage overshoot will exceed the optimum voltage for the first time, and therefore the optimum voltage and the nominal 600 volts cannot be too close. And the voltage overshoot peak value will also cause the electromagnetic Interference (EMI) to be too large.
As shown in fig. 6, the voltage overshoot peak does not exceed the optimum voltage value, and the process proceeds to step S107. Modifying the modulated pulse signal by using the pulse command generating module 1 to superimpose one of the K, K-1, N, K-2, N, …, 2N eliminated output pulses onto the modulated pulse signal one by one, and repeating the steps S103 to S106. That is, the pulse command generating module 1 will sequentially superimpose the changed pulse signals from the 15 th, 12 th, 9 th and 6 th output pulses and modify them, that is, sequentially add back the output pulses P15, P12, P6 and P6 in the figure, and repeat the steps S103 to S106 every time an output pulse is added back.
To be more specific, the pulse command generating module 1 first adds the output pulse P15 back to the modulated pulse signal, modifies the modulated pulse signal and outputs the modified modulated pulse signal, and repeats steps S103 to S106. When step S106 is repeated, if the pulse command generating module 1 determines that the voltage overshoot peak value is still not greater than the optimized voltage value, the pulse command generating module 1 will add the output pulse P12 back to the modulated pulse signal, and step S103 to step S106 are repeated. If the voltage overshoot peak is not larger than the optimized voltage value, the pulse command generating module 1 will add back the output pulse P9 again, and continue to repeat steps S103 to S106 until the voltage overshoot peak is larger than the optimized voltage value for the first time.
In fact, the process proceeds to fig. 4, which shows that the pulse command generating module 1 has repeated steps S103 to S106 to sequentially add one output pulse P30, P27, P24, P21, P18 back to the modulation pulse signal.
Referring to fig. 2 to 11, fig. 8 is another schematic diagram of the pulse command generating module calculating the cancellation output pulse according to the preferred embodiment of the invention; FIG. 9 is another diagram of the modulated pulse signal output by the pulse command generating module according to the preferred embodiment of the invention; FIG. 10 is a schematic diagram showing another waveform of the modulated output wave generated by the filter in the preferred embodiment of the present invention; FIG. 11 is a diagram showing another output voltage waveform measured by the output voltage measuring module according to the preferred embodiment of the present invention.
Fig. 8 corresponds to fig. 4, except that in fig. 8, the pulse command generating module 1 adds the output pulse P15 back to the modulated pulse signal (step S107). Fig. 9 is a view corresponding to fig. 5, in which the pulse command generating module 1 outputs the modulated pulse signal, and the modulated pulse signal generated in fig. 9 is closer to a complete square wave than that of fig. 5.
Fig. 10 is a view corresponding to fig. 6, in which the filter 2 receives the modulated pulse signal and filters the modulated pulse signal to generate a modulated output wave, and in the modulated output wave of fig. 10, the modulated pulse signal is closer to a complete square wave, so the modulated output wave generated after filtering is also closer to a complete square wave. As shown, fig. 6 has five sawtooth-like oscillations, while fig. 10 reduces to four sawtooth-like oscillations, so that the rise time of the modulated output wave of fig. 10 from 0 to 1 is shorter than that of fig. 6. The rise time is shortened, which is equivalent to reducing the resistance value of the gate resistance of the gate drive circuit 41. Therefore, in the embodiment, the tester does not need to observe the voltage overshoot peak value with naked eyes and manually replace the gate resistor, so that the problem derived from the fact that the tester observes the voltage overshoot peak value and manually replaces the gate resistor in the prior art is solved.
Fig. 11 is a diagram corresponding to fig. 7, and the pulse command generating module 1 determines that the voltage overshoot peak is larger than the optimized voltage value, and then outputs the optimized modulated pulse signal (step S108). Because the pulse command generating module 1 successively adds the eliminated output pulses back to the modulated pulse signal. Therefore, the rising time is gradually shortened, and the voltage overshoot peak value is gradually increased until the voltage overshoot peak value exceeds the optimized voltage value for the first time, and the modulation pulse signal obtained by the modification is defined as the optimized modulation pulse signal. Because, too high a voltage overshoot peak may burn out the power electronic components 42, even if the power electronic components 42 are not burned out, the EMI noise is too great. Therefore, after the voltage overshoot peak value first exceeds the optimized voltage value, the pulse command generating module 1 outputs the optimized modulation pulse signal, and step S107 is not repeated again, and the eliminated output pulse is added back.
In addition, since the rise time is shortened, the rise frequency (switching frequency) is increased. For example, when the power electronic device 42 is electrically connected to a power converter, if the switching frequency of the power electronic device 42 is increased, the volume of the passive device in the power converter can be reduced, thereby increasing the energy density in the power converter.
In summary, the voltage response testing method for power electronic devices provided by the present invention utilizes the output voltage measurement module to determine whether the voltage overshoot peak is greater than the optimized voltage value, and if not, utilizes the pulse command generation module to sequentially superimpose the eliminated output pulses back one at a time, thereby further shortening the rise time, gradually increasing the voltage overshoot peak to exceed the optimized voltage value for the first time, and outputting the optimized modulation pulse signal.
Compared with the prior art, the invention does not need to observe the voltage overshoot peak value by manpower and replace the grid resistor by the manual self-replacement, and automatically adds the eliminated output pulses back to one by the pulse command generation module, thereby shortening the rise time and achieving the effect of reducing the resistance value of the grid resistor. In addition, the output pulse can be eliminated to prolong the rise time, and the voltage overshoot peak value is prevented from being too high, so that the resistance value of the grid resistor can be even smaller than the minimum resistance value of the grid resistor manually replaced in the prior art. The smaller the resistance of the gate resistor is, the same as the shorter the rise time, so the switching frequency of the power electronic device can be increased.
The foregoing detailed description of the preferred embodiments is intended to more clearly illustrate the features and spirit of the present invention, and not to limit the scope of the invention by the preferred embodiments disclosed above. On the contrary, it is intended to cover various modifications and equivalent arrangements included within the scope of the appended claims.

Claims (5)

1. A voltage response test method of a power electronic element is characterized in that a pulse command generation module, a filter and an output voltage measurement module are used for testing a driving circuit to be tested, and the method comprises the following steps:
(a) calculating the pulse number of a reference pulse signal which is output in a preset reference state by using the pulse command generation module according to the built-in longest rising time and the pulse output period, so that the reference pulse signal comprises 1 st to Mth output pulses;
(b) defining an elimination reference value N by using the pulse command generation module, and eliminating the Nth output pulse, the 2 Nth output pulse and the KN (K) th output pulse in the 1 st to Mth output pulses to form a modulation pulse signal which is preset to be output in a modulation state, wherein KN is the maximum integer less than or equal to M;
(c) outputting the modulation pulse signal by using the pulse command generating module;
(d) receiving the modulation pulse signal by using the filter, filtering to generate a modulation output wave, and outputting the modulation output wave to the driving circuit to be tested;
(e) measuring a voltage overshoot peak value of the driving circuit to be measured by using the output voltage measuring module;
(f) receiving the voltage overshoot peak value by using the pulse command generation module, and judging whether the voltage overshoot peak value is larger than an optimized voltage value;
(g) if the determination result in the step (f) is negative, repeatedly performing the steps (c) to (g) by using the pulse command generating module after modifying the modulation pulse signal by successively adding one of the KN, (K-1) N, (K-2) N, …, and 2N eliminated output pulses to the modulation pulse signal, until the modulation pulse signal obtained by modifying the output pulses once is such that the voltage overshoot peak value is greater than the optimized voltage value for the first time, defining the modulation pulse signal obtained by modifying the output pulses as an optimized modulation pulse signal; and
(h) and enabling the pulse command generation module to be modified from the reference pulse signal to output with the optimized modulation pulse signal.
2. The voltage response test method of a power electronic component according to claim 1, wherein in the steps (a), (b), (c), (f), (g), (h), the pulse command generating module comprises:
a pulse command calculation unit for calculating the reference pulse signal and the N, 2N to KN output pulses to be eliminated; and
and the pulse command generating unit is electrically connected with the pulse command calculating unit and used for receiving the reference pulse signal and the eliminated Nth, 2 Nth to KN-th output pulses so as to form the modulation pulse signal.
3. The voltage response test method of a power electronic component according to claim 1, wherein in the steps (a), (b), (c), (f), (g), (h), the pulse command generating module is a field programmable gate array.
4. The voltage response test method of the power electronic component according to claim 1, wherein in the steps (d) and (e), the driving circuit under test comprises:
the grid drive circuit is electrically connected with the filter, is used for receiving the modulation output wave and is provided with a grid resistor; and
and the power electronic element is electrically connected with the grid driving circuit.
5. The voltage response test method of a power electronic component according to claim 1, wherein in the step (e), the output voltage measurement module is a voltmeter.
CN201810711678.9A 2018-07-03 2018-07-03 Voltage response test method for power electronic element Active CN110672907B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201810711678.9A CN110672907B (en) 2018-07-03 2018-07-03 Voltage response test method for power electronic element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201810711678.9A CN110672907B (en) 2018-07-03 2018-07-03 Voltage response test method for power electronic element

Publications (2)

Publication Number Publication Date
CN110672907A CN110672907A (en) 2020-01-10
CN110672907B true CN110672907B (en) 2021-09-21

Family

ID=69065828

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201810711678.9A Active CN110672907B (en) 2018-07-03 2018-07-03 Voltage response test method for power electronic element

Country Status (1)

Country Link
CN (1) CN110672907B (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4017486A1 (en) * 1990-05-31 1991-12-05 Thomson Brandt Gmbh COMPARATIVE CIRCUIT
CN1964233A (en) * 2005-11-07 2007-05-16 Jds尤尼弗思公司 Pulse shaping circuit
CN102075076A (en) * 2010-11-26 2011-05-25 深圳青铜剑电力电子科技有限公司 Method for controlling turn-off transient process of insulated gate device
CN201937456U (en) * 2010-12-20 2011-08-17 惠州三华工业有限公司 MOS (Metal Oxide Semiconductor) tube drive circuit
CN104136928A (en) * 2012-02-21 2014-11-05 高通股份有限公司 A circuit for detecting a voltage change using a time-to-digital converter

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9814115B2 (en) * 2015-12-25 2017-11-07 Panasonic Intellectual Property Management Co., Ltd. Illumination light communication apparatus and communication module

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4017486A1 (en) * 1990-05-31 1991-12-05 Thomson Brandt Gmbh COMPARATIVE CIRCUIT
CN1964233A (en) * 2005-11-07 2007-05-16 Jds尤尼弗思公司 Pulse shaping circuit
CN102075076A (en) * 2010-11-26 2011-05-25 深圳青铜剑电力电子科技有限公司 Method for controlling turn-off transient process of insulated gate device
CN201937456U (en) * 2010-12-20 2011-08-17 惠州三华工业有限公司 MOS (Metal Oxide Semiconductor) tube drive circuit
CN104136928A (en) * 2012-02-21 2014-11-05 高通股份有限公司 A circuit for detecting a voltage change using a time-to-digital converter

Also Published As

Publication number Publication date
CN110672907A (en) 2020-01-10

Similar Documents

Publication Publication Date Title
CN104133166A (en) Large-power arbitrary-waveform generation device and method
CN109861508B (en) Method and device for obtaining dithering pulse width modulation waveform and air conditioner
Roinila et al. Frequency-domain identification based on pseudorandom sequences in analysis and control of DC power distribution systems: A review
Loh et al. Evaluation of resonant damping techniquesfor z-source current-type inverter
Adrian et al. A randomized wrapped-around pulse position modulation scheme for DC–DC converters
US11621628B2 (en) Predictive active filter for EMI attenuation
CN110672907B (en) Voltage response test method for power electronic element
TWI661209B (en) Power electronic device testing method
CN100496405C (en) Ultrasonic diagnosing device
US7102405B2 (en) Pulse-width modulation circuit and switching amplifier using the same
Moonen et al. Simulink-based fpga control for emi investigations of power electronic systems
Jayawardana et al. A fast dynamic photovoltaic simulator with instantaneous output impedance matching controller
RU88812U1 (en) LOAD SIMULATION COMPLEX FOR TESTS OF POWER SUPPLY SYSTEMS FOR SPACE VEHICLES
Kang et al. Random hysteresis PWM inverter with robust spectrum shaping
CN108258702A (en) A kind of grid-connected transverter resonance suppressing method of meter and transmission line of electricity distribution capacity
CN102118103A (en) Smooth narrow pulse compensating method of FPGA in frequency converter
CN201041572Y (en) High voltage generator
CN111308310B (en) Dynamic rds (on) parameter testing machine of gallium nitride device
CN112564459B (en) Control circuit and method for controlling power switch
Karvonen et al. Reduction of EMI in switched mode converters by shaped pulse transitions
US7688605B2 (en) Systems and methods for reducing the magnitude of harmonics produced by a power inverter
CN113131907A (en) Musical tone signal amplifier and method for outputting waveform of musical tone signal
CN107948116B (en) Power amplifying device based on polar modulation
Ghasemi et al. A high frequency current source converter with adjustable magnitude to drive high power piezoelectric transducers
Hasan et al. An FPGA-based aperiodic modulation strategy for EMI suppression in quasi-Z-source DC-DC converters

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant