CN110634897B - Back-illuminated near-infrared pixel unit and preparation method thereof - Google Patents
Back-illuminated near-infrared pixel unit and preparation method thereof Download PDFInfo
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Abstract
The invention discloses a preparation method of a back-illuminated near-infrared pixel unit, which comprises the following steps: s01: preparing a substrate, epitaxially generating a first epitaxial layer on the surface of the substrate, and forming a first alignment mark on the surface of the first epitaxial layer; s02: epitaxially growing a second epitaxial layer on the surface of the first epitaxial layer, and forming a second alignment mark aligned with the first alignment mark on the surface of the second epitaxial layer; s03: repeating the step S02 until an Nth epitaxial layer and an Nth alignment mark are generated; s04: forming a front device on the surface of the Nth epitaxial layer; s05: inverting the substrate, and bonding the front device and the slide glass; s06: removing the substrate to expose the first epitaxial layer; and forming a back device on the surface of the exposed first epitaxial layer, wherein the back device is aligned with the front device through the first epitaxial layer, the second epitaxial layer and the Nth epitaxial layer. The back-illuminated near-infrared pixel unit and the preparation method thereof can improve the thickness of the epitaxial layer of the back-illuminated near-infrared pixel unit.
Description
Technical Field
The invention relates to the field of image sensors, in particular to a back-illuminated near-infrared pixel unit and a preparation method thereof.
Background
An image sensor refers to a device that converts an optical signal into an electrical signal, and image sensor chips generally used in large-scale commercial applications include two major types, a Charge Coupled Device (CCD) image sensor and a Complementary Metal Oxide Semiconductor (CMOS) image sensor chip. Compared with the traditional CCD image sensor, the CMOS image sensor has the characteristics of low power consumption, low cost, compatibility with the CMOS process and the like, so that the CMOS image sensor is more and more widely applied. At present, the CMOS image sensor is not only used in the fields of miniature digital cameras (DSC), cell phone cameras, video cameras, Digital Single Lens Reflex (DSLR) and other consumer electronics, but also widely applied in the fields of automotive electronics, monitoring, biotechnology, medicine and the like.
In the applications of security monitoring, machine vision, intelligent traffic systems, scientific detection and the like at present, the demand on the near-infrared photosensitive performance of a pixel unit is higher and higher, and because of the characteristic that the absorption coefficient of an epitaxial layer to incident light is reduced along with the increase of the wavelength, the epitaxial layer is usually a silicon photosensitive material; conventional pixel cells are limited by the thickness of the epitaxial layers, which are sensitive only to the visible band. In order to increase the sensitivity of the pixel unit to the near infrared band, the thickness of the epitaxial layer needs to be increased to collect the light of the near infrared band with longer wavelength as much as possible, so the thickness of the epitaxial layer used for manufacturing the near infrared pixel unit is generally increased from 2 to 3 micrometers, which is conventional, to tens of micrometers or even hundreds of micrometers.
When the back-lighting process is carried out, the back surface of the silicon wafer needs to be subjected to processes such as groove isolation, metal isolation and the like, and the process steps need to be aligned with the transistors processed on the front surface, so that the normal work of the pixel unit can be ensured. When the back and front alignment process is performed, a lithography machine is required to align the pattern of the back layer with the alignment mark of the front, and when a silicon layer with a conventional thickness of 2 to 3 micrometers is used, the alignment laser of the lithography machine can penetrate through the silicon layer to achieve the alignment of the back and the front. However, the limit of the silicon layer which can be penetrated by the photoetching machine is 5 microns, so that the photoetching machine cannot effectively penetrate when an epitaxial layer of dozens to hundreds of microns is used, and alignment of a back pattern of a silicon wafer and a front transistor cannot be realized, thereby affecting the performance of the near-infrared pixel unit. Therefore, a process for manufacturing a back-illuminated near-infrared pixel unit with alignment of a back device and a front device on a thick silicon layer is needed.
Disclosure of Invention
The invention aims to provide a back-illuminated near-infrared pixel unit and a preparation method thereof, which are used for realizing the alignment of the back surface and the front surface of a back-illuminated process by repeatedly extending the thickness of less than 5 microns and leaving an alignment mark on each epitaxial layer, thereby improving the thickness of the epitaxial layer of the back-illuminated near-infrared pixel unit and increasing the photosensitive property of the pixel unit to a near-infrared band.
In order to achieve the purpose, the invention adopts the following technical scheme: a preparation method of a back-illuminated near-infrared pixel unit comprises the following steps:
s01: preparing a substrate, epitaxially generating a first epitaxial layer on the surface of the substrate, and forming a first alignment mark on the surface of the first epitaxial layer through etching;
s02: epitaxially growing a second epitaxial layer on the surface of the first epitaxial layer, and forming a second alignment mark aligned with the first alignment mark on the surface of the second epitaxial layer through etching;
s03: repeating the step S02 until an Nth epitaxial layer and an Nth alignment mark are generated; wherein the Mth alignment mark is aligned with the M-1 alignment mark; n is a positive integer greater than 1; m is a positive integer which is more than 1 and less than or equal to N;
s04: forming a front surface device on the surface of the Nth epitaxial layer, and aligning the front surface device with the Nth alignment mark;
s05: integrally inverting the substrate, the first epitaxial layer, the second epitaxial layer, the Nth epitaxial layer and the front device, and bonding the front device and the slide glass;
s06: removing the substrate to expose the first epitaxial layer; and forming a back device on the surface of the exposed first epitaxial layer, and aligning the back device with the first alignment mark, so that the back device passes through the first epitaxial layer, the second epitaxial layer until the Nth epitaxial layer is aligned with the front device.
Furthermore, the thicknesses of the first epitaxial layer, the second epitaxial layer and the Nth epitaxial layer are less than or equal to 5 microns.
Furthermore, the first epitaxial layer, the second epitaxial layer and the Nth epitaxial layer are all made of silicon photosensitive materials.
Further, the backside device includes a backside trench isolation, the backside trench isolation being located in the first epitaxial layer and aligned with the first alignment mark.
Further, the back surface device further comprises a back surface metal isolation, and the forming method of the back surface metal isolation comprises the following steps: and depositing a metal isolation layer on the surface of the exposed first epitaxial layer, and polishing and imaging to form a back metal isolation layer, so that the back metal isolation layer covers the back groove isolation.
Further, the front side device includes front side transistors, photodiodes and front side metal interconnects, the photodiodes being located between the front side transistors; the front side transistor passes through the Nth alignment mark and the N-1 th alignment mark until the first alignment mark and the back side groove isolation are aligned.
A back-illuminated near-infrared pixel unit comprises a slide glass, a front device, an epitaxial layer and a back device, wherein the epitaxial layer comprises a first epitaxial layer, a second epitaxial layer and an Nth epitaxial layer, the first epitaxial layer, the second epitaxial layer and the Nth epitaxial layer respectively contain a first alignment mark, a second alignment mark and an Nth alignment mark, and the Mth alignment mark and the Mth-1 alignment mark are aligned; n is a positive integer greater than 1; m is a positive integer which is more than 1 and less than or equal to N; the front device is positioned on the surface of a slide glass, the Nth epitaxial layer is positioned on the surface of the front device, and the Nth alignment mark is positioned on the contact surface of the Nth epitaxial layer and the front device; the N-1 epitaxial layer is positioned on the surface of the N epitaxial layer, and the N-1 alignment mark is positioned on the contact surface of the N-1 epitaxial layer and the N epitaxial layer; until the first epitaxial layer is positioned on the surface of the second epitaxial layer, and the first alignment mark is positioned on the contact surface of the first epitaxial layer and the second epitaxial layer; the back device is located on the surface of the first epitaxial layer, and the back device passes through the Nth alignment mark and the N-1 th alignment mark until the first alignment mark is aligned with the front device.
Furthermore, the thicknesses of the first epitaxial layer, the second epitaxial layer and the Nth epitaxial layer are less than or equal to 5 microns.
Further, the backside device includes a backside trench isolation, the backside trench isolation being located in the first epitaxial layer and aligned with the first alignment mark.
Further, the front side device includes front side transistors, photodiodes and front side metal interconnects, the photodiodes being located between the front side transistors; the front side transistor passes through the Nth alignment mark and the N-1 th alignment mark until the first alignment mark and the back side groove isolation are aligned.
The invention has the beneficial effects that: the invention breaks through the limitation that the thickness of an epitaxial layer in the conventional back-illuminated process is less than 5 microns, and can realize the back-illuminated near-infrared pixel unit with the epitaxial layer with any thickness, wherein the epitaxial layer is a photosensitive material; the alignment of the back surface and the front surface of the back-illuminated process is realized by repeatedly extending less than 5 microns and leaving an aligned alignment mark on each epitaxial layer, so that the thickness of the epitaxial layer of the back-illuminated near-infrared pixel unit is increased, and the photosensitive property of the near-infrared pixel unit to a near-infrared waveband is increased.
Drawings
Fig. 1 is a cross-sectional view of a back-illuminated near-infrared pixel unit in the prior art.
Fig. 2 is a cross-sectional view of the formation of a first epitaxial layer.
Fig. 3 is a sectional view of forming a first alignment mark.
Fig. 4 is a cross-sectional view of the formation of a second epitaxial layer and a second alignment mark.
Fig. 5 is a cross-sectional view of the formation of an nth epitaxial layer and an nth alignment mark.
Fig. 6 is a cross-sectional view after formation of a front side device.
Fig. 7 is a cross-sectional view after bonding the epitaxial layer and the carrier wafer.
Fig. 8 is a cross-sectional view after removal of the substrate.
Fig. 9 is a cross-sectional view of a back-illuminated near-infrared pixel cell of the present invention.
In the figure: 1 substrate, 2 back side trench isolation, 3 back side metal isolation, 4 epitaxial layers, 41 first epitaxial layers, 42 second epitaxial layers, 43 nth epitaxial layers, 51 first alignment marks, 52 second alignment marks, 53 nth alignment marks, 6 front side metal interconnects, 7 front side transistors, 8 carrier wafers, 11 front side devices, 12 back side devices.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention are described in detail below with reference to the accompanying drawings.
As shown in fig. 1, since the thickness of the epitaxial layer 4 required in the near-infrared pixel unit is tens of microns or even hundreds of microns, at this thickness, the lithography machine cannot align the front transistor 7 at the bottom of the silicon layer and the back trench isolation 2 and the back metal isolation 3 at the top of the silicon layer, thereby affecting the normal operation of the near-infrared pixel unit.
As shown in fig. 9, the back-illuminated near-infrared pixel unit provided by the present invention includes a carrier 8, a front device 11, an epitaxial layer and a back device 12, wherein the epitaxial layer includes a first epitaxial layer 41, a second epitaxial layer 42 to an nth epitaxial layer 43, and the first epitaxial layer 41, the second epitaxial layer 42 to the nth epitaxial layer 43 respectively include a first alignment mark 51, a second alignment mark 52 to an nth alignment mark 53; the Mth alignment mark and the M-1 alignment mark are aligned; n is a positive integer greater than 1; m is a positive integer which is more than 1 and less than or equal to N; in the invention, the silicon photosensitive material is not used for the first epitaxial layer, the second epitaxial layer and the Nth epitaxial layer.
The front device 11 is positioned on the upper surface of the slide glass 9, the Nth epitaxial layer 43 is positioned on the upper surface of the front device, and the Nth alignment mark 53 is positioned on the contact surface of the Nth epitaxial layer 43 and the front device; the N-1 epitaxial layer is positioned on the upper surface of the N epitaxial layer 43, and the N-1 alignment mark is positioned on the contact surfaces of the N-1 epitaxial layer and the N epitaxial layer; until the first epitaxial layer 41 is positioned on the upper surface of the second epitaxial layer 42, and the first alignment mark 51 is positioned on the contact surface of the first epitaxial layer 41 and the second epitaxial layer 42; the back device is located on the upper surface of the first epitaxial layer 41, and the back device passes through the Nth alignment mark and the N-1 th alignment mark until the first alignment mark is aligned with the front device.
As shown in fig. 9, the front device includes front transistors 7 and photodiodes (not shown) located between the front transistors, and the front transistors 7 and the photodiodes are located in a dielectric layer, which further includes front metal interconnects 6 for leading out signals of the front device, and the front device is aligned with the nth alignment mark. The back side device comprises a back side trench isolation 2 and a back side metal isolation 3, wherein the back side metal isolation 3 covers the back side trench isolation 2, and the back side trench isolation is aligned with the first alignment mark. The back side trench isolation 2 passes through the Nth alignment mark and the N-1 th alignment mark until the first alignment mark is aligned with the front side transistor 7.
A preparation method of a back-illuminated near-infrared pixel unit comprises the following steps:
s01: as shown in fig. 2 and 3, a substrate is prepared, a first epitaxial layer 41 is epitaxially grown on the surface of the substrate 1, and a first alignment mark 51 is formed on the surface 41 of the first epitaxial layer by etching. The substrate may be a silicon substrate, the first epitaxial layer is a silicon photosensitive material, and the first alignment mark is formed on an upper surface of the first epitaxial layer. The first alignment marks may be a plurality of marks distributed at various positions on the upper surface of the first epitaxial layer, the specific distribution positions are positions where front-side devices and back-side devices to be aligned are generated in a subsequent process, and the number of the first alignment marks is determined according to the number of the front-side devices and the back-side devices to be aligned. The thickness of the first epitaxial layer is 5 microns or less because a normal photolithography can penetrate a silicon layer to the limit of 5 microns.
S02: as shown in fig. 4, a second epitaxial layer 42 is epitaxially grown on the surface of the first epitaxial layer 41, and a second alignment mark 52 aligned with the first alignment mark 51 is formed on the surface of the second epitaxial layer 42 by etching. The second epitaxial layer is also made of silicon photosensitive material, and the thickness of the second epitaxial layer is less than or equal to 5 microns; wherein the second alignment mark is formed at a position aligned with the first alignment mark, i.e., at the same position in the vertical direction.
S03: as shown in fig. 5, step S02 is repeated until the nth epitaxial layer 43 and the nth alignment mark 53 are generated; n is a positive integer greater than 1. Each epitaxial layer is made of silicon photosensitive material, the thickness of each epitaxial layer is less than or equal to 5 microns, and the sequentially generated alignment marks are located at the same position in the vertical direction. The total thickness of the formed overall epitaxial layers, namely the first epitaxial layer, the second epitaxial layer and the nth epitaxial layer, can be dozens or even hundreds of micrometers, and the specific thickness is set according to the functions and requirements of the pixel unit. Aligning the Mth alignment mark and the M-1 th alignment mark in the process of sequentially forming the epitaxial layers; n is a positive integer greater than 1; m is a positive integer which is more than 1 and less than or equal to N;
s04: as shown in fig. 6, a front surface device 11 is formed on the upper surface of the nth epitaxial layer, and the front surface device is aligned with the nth alignment mark. The front device comprises front transistors 7 and photodiodes arranged between the front transistors, wherein the front transistors and the photodiodes are arranged in a dielectric layer, and the dielectric layer further comprises a front metal interconnection 6 for leading out signals of the front device.
The specific method comprises the following steps: and depositing a dielectric layer on the upper surface of the Nth epitaxial layer, forming a front transistor 7, a photodiode between the front transistors and other front devices at the contact part of the dielectric layer and the Nth epitaxial layer, and forming a front metal interconnection 6 in the dielectric layer for leading out signals. The method for forming the front device in this step is prior art and will not be described in detail here. It should be noted that, in this step, the formation position of the front side transistor is aligned with the nth alignment mark, and since the alignment marks in the epitaxial layers are all aligned, that is, the positions in the vertical direction are the same, the front side transistor is aligned with the nth alignment mark, that is, aligned with the first to nth alignment marks. Note that the positions of the alignment marks in the drawings are merely schematic and do not represent specific positions thereof, and the positions of the alignment marks in the present invention may be provided between any of the back side device and the front side device that need to be aligned.
In the front-side device forming process, the alignment and the related position arrangement between the front-side transistor and the front-side metal can be referred to the prior art, and the alignment forming process of the front-side transistor is not described in detail herein.
S05: as shown in fig. 7, the substrate, the first epitaxial layer, the second epitaxial layer, the nth epitaxial layer and the front device formed in the above manner are integrally inverted, the front device is located at the lowest position after inversion, and the surface of the front device is bonded with the carrier 8; at this time, the substrate 1 is located at the top, and the first epitaxial layer 41, the second epitaxial layer 42 and the nth epitaxial layer 43 are sequentially arranged below the substrate 1. The specific bonding process can adopt the process in the prior art.
S06: as shown in fig. 8 and 9, the substrate is removed by grinding, etching, and chemical mechanical polishing, etc., to expose the first epitaxial layer 41; at this time, the first alignment mark 51 in the first epitaxial layer 41 is located on the first epitaxial layer and the second epitaxial layer contact face, the back device is formed on the first epitaxial layer upper surface, and the back device is aligned with the first alignment mark, so that the front device and the back device are aligned.
The back side device comprises a back side trench isolation 2, the back side trench isolation 2 being located in the epitaxial layer, and the back side trench isolation 2 being aligned with the alignment mark. The specific back trench isolation can be formed in the epitaxial layer in a graphical etching mode, the graphical etching position is the position of the first alignment mark, and the depth of the back trench in the epitaxial layer can be set according to the requirements of the pixel unit.
The back device further comprises a back metal isolation 3, and the forming method of the back metal isolation comprises the following steps: and depositing a metal isolation layer on the surface of the first epitaxial layer, and polishing and imaging to form a back metal isolation layer so that the back metal isolation layer covers the back groove isolation layer.
Because the thickness of the first epitaxial layer is less than or equal to 5 microns, the photoetching process of the back metal isolation and the back groove isolation can be aligned with the first alignment mark, the alignment is carried out in the process of forming the front device and the Nth alignment mark, the alignment is carried out between the Mth alignment mark and the M-1 th alignment mark in the epitaxial layer, namely, the front transistor and the front metal interconnection are aligned with the first epitaxial layer through multiple times of epitaxy and photoetching, and the alignment between the front transistor and the back metal isolation and the back groove isolation process is finally realized. All front-side devices and back-side devices needing to be aligned can be aligned through the alignment marks. The thickness of the epitaxial layer of the back-illuminated near-infrared pixel unit, namely the thickness of the photosensitive material layer, can be improved through the epitaxial process containing the alignment mark for many times, so that the photosensitive characteristic of the near-infrared pixel unit to a near-infrared band is improved.
The above description is only a preferred embodiment of the present invention, and the embodiment is not intended to limit the scope of the present invention, so that all equivalent structural changes made by using the contents of the specification and the drawings of the present invention should be included in the scope of the appended claims.
Claims (10)
1. A preparation method of a back-illuminated near-infrared pixel unit is characterized by comprising the following steps:
s01: preparing a substrate, epitaxially generating a first epitaxial layer on the surface of the substrate, and forming a first alignment mark on the surface of the first epitaxial layer through etching;
s02: epitaxially growing a second epitaxial layer on the surface of the first epitaxial layer, and forming a second alignment mark aligned with the first alignment mark on the surface of the second epitaxial layer through etching;
s03: repeating the step S02 until an Nth epitaxial layer and an Nth alignment mark are generated; wherein the Mth alignment mark is aligned with the M-1 alignment mark; n is a positive integer greater than 2; m is a positive integer which is more than 1 and less than or equal to N;
s04: forming a front surface device on the surface of the Nth epitaxial layer, and aligning the front surface device with the Nth alignment mark;
s05: integrally inverting the substrate, the first epitaxial layer, the second epitaxial layer, the Nth epitaxial layer and the front device, and bonding the front device and the slide glass;
s06: removing the substrate to expose the first epitaxial layer; and forming a back device on the surface of the exposed first epitaxial layer, and aligning the back device with the first alignment mark, so that the back device passes through the first epitaxial layer, the second epitaxial layer until the Nth epitaxial layer is aligned with the front device.
2. The method for manufacturing a back-illuminated near-infrared pixel unit according to claim 1, wherein the thicknesses of the first epitaxial layer, the second epitaxial layer and the nth epitaxial layer are less than or equal to 5 micrometers.
3. The method of claim 1, wherein the first epitaxial layer, the second epitaxial layer, and up to the nth epitaxial layer are all made of silicon photosensitive material.
4. The method of claim 1, wherein the backside device comprises a backside trench isolation, the backside trench isolation is in a first epitaxial layer, and the backside trench isolation is aligned with the first alignment mark.
5. The method for manufacturing a back-illuminated near-infrared pixel unit according to claim 4, wherein the back device further comprises a back metal isolation formed by: and depositing a metal isolation layer on the surface of the exposed first epitaxial layer, and polishing and imaging to form a back metal isolation layer, so that the back metal isolation layer covers the back groove isolation.
6. The method of claim 4, wherein the front side device comprises front side transistors, a photodiode and front side metal interconnects, the photodiode being located between the front side transistors; the front side transistor passes through the Nth alignment mark and the N-1 th alignment mark until the first alignment mark and the back side groove isolation are aligned.
7. A back-illuminated near-infrared pixel unit is characterized by comprising a slide glass, a front device, an epitaxial layer and a back device, wherein the epitaxial layer comprises a first epitaxial layer, a second epitaxial layer and an Nth epitaxial layer, the first epitaxial layer, the second epitaxial layer and the Nth epitaxial layer respectively contain a first alignment mark, a second alignment mark and an Nth alignment mark, and the Mth alignment mark and the Mth-1 alignment mark are aligned; n is a positive integer greater than 2; m is a positive integer which is more than 1 and less than or equal to N; the front device is positioned on the surface of a slide glass, the Nth epitaxial layer is positioned on the surface of the front device, and the Nth alignment mark is positioned on the contact surface of the Nth epitaxial layer and the front device; the N-1 epitaxial layer is positioned on the surface of the N epitaxial layer, and the N-1 alignment mark is positioned on the contact surface of the N-1 epitaxial layer and the N epitaxial layer; until the first epitaxial layer is positioned on the surface of the second epitaxial layer, and the first alignment mark is positioned on the contact surface of the first epitaxial layer and the second epitaxial layer; the back device is located on the surface of the first epitaxial layer, and the back device passes through the Nth alignment mark and the N-1 th alignment mark until the first alignment mark is aligned with the front device.
8. The back-illuminated near-infrared pixel cell of claim 7, wherein the thickness of the first epitaxial layer, the second epitaxial layer up to the nth epitaxial layer is less than or equal to 5 microns.
9. The back-illuminated NIR pixel cell of claim 7, wherein the backside device comprises a backside trench isolation, the backside trench isolation being in the first epitaxial layer and the backside trench isolation being aligned with the first alignment mark.
10. The back-illuminated near-infrared pixel cell of claim 9, wherein the front side devices comprise front side transistors, photodiodes and front side metal interconnects, the photodiodes being located between the front side transistors; the front side transistor passes through the Nth alignment mark and the N-1 th alignment mark until the first alignment mark and the back side groove isolation are aligned.
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| CN103730338A (en) * | 2012-10-12 | 2014-04-16 | 富士电机株式会社 | Semiconductor device manufacturing method |
| CN106876469A (en) * | 2017-02-22 | 2017-06-20 | 江苏华弗半导体有限公司 | The manufacture method and superjunction devices of a kind of superjunction devices |
| CN107706148A (en) * | 2017-10-17 | 2018-02-16 | 吉林华微电子股份有限公司 | Improve method, the preparation method of super junction product and the super junction product of photo-etching mark alignment precision |
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| CN103730338A (en) * | 2012-10-12 | 2014-04-16 | 富士电机株式会社 | Semiconductor device manufacturing method |
| CN106876469A (en) * | 2017-02-22 | 2017-06-20 | 江苏华弗半导体有限公司 | The manufacture method and superjunction devices of a kind of superjunction devices |
| CN107706148A (en) * | 2017-10-17 | 2018-02-16 | 吉林华微电子股份有限公司 | Improve method, the preparation method of super junction product and the super junction product of photo-etching mark alignment precision |
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