CN110608810A - Passive temperature detection system based on SAW - Google Patents
Passive temperature detection system based on SAW Download PDFInfo
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- CN110608810A CN110608810A CN201910978870.9A CN201910978870A CN110608810A CN 110608810 A CN110608810 A CN 110608810A CN 201910978870 A CN201910978870 A CN 201910978870A CN 110608810 A CN110608810 A CN 110608810A
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- 238000010998 test method Methods 0.000 claims description 2
- 238000013461 design Methods 0.000 abstract description 7
- 238000010586 diagram Methods 0.000 description 12
- 238000010897 surface acoustic wave method Methods 0.000 description 5
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- 238000009529 body temperature measurement Methods 0.000 description 1
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01K—MEASURING TEMPERATURE; MEASURING QUANTITY OF HEAT; THERMALLY-SENSITIVE ELEMENTS NOT OTHERWISE PROVIDED FOR
- G01K1/00—Details of thermometers not specially adapted for particular types of thermometer
- G01K1/02—Means for indicating or recording specially adapted for thermometers
- G01K1/024—Means for indicating or recording specially adapted for thermometers for remote indication
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01K—MEASURING TEMPERATURE; MEASURING QUANTITY OF HEAT; THERMALLY-SENSITIVE ELEMENTS NOT OTHERWISE PROVIDED FOR
- G01K11/00—Measuring temperature based upon physical or chemical changes not covered by groups G01K3/00, G01K5/00, G01K7/00 or G01K9/00
- G01K11/22—Measuring temperature based upon physical or chemical changes not covered by groups G01K3/00, G01K5/00, G01K7/00 or G01K9/00 using measurement of acoustic effects
- G01K11/26—Measuring temperature based upon physical or chemical changes not covered by groups G01K3/00, G01K5/00, G01K7/00 or G01K9/00 using measurement of acoustic effects of resonant frequencies
- G01K11/265—Measuring temperature based upon physical or chemical changes not covered by groups G01K3/00, G01K5/00, G01K7/00 or G01K9/00 using measurement of acoustic effects of resonant frequencies using surface acoustic wave [SAW]
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- G—PHYSICS
- G08—SIGNALLING
- G08C—TRANSMISSION SYSTEMS FOR MEASURED VALUES, CONTROL OR SIMILAR SIGNALS
- G08C17/00—Arrangements for transmitting signals characterised by the use of a wireless electrical link
- G08C17/02—Arrangements for transmitting signals characterised by the use of a wireless electrical link using a radio link
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Abstract
The invention belongs to the technical field of SAW detection, and particularly relates to a wireless and passive SAW temperature detection system. The detection system reduces the cost and increases the transmission distance by redesigning the transceiving antenna. The detection precision is improved through the design of a mixing circuit. The temperature sensor comprises a SAW temperature sensor, a PIFA antenna, a temperature reader and a display unit; the SAW temperature sensor is externally connected with a spiral antenna, the spiral antenna transmits signals to the PIFA antenna, the PIFA antenna is connected with a temperature reader, and the temperature reader is connected with the display unit.
Description
Technical Field
The invention belongs to the technical field of SAW detection, and particularly relates to a wireless and passive SAW temperature detection system.
Background
The SAW temperature sensor is one of the important technologies for realizing SAW passive temperature detection, and the SAW device is composed of a piezoelectric material, a reflection grating, an interdigital transducer (IDT) and the like. However, the traditional SAW-based temperature measurement has high cost, low precision and short distance.
Disclosure of Invention
Aiming at the defects in the prior art, the invention provides the passive temperature detection system based on the SAW, and the detection system reduces the cost and increases the transmission distance by redesigning the transceiving antenna. The detection precision is improved through the design of a mixing circuit.
In order to achieve the purpose, the invention adopts the following technical scheme that the temperature measuring device comprises a SAW temperature sensor, a PIFA antenna, a temperature reader and a display unit; the SAW temperature sensor is externally connected with a spiral antenna, the spiral antenna transmits signals to the PIFA antenna, the PIFA antenna is connected with a temperature reader, and the temperature reader is connected with the display unit.
As a preferable aspect of the present invention, the temperature reader includes a transmitting module and a receiving module.
The transmitting module comprises an FPGA processor, a DDS frequency synthesizer, a PLL (phase locked loop) module, an AMP power amplifier module and a high-speed switch; the FPGA processor is connected with the DDS frequency synthesizer and the PLL module, the DDS frequency synthesizer is connected with the PLL module, and the PLL module is connected with the AMP power amplifier module; and the AMP power amplification module is connected with the high-speed switch.
The receiving comprises a band-pass filter, an LNA low noise amplifier, a MIXER MIXER and an AGC self-gain amplifier; the input of the band-pass filter is connected with the high-speed switch, the output of the band-pass filter is connected with the input of the LNA, and the input of the mixer is connected with the output of the LNA and the phase-locked loop module respectively; the output of the mixer is connected to a self-gain amplifier, which is connected to the FPGA.
As another preferred scheme of the present invention, the phase-locked loop module includes an ADF4351 chip, and a 12 (Ta +) pin of the ADF4351 chip is used for frequency doubling of a transmission link and is connected to a power amplifier module of the AMP module; the ADF4351 chip 14 (Tb +) pin is used for receiving local oscillation signal output and is connected with the 4 pins of the AMP power amplification module ADL5243 chip, and the ADF4351 chip 14 (Tb +) pin signal output is also used for generating local oscillation signal at the receiving end and is connected with the 3 pins of the mixer AD608ARZ chip.
In a preferred embodiment of the present invention, the DDS frequency synthesizer includes an AD9959 chip, pins 3, 4, 46, 47, 48, 50, 51, 52, 53 of the AD9959 chip are connected to pins 78, 79, 80, 81, 82, 93, 94, 95, 96, 97 of the FPGA, and pin 30 of the AD9959 chip is connected to pin 29 of the ADF4351 chip of the phase-locked loop module.
As a preferred scheme of the present invention, the AMP power amplifier module includes a chip ADL5243, wherein a pin 4 of the chip ADL5243 is connected to a pin 12 of an ADF4351 chip; the pin 21 of the chip ADL5243 is connected with a high-speed switch; the 4 control pins 29, 30, 31, 32 of the ADL5243 chip are connected to the 9, 10, 11, 12 pins of the master control chip, respectively.
As a preferred scheme of the invention, the high-speed switch comprises two high-speed switch chips ADG901, a pin 8 of a transmission signal control switch chip ADG901 is connected with a pin 21 of a chip ADL5243, a pin 2 of the chip ADG901 is connected with a pin 92 of an FPGA through a resistor to output a transmission signal to a transmission antenna for control, and a pin 4 of the chip ADG901 is connected with the transmission antenna through a capacitor; when receiving signals, the signals enter through the 8 pins of the two ADG901 of the receiving switch chip, the 4 pins are connected with the 3 pins of the band-pass filter SAWF-315, and the 2 pins of the control pin are controlled by the 88 pins of the FPGA.
As a preferred scheme of the present invention, the bandpass filter includes a chip SAWF-315, the low noise amplifier includes a chip MGA62563, and pin 3 of the chip MGA62563 is connected to pin 6 of the bandpass filter through an inductor L17; the 2 pin of the band-pass filter is connected with the 4 pin of the high-speed switch through a resistor R77; pin 6 of chip MGA62563 is connected as an output pin to pin 5 of the mixer.
As a preferred scheme of the present invention, the mixer includes a chip AD608ARZ, a pin 5 of the chip AD608ARZ is connected to a pin 6 of the chip MGA62563 as an input, a received signal enters the mixer, and a pin 3 of the chip AD608ARZ is connected to the PLL module as a received local oscillation signal; the 15 pin of the chip AD608ARZ is connected with the AGC self-gain amplifier as the output of the mixing signal.
In a preferred embodiment of the present invention, the AGC self-gain amplifier and the AMP power amplifier module share the same chip ADL5243, pin 19 of the chip ADL5243 is connected as an input to the mixer 15 pin mixed output signal, and pin 6 of the chip ADL5243 is connected as an output to pin 105 of the FPGA.
The test method based on the SAW passive temperature detection system comprises the following steps:
and step A, generating an excitation signal through an FPGA processor, a DDS frequency synthesizer, a PLL (phase locked loop) module and an AMP power amplifier module.
And B: and the excitation signal is transmitted to the SAW temperature sensor through the PIFA antenna through the high-speed switch.
And C: and sending the echo signal generated by the SAW temperature sensor to the PIFA antenna through the spiral antenna.
And D, filtering, amplifying and mixing the echo signals received by the PIFA antenna, and transmitting the echo signals to the FPGA processor through self-gain amplification.
And E, transmitting the temperature acquired by the FPGA processor to a display unit for displaying, and transmitting the temperature to an upper computer for displaying through the display unit.
Compared with the prior art, the invention has the beneficial effects.
The invention greatly reduces the difficulty of realizing SAW temperature detection and reduces the cost by designing the normal spiral antenna and the PIFA antenna. The detection distance is increased by the design of the filtering and amplifying circuit, so that the detection distance reaches 1M to 1.5M.
Drawings
The invention is further described with reference to the following figures and detailed description. The scope of the invention is not limited to the following expressions.
FIG. 1 is a block diagram of the system of the present invention.
Fig. 2 is a block diagram of the temperature reader of the present invention.
Fig. 3 is a schematic diagram of the helical antenna of the present invention.
FIG. 4 is a circuit diagram of an ADF4351 chip according to the present invention.
Fig. 5 is a circuit diagram of an ADL5243 chip of the invention.
Fig. 6 is a circuit diagram of a DDS module of the invention.
FIG. 7 is a circuit diagram of the FPGA of the present invention. Fig. 7-1 to 7-3 are partial enlarged views of fig. 7.
Fig. 8 is a high speed switching circuit diagram of the present invention.
Fig. 9 is a circuit diagram of the mixer of the present invention.
FIG. 10 is a circuit diagram of lNA filter and LNA of the present invention.
Detailed Description
As shown in fig. 1-10, the present invention includes a SAW temperature sensor, a PIFA antenna, a temperature reader, and a display unit; the SAW temperature sensor is externally connected with a spiral antenna, the spiral antenna transmits signals to the PIFA antenna, the PIFA antenna is connected with a temperature reader, and the temperature reader is connected with the display unit.
As a preferable aspect of the present invention, the temperature reader includes a transmitting module and a receiving module.
The transmitting module comprises an FPGA processor, a DDS frequency synthesizer, a PLL (phase locked loop) module, an AMP power amplifier module and a high-speed switch; the FPGA processor is connected with the DDS frequency synthesizer and the PLL module, the DDS frequency synthesizer is connected with the PLL module, and the PLL module is connected with the AMP power amplifier module; and the AMP power amplification module is connected with the high-speed switch.
The receiving comprises a band-pass filter, an LNA low noise amplifier, a MIXER MIXER and an AGC self-gain amplifier; the input of the band-pass filter is connected with the high-speed switch, the output of the band-pass filter is connected with the input of the LNA, and the input of the mixer is connected with the output of the LNA and the phase-locked loop module respectively; the output of the mixer is connected to a self-gain amplifier, which is connected to the FPGA.
As another preferred scheme of the present invention, the phase-locked loop module includes an ADF4351 chip, and a 12 (Ta +) pin of the ADF4351 chip is used for frequency doubling of a transmission link and is connected to a power amplifier module of the AMP module; the ADF4351 chip 14 (Tb +) pin is used for receiving local oscillation signal output and is connected with the 4 pins of the AMP power amplification module ADL5243 chip, and the ADF4351 chip 14 (Tb +) pin signal output is also used for generating local oscillation signal at the receiving end and is connected with the 3 pins of the mixer AD608ARZ chip.
In a preferred embodiment of the present invention, the DDS frequency synthesizer includes an AD9959 chip, pins 3, 4, 46, 47, 48, 50, 51, 52, 53 of the AD9959 chip are connected to pins 78, 79, 80, 81, 82, 93, 94, 95, 96, 97 of the FPGA, and pin 30 of the AD9959 chip is connected to pin 29 of the ADF4351 chip of the phase-locked loop module.
As a preferred scheme of the present invention, the AMP power amplifier module includes a chip ADL5243, wherein a pin 4 of the chip ADL5243 is connected to a pin 12 of an ADF4351 chip; the pin 21 of the chip ADL5243 is connected with a high-speed switch; the 4 control pins 29, 30, 31, 32 of the ADL5243 chip are connected to the 9, 10, 11, 12 pins of the master control chip, respectively.
As a preferred embodiment of the present invention, as shown in fig. 8, it is a circuit diagram of a first high-speed switch chip, and since the second chip has a similar circuit structure to the first chip, only the circuit diagram of the first chip is listed, and the difference is pointed out below. The high-speed switch comprises two high-speed switch chips ADG901, a pin 8 of an ADG901 of a transmission signal control switch chip is connected with a pin 21 of an ADL5243, a pin 2 of the ADG901 of the chip is connected with a pin 92 of the FPGA through a resistor to output a transmission signal to a transmission antenna for control, and a pin 4 of the ADG901 of the chip is connected with the transmission antenna through a capacitor; when receiving signals, the signals enter through the 8 pins of the two ADG901 of the receiving switch chip, the 4 pins are connected with the 3 pins of the band-pass filter SAWF-315, and the 2 pins of the control pin are controlled by the 88 pins of the FPGA.
As a preferred scheme of the present invention, the bandpass filter includes a chip SAWF-315, the low noise amplifier includes a chip MGA62563, and pin 3 of the chip MGA62563 is connected to pin 6 of the bandpass filter through an inductor L17; the 2 pin of the band-pass filter is connected with the 4 pin of the high-speed switch through a resistor R77; pin 6 of chip MGA62563 is connected as an output pin to pin 5 of the mixer.
As a preferred scheme of the present invention, the mixer includes a chip AD608ARZ, a pin 5 of the chip AD608ARZ is connected to a pin 6 of the chip MGA62563 as an input, a received signal enters the mixer, and a pin 3 of the chip AD608ARZ is connected to the PLL module as a received local oscillation signal; the 15 pin of the chip AD608ARZ is connected with the AGC self-gain amplifier as the output of the mixing signal.
In a preferred embodiment of the present invention, the AGC self-gain amplifier and the AMP power amplifier module share the same chip ADL5243, pin 19 of the chip ADL5243 is connected as an input to the mixer 15 pin mixed output signal, and pin 6 of the chip ADL5243 is connected as an output to pin 105 of the FPGA.
The invention relates to embodiments.
And step A, simulating SPI communication by using an FPGA (field programmable gate array), and carrying out communication control on a chip AD9959 of the DDS frequency synthesizer.
Firstly, initializing and configuring the write initial values of registers in a chip, firstly writing a functional register FR1/FR2, performing frequency multiplication and frequency division configuration on an internal phase-locked loop, then writing registers such as a frequency control word CFTW, a phase control word CPOW and an amplitude control word AC, finally writing a channel selection register CSR, and opening a corresponding channel to output a waveform.
Two DAC output ports are commonly used in the design, wherein CH0_ IOUT is responsible for generation of reference signals of a transmitting end, and CH1_ IOUT generates reference signals required by local oscillation at a receiving end.
According to the design requirement of the system, a frequency control word and a phase control word of a phase required by generating a 13.5MHz ~ 13.75.75 MHz signal are calculated through a formula, and hexadecimal numbers of the frequency control word and the phase control word are written into corresponding registers through the SPI, so that the DDS can generate a corresponding waveform signal.
Step B, selecting an ADF4351 chip of ADI company as a frequency multiplier of a phase-locked loop to output bandwidth from 35MHz ~ 4400MHz, designing a reference input signal of 13.5MHz ~ 13.75.75 MHz by configuring each register, outputting 432MHz ~ 440MHz signals by 32 frequency multiplication and outputting 432MHz ~ MHz signals by 10kHz step frequency, wherein a calculation formula of the output frequency is that in the phase-locked loop, the reference input signal is frequency-multiplied to 3464MHz, then 8 frequency division is carried out to obtain 433MHz output signals, a corresponding control word is written into a register R0 ~ R5, the input signals are frequency-multiplied by 32 to generate 433MHz excitation signals, after starting oscillation of a VCO and working are stable, values of the registers R0 and R1 are changed, and the 10kHz step excitation signals can be realized.
And C: the output signal of the phase-locked loop passes through an AMP power amplification module, so that the emitted high-frequency signal obtains the power of more than 10 dBm. The power amplifier module of the invention uses ADL5243 to amplify the signal, the amplifier is connected with the main control chip through 4-wire SPI, the amplification factor is written, and pi-type network is designed to carry out impedance matching at the front end and the rear end of the signal in and out so as to reduce the loss of the signal transmission process.
Step D: the excitation signal output by the AMP amplifier passes through the Switch high-speed Switch, and the high-speed Switch of the invention adopts an ADG901 chip of ADI. The fast response of ADG901 in the 433MHz range, the switching on and off switching time is only 6.1 ns. And connecting the RFC port to the SMA-KE connector through a 50 omega transmission line to be connected with the antenna. RF1 and RF2 are connected to the transmitting terminal TX and the receiving terminal RX through 50 Ω transmission lines, respectively.
The switch is switched to the transmitting terminal TX to transmit the excitation signal, and the transmitting antenna is shown in fig. 4. The excitation signal emitted to the sensor is shown in fig. 5, with the duration of the excitation signal being 3.92 ms.
And E, after the IDT of the SAW temperature sensor receives the corresponding excitation signal resonance, firstly converting the electromagnetic signal into a surface acoustic wave signal and propagating along the surface of the substrate. And after passing through the reflecting gratings at the two ends, returning to the interdigital transducer, converting the surface acoustic wave signals into electric signals and transmitting the electric signals from the output end of the antenna. The transmitting antenna is shown in fig. 3.
Step F: the high-speed switch switches to the receiving end RX to receive the echo signal of the sensor, which is shown in fig. 6. And a sound surface filter with the central frequency of 435MHz and the bandwidth of 4MHz is used at the receiving front end for frequency selection processing, so that external interference signals are filtered, and stable echo signals are obtained. The input end is connected with a 50 omega resistor in series, and the output end is connected with 50 omega resistor in parallel for link matching. The invention adopts multistage amplification filtering, thus greatly increasing the detection distance of the echo.
Step G: the signals of the multistage amplification and filtering pass through a mixer to realize the linear shift of the frequency spectrum. In the receiving circuit, the signal obtained by down-conversion, filtering and amplification and the signal output by the other ADF4351 are subjected to difference frequency to output the absolute value of the frequency. According to the invention, an AD608 is used as a difference frequency device, an echo signal (echo) and a lower local oscillator signal (LO) amplified by an LNA are respectively connected to RFHI and RFLO pins of a mixer, the lower local oscillator signal is generated by CH1_ IOUT of AD9959, and an RFLO signal with a difference frequency of 10.7MHz with a transmitting signal is generated by frequency multiplication of ADF4351, wherein the signals are shown in FIG. 7.
Step H: and filtering the signal output by the output end LMOP, then entering an AGC self-gain amplifier for proper amplification, and then sending the signal to a main control FPGA for processing. The invention selects FPGA as a main processor, a clock circuit is externally connected with an active 50MHz crystal oscillator as a reference clock of a system, and frequency multiplication and frequency division are carried out in a chip to generate the clock frequency required by work. The internal execution program of the FPGA is described below.
Step I: and connecting the result of FPGA processing operation to RS232 through a serial port, and then sending the result to a display unit.
The main control board of the invention has the program design flow:
(1) after the main control board is electrified, firstly, initializing configuration is carried out on each unit module, then, a self-checking program is carried out, and if the self-checking is passed, the next step is carried out; if the self-checking finds the problem, the detection is restarted again to detect whether the program is in problem, otherwise, the detection is indicated through a corresponding indicator light.
(2) And after the initialization and the self-checking are passed, the system enters a circular waiting state and waits for the start interrupt sent from the outside.
(3) Starting to work, reading the register value from the memory, and quickly writing each control word in a solidified netlist form; the program control amplifier is controlled to amplify the signals in a program control mode, the transmitting switch is turned on, and the time length of signal transmission is strictly controlled.
(4) The transmitting is closed, the receiving is opened, the time required by the conversion of the echo signal is calculated, and the receiving time delay of the time is carried out to prevent the interference signal from entering.
(5) Firstly, detecting the strength signal indication RSSI, and then detecting the echo frequency; judging whether the temperature signal exists or not, if not, returning to the sensor for excitation again for reading judgment;
(6) if the temperature signal is the temperature signal, the temperature value is calculated and transmitted to the display unit through the serial port, and the display unit displays the temperature and judges the threshold value.
(7) And delaying for a certain time, closing the receiving switch, enabling the program control amplifier, opening the transmitting switch, and exciting the sensor again.
(8) And (5) repeating the steps 4 to 7, detecting the temperature, and circulating in sequence.
The design is based on a resonant surface acoustic wave temperature sensor, and the working principle is as follows: after the IDT receives the corresponding excitation signal for resonance, the electromagnetic signal is firstly converted into a surface acoustic wave signal and is propagated along the surface of the substrate. And after passing through the reflecting gratings at the two ends, returning to the interdigital transducer, converting the surface acoustic wave signals into electric signals and transmitting the electric signals from the output end of the antenna. According to different resonant SAW structures, the two-port SAW filter can be divided into a single-port type and a double-port type, and the double-port type can be manufactured into the SAW filter for frequency selection. And the single port type has the advantages that the input and the output share one port and are connected with an antenna for receiving and transmitting, and the reflecting grating arrays on the two sides of the sensor are mutually symmetrical, so that the energy utilization rate can be improved, and the reflection coefficient can be increased. The design uses a single-port sensor.
It should be understood that the detailed description of the present invention is only for illustrating the present invention and is not limited by the technical solutions described in the embodiments of the present invention, and those skilled in the art should understand that the present invention can be modified or substituted equally to achieve the same technical effects; as long as the use requirements are met, the method is within the protection scope of the invention.
Claims (10)
1. The passive temperature detection system based on the SAW is characterized by comprising a SAW temperature sensor, a PIFA antenna, a temperature reader and a display unit; the SAW temperature sensor is externally connected with a spiral antenna, the spiral antenna transmits signals to the PIFA antenna, the PIFA antenna is connected with a temperature reader, and the temperature reader is connected with the display unit.
2. A SAW based passive temperature detection system according to claim 1, wherein: the temperature reader comprises a transmitting module and a receiving module;
the transmitting module comprises an FPGA processor, a DDS frequency synthesizer, a PLL (phase locked loop) module, an AMP power amplifier module and a high-speed switch; the FPGA processor is connected with the DDS frequency synthesizer and the PLL module, the DDS frequency synthesizer is connected with the PLL module, and the PLL module is connected with the AMP power amplifier module; the AMP power amplification module is connected with the high-speed switch;
the receiving comprises a band-pass filter, an LNA low noise amplifier, a MIXER MIXER and an AGC self-gain amplifier; the input of the band-pass filter is connected with the high-speed switch, the output of the band-pass filter is connected with the input of the LNA, and the input of the mixer is connected with the output of the LNA and the phase-locked loop module respectively; the output of the mixer is connected to a self-gain amplifier, which is connected to the FPGA.
3. A SAW based passive temperature detection system according to claim 1, wherein: the phase-locked loop module comprises an ADF4351 chip, and a 12 pin of the ADF4351 chip is used for frequency multiplication of a transmission link and is connected with a power amplification module of the AMP module; the 14 pin of the ADF4351 chip is used for receiving local oscillation signal output and is connected with the 4 pin of the AMP power amplification module ADL5243 chip, and the 14 pin signal output of the ADF4351 chip is also used for generating a local oscillation signal at a receiving end and is connected with the 3 pin of the AD608ARZ chip of the frequency mixer.
4. A SAW based passive temperature detection system according to claim 1, wherein: the DDS frequency synthesizer comprises an AD9959 chip, pins 3, 4, 46, 47, 48, 50, 51, 52 and 53 of the AD9959 chip are connected with pins 78, 79, 80, 81, 82, 93, 94, 95, 96 and 97 of the FPGA, and pin 30 of the AD9959 chip is connected with pin 29 of the ADF4351 chip of the phase-locked loop module.
5. A SAW based passive temperature detection system according to claim 1, wherein: the AMP power amplifier module comprises a chip ADL5243, wherein a pin 4 of the chip ADL5243 is connected with a pin 12 of an ADF4351 chip; the pin 21 of the chip ADL5243 is connected with a high-speed switch; the 4 control pins 29, 30, 31, 32 of the ADL5243 chip are connected to the 9, 10, 11, 12 pins of the master control chip, respectively.
6. A SAW based passive temperature detection system according to claim 1, wherein: the high-speed switch comprises two high-speed switch chips ADG901, a pin 8 of an ADG901 of a transmission signal control switch chip is connected with a pin 21 of an ADL5243, a pin 2 of the ADG901 of the chip is connected with a pin 92 of the FPGA through a resistor to output a transmission signal to a transmission antenna for control, and a pin 4 of the ADG901 of the chip is connected with the transmission antenna through a capacitor; when receiving signals, the signals enter through the 8 pins of the two ADG901 of the receiving switch chip, the 4 pins are connected with the 3 pins of the band-pass filter SAWF-315, and the 2 pins of the control pin are controlled by the 88 pins of the FPGA.
7. A SAW based passive temperature detection system according to claim 1, wherein: the band-pass filter comprises a chip SAWF-315, the low-noise amplifier comprises a chip MGA62563, and a pin 3 of the chip MGA62563 is connected with a pin 6 of the band-pass filter through an inductor L17; the 2 pin of the band-pass filter is connected with the 4 pin of the high-speed switch through a resistor R77; pin 6 of chip MGA62563 is connected as an output pin to pin 5 of the mixer.
8. A SAW based passive temperature detection system according to claim 1, wherein: the mixer comprises a chip AD608ARZ, a pin 5 of the chip AD608ARZ is used as an input to be connected with a pin 6 of a chip MGA62563, a received signal enters the mixer, and a pin 3 of the chip AD608ARZ is connected with a PLL (phase locked loop) module to be used as a received local oscillation signal; the 15 pin of the chip AD608ARZ is connected with the AGC self-gain amplifier as the output of the mixing signal.
9. A SAW based passive temperature detection system according to claim 1, wherein: the AGC self-gain amplifier and the AMP power amplifier module share the same chip ADL5243, a pin 19 of the chip ADL5243 is used as an input to be connected with a frequency mixing output signal of a pin 15 of the frequency mixer, and a pin 6 of the chip ADL5243 is used as an output to be connected with a pin 105 of the FPGA.
10. The test method based on the SAW passive temperature detection system comprises the following steps:
a, generating an excitation signal through an FPGA processor, a DDS frequency synthesizer, a PLL (phase locked loop) module and an AMP power amplifier module;
and B: the excitation signal is transmitted to the SAW temperature sensor through the PIFA antenna through the high-speed switch;
and C: sending an echo signal generated by the SAW temperature sensor to the PIFA antenna through the spiral antenna;
d, filtering, amplifying and mixing the echo signals received by the PIFA antenna, and transmitting the echo signals to the FPGA processor through self-gain amplification;
and E, transmitting the temperature acquired by the FPGA processor to a display unit for displaying, and transmitting the temperature to an upper computer for displaying through the display unit.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201910978870.9A CN110608810A (en) | 2019-10-15 | 2019-10-15 | Passive temperature detection system based on SAW |
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| CN201910978870.9A CN110608810A (en) | 2019-10-15 | 2019-10-15 | Passive temperature detection system based on SAW |
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| CN201910978870.9A Pending CN110608810A (en) | 2019-10-15 | 2019-10-15 | Passive temperature detection system based on SAW |
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Cited By (1)
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| CN113155306B (en) * | 2021-01-18 | 2023-11-10 | 国网吉林省电力有限公司长春供电公司 | Built-in passive wireless temperature-sensing sensor of high-voltage power cable joint |
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