CN110600469B - Novel reduce unidirectional protection device of forward residual voltage - Google Patents
Novel reduce unidirectional protection device of forward residual voltage Download PDFInfo
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- 238000009792 diffusion process Methods 0.000 claims abstract description 106
- 239000012535 impurity Substances 0.000 claims abstract description 53
- 239000000758 substrate Substances 0.000 claims abstract description 29
- 239000002184 metal Substances 0.000 claims abstract description 20
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 4
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 4
- 239000010703 silicon Substances 0.000 claims abstract description 4
- 238000000034 method Methods 0.000 claims description 12
- 230000008020 evaporation Effects 0.000 claims description 7
- 238000001704 evaporation Methods 0.000 claims description 7
- 230000002829 reductive effect Effects 0.000 description 4
- 238000000137 annealing Methods 0.000 description 3
- 230000015556 catabolic process Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 230000002457 bidirectional effect Effects 0.000 description 2
- 230000002441 reversible effect Effects 0.000 description 2
- 230000001052 transient effect Effects 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 230000000670 limiting effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000036961 partial effect Effects 0.000 description 1
- 230000001960 triggered effect Effects 0.000 description 1
- 230000003313 weakening effect Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0255—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using diodes as protective elements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0259—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using bipolar transistors as protective elements
- H01L27/0262—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using bipolar transistors as protective elements including a PNP transistor and a NPN transistor, wherein each of said transistors has its base coupled to the collector of the other transistor, e.g. silicon controlled rectifier [SCR] devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0288—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using passive elements as protective elements, e.g. resistors, capacitors, inductors, spark-gaps
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0296—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices involving a specific disposition of the protective devices
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Abstract
The invention discloses a novel unidirectional protection device for reducing forward residual voltage, which is characterized by comprising an N-type substrate silicon wafer, wherein a P-type diffusion region with a deeper push junction and an N-type diffusion region with a deeper push junction are arranged on the front surface of the N-type substrate wafer, an N-type impurity diffusion region with a shallower push junction and a P-type impurity diffusion region are arranged in the P-type diffusion region with a deeper push junction, the N-type diffusion region with a deeper push junction is connected with the P-type impurity diffusion region through metal, and the N-type impurity diffusion region is led out by taking evaporated metal through an oxide layer opening as a cathode of the whole device; the back of the device is provided with an N-type diffusion region with a deeper push junction and a P-type impurity diffusion region with a shallower push junction, and the two diffusion regions are connected through metal to form the anode lead-out of the device. According to the invention, the PNPN device is added in the unidirectional negative resistance structure, and the gate electrode of the PNPN device is short-circuited to the anode through the resistor, so that a novel unidirectional protection device for reducing the forward residual voltage is realized.
Description
Technical Field
The invention belongs to the technical field of semiconductors, relates to a surge and ESD protection design technology of a semiconductor integrated chip, and particularly relates to a novel unidirectional protection device for reducing forward residual voltage.
Background
With the popularization of electronic systems and network lines, electronic products often encounter unexpected voltage transients and surges in use, and the transient interference is ubiquitous and can seriously jeopardize the safe operation of the electronic systems, which is manifested by breakdown or burning of semiconductor devices in the electronic products, including diodes, triodes, field effect transistors and the like. In order to avoid damaging electronic equipment by surge voltage, a surge protection device is adopted at a key position in the system, so that transient surge current bypasses the ground, and the aims of weakening and eliminating overvoltage and overcurrent are fulfilled, thereby playing a role in protecting the safe operation of the electronic equipment.
The surge protection device has a safe operating area, measured by two parameters of the trigger voltage of the device and the residual voltage during starting operation, which must be both between the operating voltage of the subsequent circuit and the breakdown voltage, and once the voltage exceeds the range, the protected circuit is burned out when the device is not started or the protected circuit is burned out after the device is started. The current unidirectional ESD protection device mainly has two types, one type is a traditional PN structure (shown in figure 1A), the substrate epitaxial wafer is formed by injecting or diffusing abnormal impurities, the device is simple in structure and easy to realize, but has the defects of high residual voltage and limited surge capacity, and the device is particularly outstanding in the high-voltage ESD protection device. At present, an improved unidirectional structure is more used, as shown in fig. 1B, and is referred to herein as a unidirectional negative resistance device, the bidirectional device is connected in parallel with the unidirectional device by the structure, the advantages of the two devices are integrated, the breakdown direction has the snapback characteristic of the bidirectional device, the on-resistance and the residual voltage are greatly reduced, the surge capacity is improved, and the other direction is the forward characteristic of the unidirectional diode. In the same area, because only partial forward region of the improved unidirectional structure is a P-type impurity region, the effective area of the unidirectional device is smaller than that of a traditional PN junction unidirectional device, so that the forward residual voltage of the unidirectional device is higher than that of a common unidirectional device, and the unidirectional device is unfavorable for protecting a subsequent circuit.
Disclosure of Invention
In order to solve the problem of forward residual voltage of an improved unidirectional device structure, the invention provides a method capable of reducing forward residual voltage under the condition of the same area, and the structure is innovatively designed.
The invention adopts the following technical scheme to solve the technical problems:
A novel unidirectional protection device for reducing forward residual voltage comprises an N-type substrate silicon wafer, wherein a P-type diffusion region with a deeper push junction and an N-type diffusion region with a deeper push junction are arranged on the front surface of the N-type substrate wafer, an N-type impurity diffusion region with a shallower push junction and a P-type impurity diffusion region are arranged in the P-type diffusion region with the deeper push junction, the N-type diffusion region with the deeper push junction is connected with the P-type impurity diffusion region through metal, and the N-type impurity diffusion region is led out as a cathode of the whole device through opening evaporation metal of an oxide layer; the back of the device is provided with an N-type diffusion region with a deeper push junction and a P-type impurity diffusion region with a shallower push junction, and the two diffusion regions are connected through metal to form the anode lead-out of the device.
The resistivity of the N-type substrate slice is 0.01-10Ω & CM, the thickness is 180-220um, and the double-sided diffusion is carried out on the substrate by adopting a mesa technology.
The junction depth of the P-type diffusion region with deeper push junction is larger than that of the P-type impurity diffusion region, and the long-time annealing is adopted, so that the junction depth is 15-30 mu m.
The junction depth of the N-type impurity diffusion region and the P-type impurity diffusion region with shallower push junctions is 2-5 mu m.
The N-type impurity diffusion region with the deeper push junction and the N-type impurity diffusion region with the shallower push junction adopt the same process; the N-type impurity diffusion region with the deeper push junction and the N-type impurity diffusion region with the deeper push junction are annealed at high temperature for a long time, and the junction depth is 20-35 mu m.
The front cathode electrode and the interconnection metal are made of Al, and are formed by adopting an evaporation process; the anode electrode on the back is made of Ti-Ni-Ag and is formed by adopting an evaporation process.
The PNPN structure device is integrated inside, and is composed of a shallow P-type impurity diffusion region, an N-type substrate region, a deep P-type diffusion region and an N-type diffusion region; and the shallow P-type impurity diffusion region and the N-type substrate region of the push junction are connected through the back metal to form the PNPN structure with the anode short circuit.
The gate electrode of the PNPN structure, namely the P-type diffusion region with deeper push junction, is connected with the N-type substrate region through metal.
The novel unidirectional protection device for reducing the forward residual voltage is internally integrated with a PN structure device D1, and is composed of a P-type diffusion region with a deeper push junction and an N-type impurity diffusion region with a shallower push junction; and the resistor R2 is formed by the P-type diffusion region with the deeper push junction, the N-type substrate region and the N-type diffusion region with the deeper push junction when seen from the back surface to the front surface, and is connected with the PN junction in series and then reaches the back surface cathode.
The invention has the beneficial effects that the PNPN device is added in the unidirectional negative resistance structure, and the gate electrode of the PNPN device is short-circuited to the anode through the resistor, so that the novel unidirectional protection device for reducing the forward residual voltage is realized.
Drawings
Fig. 1A is a diagram of a conventional unidirectional device equivalent circuit.
Fig. 1B is a diagram of a unidirectional negative resistance device equivalent circuit.
Fig. 2 is a schematic longitudinal cross-section of a device according to the invention.
Fig. 3 is an equivalent circuit diagram of the present invention.
Fig. 4 is a schematic view of anode-to-cathode current bleed in accordance with an embodiment of the present invention.
FIG. 5 is a graph showing the forward TLP contrast curve of an embodiment of the present invention with a conventional unidirectional negative resistance device.
Detailed Description
As shown in fig. 2-5, the novel unidirectional protection device for reducing the forward residual voltage comprises an N-type substrate silicon wafer (301), wherein a P-type diffusion region (302) with a deeper push junction and an N-type diffusion region (305) with a deeper push junction are arranged on the front surface of the N-type substrate wafer, an N-type impurity diffusion region (304) with a shallower push junction and a P-type impurity diffusion region (303) are arranged on the P-type diffusion region (302) with a deeper push junction, the N-type diffusion region (305) with a deeper push junction is connected with the P-type impurity diffusion region (303) through metal, and the N-type impurity diffusion region (304) is led out as a cathode of the whole device through opening of an oxide layer; the back of the device is provided with an N-type diffusion region (309) with a deeper push junction and a P-type impurity diffusion region (307) with a shallower push junction, and the two diffusion regions are connected through metal to form the anode lead-out of the device.
The resistivity of the N-type substrate slice (301) is 0.01-10Ω & CM, the thickness is 180-220um, and the double-sided diffusion is carried out on the substrate by adopting a mesa technology.
The junction depth of the P-type diffusion region (302) with the deeper push junction is larger than that of the P-type impurity diffusion region (303), and the junction depth of the P-type diffusion region (302) is 15-30 mu m by adopting long-time annealing.
The junction depth of the N-type impurity diffusion region (304) and the P-type impurity diffusion region (303) is 2-5 μm.
The N-type impurity diffusion region (309) with the deeper push junction and the N-type impurity diffusion region (305) with the deeper push junction and the N-type impurity diffusion region (304) with the shallower push junction adopt the same process; the N-type impurity diffusion region 309 with a deep push junction and the N-type impurity diffusion region 305 with a deep push junction are annealed at a high temperature for a long time, and the junction depth is 20-35 mu m.
The front cathode electrode and the interconnection metal are made of Al, and are formed by adopting an evaporation process; the anode electrode on the back is made of Ti-Ni-Ag and is formed by adopting an evaporation process.
The PNPN structure device is integrated inside, and is composed of a P-type impurity diffusion region (307) with shallower push junction, an N-type substrate region (301), a P-type diffusion region (302) with deeper push junction and an N-type diffusion region (304); and the shallow P-type impurity diffusion region (307) and the N-type substrate region (301) are connected through the back metal to form the PNPN structure with the anode short circuit.
The gate of the PNPN structure, i.e. the P-type diffusion region (302) with deeper push junction, is connected with the N-type substrate region through metal.
The novel unidirectional protection device for reducing the forward residual voltage is internally integrated with a PN structure device D1, and consists of a P-type diffusion region (302) with a deeper push junction and an N-type impurity diffusion region (304) with a shallower push junction; the P-type diffusion region (309), the N-type substrate region (301) and the N-type diffusion region (305) with deep push junction form a resistor R2 when seen from the back surface to the front surface, and the resistor R2 is connected in series with the PN junction and reaches the back surface cathode.
When surge attack occurs from the anode to the cathode, the PN structure device D1 is firstly conducted, and along with the increase of the applied voltage, the channel current of the resistors R2 and D1 is increased, so that current is continuously injected to the gate electrode of the PNPN device, the base-collector voltage of an NPN triode in the PNPN structure is enabled to reach 0.7V rapidly, the two triodes enter a positive feedback state, the SCR structure is triggered to rapidly discharge large current, an attached figure 4 indicates that a short-dashed line IF1 is a current discharge path of the resistor and D1, PNPN in a square frame is an IF2 current discharge path, and the two paths are simultaneously discharged in the large current state. Because the PNPN structure has good robustness and strong current discharging capability in unit area, the on-resistance of the whole device is reduced, and meanwhile, the residual voltage is reduced and the surge capability is improved. In particular, when the substrate resistivity is reduced, the N-type diffusion region 305 and the N-type diffusion region 309 are implanted with an increased dose, and the annealing is enhanced, the current to which the gate is implanted is increased, which increases the PNPN turn-on speed, and the forward residual voltage characteristic is also improved. On the other hand, when there is a surge attack from the front to the back, the diode D1 breaks down in reverse first and then reaches the anode in the forward direction through a resistor or PN junction. Unidirectional protection devices for different operating voltages may be implemented by adjusting the process and spacing of the P-type diffusion regions 302 and the N-type diffusion regions 304. Fig. 5 shows a comparison of forward TLP curves for the novel unidirectional protection device of the present invention and a conventional unidirectional negative resistance device. In a word, the novel unidirectional protection device has enhanced reverse surge capability compared with the traditional unidirectional device, and has lower forward residual voltage and smaller on-resistance compared with the common unidirectional negative resistance device.
The invention has been described in detail in the foregoing, but the foregoing description is only a preferred embodiment of the invention and should not be construed as limiting the scope of the invention. That is, all equivalent changes and modifications made according to the scope of the present invention should be made within the scope of the present invention.
Claims (6)
1. The unidirectional protection device for reducing the forward residual voltage is characterized by comprising an N-type substrate region (301) formed by an N-type substrate silicon wafer, wherein a P-type diffusion region (302) with a deeper push junction and an N-type diffusion region (305) with a deeper push junction are arranged on the front surface of the N-type substrate wafer, an N-type impurity diffusion region (304) with a shallower push junction and a P-type impurity diffusion region (303) are arranged in the P-type diffusion region (302) with a deeper push junction, the N-type diffusion region (305) with a deeper push junction is connected with the P-type impurity diffusion region (303) through metal, and the N-type impurity diffusion region (304) is led out by taking evaporated metal through an oxide layer opening as the cathode of the whole device; the back of the device is provided with an N-type diffusion region (309) with a deeper push junction and a P-type impurity diffusion region (307) with a shallower push junction, and the two diffusion regions are connected through metal to form a device anode lead-out; wherein,
The PNPN structure device is integrated inside, and is composed of a shallow P-type impurity diffusion region (307), an N-type substrate region (301), a deep P-type diffusion region (302) and an N-type diffusion region (304); the shallow P-type impurity diffusion region (307) and the N-type substrate region (301) are connected through back metal to form a PNPN structure with an anode short circuit;
the gate electrode of the PNPN structure, namely a P-type diffusion region (302) with a deeper push junction, is connected with an N-type substrate region through metal;
The PN structure device D1 is integrated inside and consists of a P-type diffusion region (302) with a deeper push junction and an N-type impurity diffusion region (304) with a shallower push junction; the N-type diffusion region (309), the N-type substrate region (301) and the N-type diffusion region (305) with the deeper push junction form a resistor R2 when seen from the back surface to the front surface, and the resistor R2 is connected with the PN junction in series and reaches the front surface cathode.
2. The unidirectional protection device for reducing forward residual voltage of claim 1, wherein the N-type substrate region (301) has a resistivity of 0.01-10Ω -CM and a thickness of 180-220 μm, and the mesa process is used for double-sided diffusion on the substrate.
3. The unidirectional protection device of claim 1, wherein the P-type diffusion region (302) having a deeper push junction has a junction depth greater than the P-type impurity diffusion region (303), the junction depth being in the range of 15-30 μm by a long anneal of the P-type impurity diffusion regions (302).
4. The unidirectional protection device of claim 1, wherein the shallow push junction N-type impurity diffusion region (304) and P-type impurity diffusion region (303) have a junction depth in the range of 2-5 μm.
5. The unidirectional protection device of claim 1, wherein the deep push junction N-type diffusion region (309) and the deep push junction N-type impurity diffusion region (305) and the shallow push junction N-type impurity diffusion region (304) are formed by the same process; the N-type diffusion region (309) with the deeper push junction and the N-type impurity diffusion region (305) with the deeper push junction are annealed at high temperature for a long time, and the junction depth is 20-35 mu m.
6. The unidirectional protection device of claim 1, wherein the front cathode and interconnect metal are made of Al, formed by an evaporation process; the anode electrode on the back is made of Ti-Ni-Ag and is formed by adopting an evaporation process.
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6777721B1 (en) * | 2002-11-14 | 2004-08-17 | Altera Corporation | SCR device for ESD protection |
| US20070120193A1 (en) * | 2005-11-28 | 2007-05-31 | Kabushiki Kaisha Toshiba | Esd protection device |
| US20120099229A1 (en) * | 2010-10-25 | 2012-04-26 | Krzysztof Domanski | Semiconductor ESD Device and Method |
| CN103730458A (en) * | 2012-10-15 | 2014-04-16 | 上海华虹宏力半导体制造有限公司 | Silicon controlled rectifier |
| CN212085004U (en) * | 2019-07-01 | 2020-12-04 | 上海维安半导体有限公司 | Novel one-way protection device for reducing forward residual voltage |
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Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6777721B1 (en) * | 2002-11-14 | 2004-08-17 | Altera Corporation | SCR device for ESD protection |
| US20070120193A1 (en) * | 2005-11-28 | 2007-05-31 | Kabushiki Kaisha Toshiba | Esd protection device |
| US20120099229A1 (en) * | 2010-10-25 | 2012-04-26 | Krzysztof Domanski | Semiconductor ESD Device and Method |
| CN102456687A (en) * | 2010-10-25 | 2012-05-16 | 英飞凌科技股份有限公司 | Semiconductor ESD device and method |
| CN103730458A (en) * | 2012-10-15 | 2014-04-16 | 上海华虹宏力半导体制造有限公司 | Silicon controlled rectifier |
| CN212085004U (en) * | 2019-07-01 | 2020-12-04 | 上海维安半导体有限公司 | Novel one-way protection device for reducing forward residual voltage |
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